Commit graph

19153 commits

Author SHA1 Message Date
Simon Glass
43e60814b3 ppc: Move arbiter fields to arch_global_data
Move arbiter_event_attributes and arbiter_event_address into
arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:43 -05:00
Simon Glass
3c4c308c00 ppc: Move reset_status to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:43 -05:00
Simon Glass
1c356135fa ppc: Move mpc8220 clocks to arch_global_data
Move these fields into arch_global_data and tidy up. The bExtUart field
does not appear to be used, so punt it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:43 -05:00
Simon Glass
fefb098b18 ppc: Move mpc512x clocks to arch_global_data
Move ips_clk and csb_clk into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:43 -05:00
Simon Glass
b28774966c ppc: Move mpc5xxx clocks to arch_global_data
Move ipb_clk and pci_clk into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:43 -05:00
Simon Glass
7c80c6c51a ppc: Move used_tlb_cams to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:43 -05:00
Simon Glass
8670dbc953 ppc: Move used_laws to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:43 -05:00
Simon Glass
45bae2e3cf ppc: Move CONFIG_QE to arch_global_data
Move the quantative easing fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:42 -05:00
Simon Glass
609e6ec3f6 ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data
Move these fields into arch_global_data and tidy up. This is needed for
both ppc and m68k since they share the i2c driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:42 -05:00
Simon Glass
67ac13b1b9 ppc: Move lbc_clk and cpu to arch_global_data
Move these fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Update for bsc9132qds.c, b4860qds.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-04 09:04:57 -05:00
Simon Glass
c6731fe22a ppc: Move mpc83xx clock fields to arch_global_data
Move al mpc83xx fields into arch_global_data and tidy up. Also indent
the nested #ifdef for clarity.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:42:45 -05:00
Simon Glass
748cd0591a ppc: Move clock fields to arch_global_data
Move vco_out, cpm_clk, scc_clk, brg_clk into arch_global_data and tidy
up. Leave pci_clk on its own since this should really depend only on
CONFIG_PCI and not any particular chip type.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:42:45 -05:00
Simon Glass
9fb23624a6 ppc: Remove extra pci_clk fields from global_data
PPC has several of these fields, selected by chip type, although only one
is ever compiled in.

Instead, use a single field. It would be nice if this could be selected
by CONFIG_PCI, but some chips (e.g. mpc5xxx) use pci_clk even when
CONFIG_PCI is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:42:45 -05:00
Simon Glass
1206c18403 ppc: Move brg_clk to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:42:45 -05:00
Simon Glass
6cb49c13f6 x86: Remove reset_status, relocoff from global_data
These fields are not used on x86, so punt them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:40:31 -05:00
Simon Glass
5a35e6c48e x86: Move gd_addr into arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add arch/x86/cpu/cpu.c changes after Graeme's comments]
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-01 15:39:42 -05:00
Simon Glass
0cecc3b679 x86: Set up the global data pointer in C instead of asm
We currently assume that the global data pointer is at the start of
struct global_data. We want to remove this restriction, and it is
easiest to do this in C.

Remove the asm code and add equivalent code in C.

This idea was proposed by Graeme Russ here:
   http://patchwork.ozlabs.org/patch/199741/

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Apply Graeme Russ' comments
http://patchwork.ozlabs.org/patch/206305/ here, re-order]
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-01 15:36:53 -05:00
Simon Glass
df4aa625a2 x86: Remove gdt_addr from arch_global_data
Remove this unused field.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:35:15 -05:00
Simon Glass
34fd5d253d arm: Move tlb_addr and tlb_size to arch_global_data
Move these fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Address tlb_size in this patch as well]
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-01 15:21:58 -05:00
Simon Glass
37434783bb nds32: Drop tlb_addr from global data
This field doesn't appear to be used for anything important, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
b4d51db86b ixp: Move timestamp to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
5f70714c2f arm: Move timer_reset_value to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
582601da2f arm: Move lastinc to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
66ee692347 arm: Move tbl to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
8ff43b03e9 arm: Move tbu to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
b339051c0d arm: Move timer_rate_hz into arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:49 -05:00
Simon Glass
f47e6ecd5d at91: Move at91 global data into arch_global_data
Move these fields into arch_global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:49 -05:00
Simon Glass
5cb48582ac Add architecture-specific global data
We plan to move architecture-specific data into a separate structure so
that we can make the rest of it common.

As a first step, create struct arch_global_data to hold these fields.
Initially it is empty.

This patch applies to all archs at once. I can split it if this is really
a pain.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:49 -05:00
Marek Vasut
6ad77d88e5 vfat: Fix mkcksum argument sizes
In case a function argument is known/fixed size array in C, the argument is
still decoyed as pointer instead ( T f(U n[k]) ~= T fn(U *n) ) and therefore
calling sizeof on the function argument will result in the size of the pointer,
not the size of the array.

The VFAT code contains such a bug, this patch fixes it.

Reported-by: Aaron Williams <Aaron.Williams@cavium.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Aaron Williams <Aaron.Williams@cavium.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2013-01-31 14:43:01 -05:00
Lucas Stach
4e5eb45898 arm: fix CONFIG_DELAY_ENVIRONMENT to act like it claims in the README
No one expects to end up in a delayed environment if
CONFIG_DELAY_ENVIRONMENT isn't defined.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
2013-01-30 19:33:01 -05:00
Tom Rini
b6832af850 Merge branch 'master' of git://git.denx.de/u-boot-mips 2013-01-30 19:26:38 -05:00
Gabor Juhos
e93b98e216 MIPS: qi_lb60: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.

The qi_lb60 target produces a slightly different
image after the change than before. The value of
'num_got_entries' symbol is different:

    @@ -49,7 +49,7 @@
     801000b4:      80122d00        lb      s2,11520(zero)
     801000b8:      80123500        lb      s2,13568(zero)
     801000bc:      80123ef8        lb      s2,16120(zero)
    -801000c0:      00000139        0x139
    +801000c0:      00000136        tne     zero,zero,0x4

     801000c4 <in_ram>:
     801000c4:      8d0bfffc        lw      t3,-4(t0)

This is caused by the different placement of the
'__got_start' and '__got_end' symbols between the
board specific scrip and the unified script.

  board specific script:

        __got_start = .;
        .got  : { *(.got) }
        __got_end = .;

  unified script:
        .got  : {
                __got_start = .;
                *(.got)
                __got_end = .;
        }

Despite this difference, the resulting images are
functionally identical.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2013-01-31 00:27:58 +01:00
Gabor Juhos
f42d796b81 MIPS: dbau1x00: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.

All dbau1x00 targets are producing identical binary
images after the change than before.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-31 00:27:49 +01:00
Gabor Juhos
3b051ee51a MIPS: incaip: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.

All incaip targets are producing identical binary
images after the change than before.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
2013-01-31 00:27:39 +01:00
Gabor Juhos
975f67b609 MIPS: vct: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.

All vct targets are producing identical binary
images after the change than before.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-31 00:27:28 +01:00
Gabor Juhos
b56ca8ced0 MIPS: pb1x00: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.

All pb1x00 targets are producing identical binary
images after the change than before.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-31 00:27:18 +01:00
Gabor Juhos
1b8ceb4ba5 MIPS: qemu-mips: use the unified u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.

All qemu_mips targets are producing identical binary
images after the change than before.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-31 00:27:09 +01:00
Gabor Juhos
cb5dbca899 MIPS: add unified u-boot.lds file
The patch adds an unified linker script file which
can be used for all currently supported MIPS targets.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Stefan Roese <sr@denx.de>
2013-01-31 00:26:59 +01:00
Gabor Juhos
9950b90d38 MIPS: remove OUTPUT_FORMAT from linker scripts
The OUTPUT_FORMAT command in linker scripts
was always misused due to some endianess and
toolchain problems.

Use GCC flags to ensure proper output format,
and get rid of the OUTPUT_FORMAT commands in
the board specific u-boot.lds files.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2013-01-30 23:34:10 +01:00
Gabor Juhos
6d86227880 MIPS: xburst: simplify relocation offset calculation
The current code uses four instructions and a
temporary register to calculate the relocation
offset and to adjust the gp register.

The relocation offset can be calculated directly
from the CONFIG_SYS_MONITOR_BASE constant and from
the destination address. The resulting offset can
be used to adjust the gp pointer.

This approach makes the code a bit simpler because
it needs two instructions only.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2013-01-30 23:33:27 +01:00
Gabor Juhos
025f2b3380 MIPS: simplify relocated _G_O_T_ address calculation
The difference between the address of the original
and the relocated _GLOBAL_OFFSET_TABLE_ is always
the same as the relocation offset.

The relocation offset is already computed and it is
available in the 's1/t6' register. Use that to adjust
the relocated _G_O_T_ address, instead of calculating
the offset again from the _gp value.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2013-01-30 23:32:52 +01:00
Andy Fleming
d4ed654278 corenet: Disable video on P2020DS
The P2020DS build had grown too large, and video support isn't enabled
in almost any other Freescale board. Disabling it allows us to keep
building, and provides options for reenabling it later.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:16 -06:00
Prabhakar Kushwaha
960aa89bda board/common: Add support for QIXIS read/write using i2c
QIXIS FPGA is accessable via both i2c and flash controller.
Only flash controller access is supported.

Add support of i2c based access. It is quite useful in the scenario
where either flash controller path is broken or not present.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:15 -06:00
Shengzhou Liu
72bd83cd0a powerpc/t4240: Adding workaround errata A-005871
When CoreNet Fabric (CCF) internal resources are consumed by the cores,
inbound SRIO messaging traffic through RMan can put the device into a
deadlock condition.

This errata workaround forces internal resources to be reserved for
upstream transactions. This ensures resources exist on the device for
upstream transactions and removes the deadlock condition.

The Workaround is for the T4240 silicon rev 1.0.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:15 -06:00
Vakul Garg
5e95e2d84b powerpc/mpc85xx: Add property 'fsl, sec-era' in device tree node 'crypto'
If property 'fsl,sec-era' is already present, it is updated.
This property is required so that applications can ascertain which
descriptor commands are supported on a particular CAAM version.

Signed-off-by: Vakul Garg <vakul@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:15 -06:00
Anatolij Gustschin
5b93394318 mpc8xxx: fix DDR init value to use CONFIG_MEM_INIT_VALUE
Configuring custom memory init value using CONFIG_MEM_INIT_VALUE in
the board config file doesn't work and memory is always initialized
to the value 0xdeadbeef. Only use this default value if a board doesn't
define CONFIG_MEM_INIT_VALUE.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:15 -06:00
Scott Wood
31d084ddda powerpc/mpc85xx: add support for MMUv2 page sizes
e6500 implements MMUv2 and supports power-of-2 page sizes rather than
power-of-4.  Add support for such pages.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:15 -06:00
Prabhakar Kushwaha
41d910118c powerpc/85xx: Add BSC9132QDS support
BSC9132QDS is a Freescale reference design board for BSC9132 SoC.
BSC9132 SOC is an integrated device that targets the evolving Microcell,
Picocell, and Enterprise-Femto base station market subsegments.
It combines Power Architecture e500v2 and DSP StarCore SC3850 core
technologies with MAPLE-B2F baseband acceleration processing elements.

BSC9132QDS Overview
 --------------------
  2Gbyte DDR3 (on board DDR), Dual Ranki
  32Mbyte 16bit NOR flash
  128Mbyte 2K page size NAND Flash
  256 Kbit M24256 I2C EEPROM
  128 Mbit SPI Flash memory
  SD slot
  USB-ULPI
  eTSEC1: Connected to SGMII PHY
  eTSEC2: Connected to SGMII PHY
  PCIe
  CPRI
  SerDes
  I2C RTC
  DUART interface: supports one UARTs up to 115200 bps for console display

Apart from the above it also consists various peripherals to support DSP
functionalities.

This patch adds support for mainly Power side functionalities and peripherals

Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:14 -06:00
Prabhakar Kushwaha
35fe948e3b powerpc/mpc85xx: Add BSC9132/BSC9232 processor support
The BSC9132 is a highly integrated device that targets the evolving
 Microcell, Picocell, and Enterprise-Femto base station market subsegments.

 The BSC9132 device combines Power Architecture e500 and DSP StarCore SC3850
 core technologies with MAPLE-B2P baseband acceleration processing elements
 to address the need for a high performance, low cost, integrated solution
 that handles all required processing layers without the need for an
 external device except for an RF transceiver or, in a Micro base station
 configuration, a host device that handles the L3/L4 and handover between
 sectors.

 The BSC9132 SoC includes the following function and features:
    - Power Architecture subsystem including two e500 processors with
	512-Kbyte shared L2 cache
    - Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2
	cache
    - 32 Kbyte of shared M3 memory
    - The Multi Accelerator Platform Engine for Pico BaseStation Baseband
      Processing (MAPLE-B2P)
    - Two DDR3/3L memory interfaces with 32-bit data width (40 bits including
      ECC), up to 1333 MHz data rate
    - Dedicated security engine featuring trusted boot
    - Two DMA controllers
         - OCNDMA with four bidirectional channels
         - SysDMA with sixteen bidirectional channels
    - Interfaces
        - Four-lane SerDes PHY
	    - PCI Express controller complies with the PEX Specification-Rev 2.0
        - Two Common Public Radio Interface (CPRI) controller lanes
	    - High-speed USB 2.0 host and device controller with ULPI interface
        - Enhanced secure digital (SD/MMC) host controller (eSDHC)
	    - Antenna interface controller (AIC), supporting four industry
		standard JESD207/four custom ADI RF interfaces
       - ADI lanes support both full duplex FDD support & half duplex TDD
       - Universal Subscriber Identity Module (USIM) interface that
	   facilitates communication to SIM cards or Eurochip pre-paid phone
	   cards
       - Two DUART, two eSPI, and two I2C controllers
       - Integrated Flash memory controller (IFC)
       - GPIO
     - Sixteen 32-bit timers

Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:14 -06:00
James Yang
e8ba6c503f powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands
This patch adds the ability for the FSL DDR interactive debugger to
automatically run the sequence of commands stored in the ddr_interactive
environment variable.  Commands are separated using ';'.

ddr_interactive=compute; edit c0 d0 dimmparms caslat_X 0x3FC0; go

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:14 -06:00