Commit graph

25086 commits

Author SHA1 Message Date
Michael Scott
43b1e83a73 imx: syscounter: allow timer_init for SPL build
With enabled SKIP_LOWLEVEL_INIT, the weak function timer_init() is
used in the SPL build. For iMX6 SoC, this leads MMC to fail once
u-boot proper is booted due to a timing issue.
Always use iMX-specific timer_init() in SPL to fix timing issues.

Fixes: be277c3a89 ("imx: mx7: avoid some initialization if low level is skipped")
Signed-off-by: Michael Scott <mike@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-10-16 08:46:01 +02:00
Tom Rini
3c3f162691 improvements with dev_read_addr_..._ptr()
scan all entries in multi-device boot_targets
 EFI empty-capsule support
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Merge tag 'dm-pull-13oct23' of https://source.denx.de/u-boot/custodians/u-boot-dm

improvements with dev_read_addr_..._ptr()
scan all entries in multi-device boot_targets
EFI empty-capsule support
2023-10-14 10:50:20 -04:00
AKASHI Takahiro
8c5def59e8 sandbox: remove SCMI base node definition from test.dts
SCMI base protocol is mandatory and doesn't need to be listed in a device
tree.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
2023-10-13 16:59:24 -04:00
AKASHI Takahiro
bddcd3af9c test: dm: simplify SCMI unit test on sandbox
Adding SCMI base protocol makes it inconvenient to hold the agent instance
(udevice) locally since the agent device will be re-created per each test.
Just remove it and simplify the test flows.
The test scenario is not changed at all.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
2023-10-13 16:59:24 -04:00
AKASHI Takahiro
a89d9f41e0 test: dm: add protocol-specific channel test
Any SCMI protocol may have its own channel.
Test this feature on sandbox as the necessary framework was added
in a prior commit.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
2023-10-13 16:59:23 -04:00
AKASHI Takahiro
a70a897e31 firmware: scmi: support dummy channels for sandbox agent
In sandbox scmi agent, channels are not used at all. But in this patch,
dummy channels are supported in order to test protocol-specific channels.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
2023-10-13 16:59:23 -04:00
Matthias Schiffer
5fecea171d treewide: use dev_read_addr_*_ptr() where appropriate
A follow-up to commit 842fb5de42
("drivers: use devfdt_get_addr_size_index_ptr when cast to pointer")
and commit 320a1938b6
("drivers: use devfdt_get_addr_index_ptr when cast to pointer").

In addition to using the *_ptr variants of these functions where the
address is cast to a pointer, this also changes devfdt_get_addr_*() to
dev_read_addr_*() in a few places. Some variable and field types are
changed from fdt_addr_t or phys_addr_t to void* where the cast was
happening later.

This patch fixes a number of compile warnings when building a 32bit
U-Boot with CONFIG_PHYS_64BIT=y. In some places, it also fixes error
handling where the return value of dev_read_addr() etc. was checked for
NULL instead of FDT_ADDR_T_NONE.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-13 14:01:42 -06:00
Heinrich Schuchardt
3cce6fcea7 sandbox: fix spl_board_init
sandbox_spl_defconfig with CONFIG_SPL_UNIT_TEST=n fails to build.

    in function `spl_board_init':
    arch/sandbox/cpu/spl.c:134:(.text.spl_board_init+0x4a):
    undefined reference to `ut_run_list'

Add the missing configuration check.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-13 10:15:41 -07:00
Tom Rini
6961ca0a46 Xilinx changes for v2024.01-rc1 v3
clk:
 - remove additional compatible strings for Versal NET
 
 net:
 - zynq_gem: Fix clock calculation for MDC for higher frequencies
 
 pinctrl:
 - core: Extend pinmux status buffere size
 - zynqmp driver: Show also tristate configuration
 
 test:
 - add test case for pxe get
 
 Xilinx:
 - describe SelectMAP boot mode
 
 Zynq:
 - Fix nand description in DT
 
 ZynqMP:
 - DTS sync patches with kernel and also W=1 related fixes
 - Add support for KD240, zcu670, e-a2197 with x-prc cards, SC revB/C with i2c
   description for other SC based boards
 - k24 psu_init cleanup
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Merge tag 'xilinx-for-v2024.01-rc1-v3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2024.01-rc1 v3

clk:
- remove additional compatible strings for Versal NET

net:
- zynq_gem: Fix clock calculation for MDC for higher frequencies

pinctrl:
- core: Extend pinmux status buffere size
- zynqmp driver: Show also tristate configuration

test:
- add test case for pxe get

Xilinx:
- describe SelectMAP boot mode

Zynq:
- Fix nand description in DT

ZynqMP:
- DTS sync patches with kernel and also W=1 related fixes
- Add support for KD240, zcu670, e-a2197 with x-prc cards, SC revB/C with i2c
  description for other SC based boards
- k24 psu_init cleanup
2023-10-13 08:45:55 -04:00
Dominik Haller
2c6e28831b arm: mach-k3: j721s2_init: Enable memory with CONFIG_K3_J721E_DDRSS
Make that condition more generic by checking if the memory controller
driver is enabled instead of using the EVM's config.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
2023-10-12 14:06:05 -04:00
Manorit Chawdhry
4dff5aa5c3 arm: dts: k3-am68: Sync from Linux tag v6.6-rc1
The following commit syncs the device tree from Linux tag
v6.6-rc1 to U-boot and fixes the following to be compatible with
the future syncs -

- Include k3-am68-sk-base-board.dts file

    Remove the duplicated pinmuxes from r5 and -u-boot.dtsi files and
    include k3-am68-sk-base-board.dts for Linux fixes to propagate
    to U-boot.

- Fixing the mcu_timer0

    Remove timer0 and use the mcu_timer0 defined in mcu-wakeup.dtsi

- Fixing secure proxy nodes

    Linux DT now have these nodes defined so remove them and rename to
    use the Linux DT ones.

- Remove cpsw node

    The compatible is now fixed and the node is not required in
    -u-boot specifically

- Remove aliases and chosen node

    Use these from Linux and don't override when not required.

- Remove /delete-property/ from sdhci nodes

    We have the necessary clock and dev data so remove these.

- Remove dummy_clocks and fs_loader0

    These weren't being used anywhere so remove it.

- Remove mcu_ringacc override

All these have been put in a single commit to not break the
bisectability.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-10-12 14:06:04 -04:00
Manorit Chawdhry
050f8b5df8 arm: dts: k3-j721s2: Sync from Linux tag v6.6-rc1
The following commit syncs the device tree from Linux tag
v6.6-rc1 to U-boot and fixes the following to be compatible with
the future syncs -

- Include k3-j721s2-common-proc-board.dts file

    Remove the duplicated pinmuxes from r5 and -u-boot.dtsi files and
    include k3-j721s2-common-proc-board.dts for Linux fixes to propagate
    to U-boot.

- Fixing the mcu_timer0

    Remove timer0 and use the mcu_timer0 defined in mcu-wakeup.dtsi

- Fixing secure proxy nodes

    Linux DT now have these nodes defined so remove them and rename to
    use the Linux DT ones.

- Remove cpsw node

    The compatible is now fixed and the node is not required in
    -u-boot specifically

- Remove aliases and chosen node

    Use these from Linux and don't override when not required.

- Remove /delete-property/ from sdhci nodes

    We have the necessary clock and dev data so remove these.

- Remove dummy_clocks and fs_loader0

    These weren't being used anywhere so remove it.

- Remove mcu_ringacc override

All these have been put in a single commit to not break the
bisectability.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-10-12 14:06:04 -04:00
Manorit Chawdhry
82d44bfbe3 arm: mach-k3: j721s2: Add mcu_timer0 id to the dev list
mcu_timer0 is used by u-boot as the tick-timer. Add it to the soc
devices lsit so it an be enabled via the k3 power controller.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-10-12 14:06:04 -04:00
Manorit Chawdhry
0b21d357f5 Revert "arm: dts: k3-j7*: ddr: Update to 0.10 version of DDR config tool"
The update causes instability in am68-sk boards so revert the patch in
the meantime till fix is available.

This reverts commit f1edf4bb6a.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-12 14:06:04 -04:00
Reid Tonking
df73e791ce arm: dts: j7200: dts sync with Linux 6.6-rc1
Sync j7200 dts with Linux 6.6-rc1

- k3-j7200-r5-common-proc-board.dts now inherits from
  k3-j7200-common-proc-board.dts instead of k3-j7200-som-p0.dtsi. This
  allows us to trim down the r5 file considerably by using existing
  properties

- remove pimux nodes from r5 file

- remove duplicate nodes & node properties from r5/u-boot files

- mcu_timer0 now used instead of timer1

  mcu_timer0 device id added to dev-data.c file in order to work

- remove cpsw node

  This node is no longer required since the compatible is now fixed

- remove dummy_clock_19_2_mhz

  This node wasn't being used anyhere, so it was removed

- remove dummy_clock_200mhz

  main_sdhci0 & main_sdhci1 no longer need dummy clock for eMMC/SD

- fix secure proxy node

  mcu_secproxy changed to used secure_prxy_mcu which is already
  defined in k3-j7200-mcu-wakeup.dtsi

- removed &mcu_ringacc property override since they're present in
  v6.6-rc1

Signed-off-by: Reid Tonking <reidt@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-12 14:06:04 -04:00
Reid Tonking
83eb443696 arm: mach-k3: j7200: Add mcu_timer0 id to the dev list
mcu_timer0 is now used as the tick timer in u-boot, so this adds the
timer to the soc device list so it can be enabled via the k3 power
controller.

Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Reid Tonking <reidt@ti.com>
2023-10-12 14:06:04 -04:00
Simon Glass
c2bd2d33d9 expo: Update tests to include textline
Provide test coverage for the new expo object type, including building
and reading/writing settings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-11 15:43:55 -04:00
Andrew Davis
1a1d48e36a configs: Make TI_SECURE_DEVICE default for K3
All K3 boards now are secure by default, instead of setting this in each
defconfig, make it implied by the ARCH config.

The only exception is IOT2050, which I do not believe will have any
problems with being a TI_SECURE_DEVICE, but for now turn it off to keep
its config the same.

Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Tom Rini <trini@konsulko.com>
2023-10-11 13:22:32 -04:00
Andre Przywara
3d5e52bd97 ARM: psci: move GIC address override to Kconfig
As the code to switch an ARM core from secure to the non-secure state
needs to know the base address of the Generic Interrupt Controller
(GIC), we read an Arm Cortex defined system register that is supposed to
hold that base address. However there are SoCs out there that get this
wrong, and this CBAR register either reads as 0 or points to the wrong
address. To accommodate those systems, so far we use a macro defined in
some platform specific header files, for affected boards.

To simplify future extensions, replace that macro with a Kconfig variable
that holds this override address, and define a default value for SoCs
that need it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
2023-10-11 13:22:32 -04:00
Rasmus Villemoes
01bf2e2eb3 sandbox: rename overlay sources to .dtso
Distinguish more clearly between source files meant for producing .dtb
from those meant for producing .dtbo. No functional change, as we
currently have rules for producing a foo.dtbo from either foo.dts or
foo.dtso.

Note that in the linux tree, all device tree overlay sources have been
renamed to .dtso, and the .dts->.dtbo rule is gone since v6.5 (commit
81d362732bac). So this is also a step towards staying closer to linux
with respect to both Kbuild and device tree sources.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-11 13:22:32 -04:00
Rasmus Villemoes
e6e3a3d9fc arm64: zynqmp: rename overlay sources to .dtso
Distinguish more clearly between source files meant for producing .dtb
from those meant for producing .dtbo. No functional change, as we
currently have rules for producing a foo.dtbo from either foo.dts or
foo.dtso.

Note that in the linux tree, all device tree overlay sources have been
renamed to .dtso, and the .dts->.dtbo rule is gone since v6.5 (commit
81d362732bac). So this is also a step towards staying closer to linux
with respect to both Kbuild and device tree sources.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-10-11 13:22:32 -04:00
Rasmus Villemoes
35c4bccd89 iot2050: rename overlay sources to .dtso
Distinguish more clearly between source files meant for producing .dtb
from those meant for producing .dtbo. No functional change, as we
currently have rules for producing a foo.dtbo from either foo.dts or
foo.dtso.

Note that in the linux tree, all device tree overlay sources have been
renamed to .dtso, and the .dts->.dtbo rule is gone since v6.5 (commit
81d362732bac). So this is also a step towards staying closer to linux
with respect to both Kbuild and device tree sources.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-10-11 13:22:32 -04:00
Rasmus Villemoes
7efe195096 arm: dts: imx8mm-cl-iot-gate: rename overlay sources to .dtso
Distinguish more clearly between source files meant for producing .dtb
from those meant for producing .dtbo. No functional change, as we
currently have rules for producing a foo.dtbo from either foo.dts or
foo.dtso.

Note that in the linux tree, all device tree overlay sources have been
renamed to .dtso, and the .dts->.dtbo rule is gone since v6.5 (commit
81d362732bac). So this is also a step towards staying closer to linux
with respect to both Kbuild and device tree sources.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-10-11 13:22:32 -04:00
Janne Grunau
0f2f5191e5 arm: apple: Add initial Apple M2 Ultra support
Apple's M2 Ultra SoC are somewhat similar to the M1 Ultra but needs
a tweaked memory map as the M2 Pro/Max SoCs.  USB, NVMe, UART, WDT
and PCIe are working with the existing drivers.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2023-10-11 13:22:32 -04:00
Andre Przywara
31565bb0aa driver: rng: Add DM_RNG interface for ARMv8.5 RNDR registers
The ARMv8.5 architecture extension defines architectural RNDR/RNDRRS
system registers, that provide 64 bits worth of randomness on every
read. Since it's an extension, and implementing it is optional, there is
a field in the ID_AA64ISAR0_EL1 ID register to query the availability
of those registers.

Add a UCLASS_RNG driver that returns entropy via repeated reads from
those system registers, if the extension is implemented.
The driver always binds, but checks the availability in the probe()
routine.

This helps systems which suffer from low boot entropy, since U-Boot can
provide entropy via the generic UEFI entropy gathering protocol to the OS,
at an early stage.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-11 13:22:32 -04:00
Marcel Ziswiler
5be1fef7f3 arm: dts: k3-am625-verdin: fix boot
A53 U-Boot proper got broken because nodes marked as 'bootph-pre-ram'
are no longer available in U-Boot proper before relocation.

Fix this by marking all nodes in u-boot.dtsi as 'bootph-all'.

Fixes: 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-10-11 13:22:29 -04:00
Nishanth Menon
9214da7b93 arm: dts: k3-j721e-sk/common-proc-board: Fix boot
Since commit 9e644284ab ("dm: core: Report bootph-pre-ram/sram node
as pre-reloc after relocation") A53 u-boot proper is broken. This is
because nodes marked as 'bootph-pre-ram' are not available at u-boot
proper before relocation.

To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'.

Fixes: 69b19ca67b ("arm: dts: k3-j721e: Sync with v6.6-rc1")
Cc: Neha Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Tom Rini <trini@konsulko.com> # J721E-EVM GP
Tested-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
2023-10-11 13:22:27 -04:00
Andrew Davis
693886856a arm: mach-k3: Remove secure device makefile
This is now done using binman but this file was leftover and is now
unused, remove it.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2023-10-11 13:22:27 -04:00
Jan Kiszka
53a1eb994a arm: dts: k3-am65-iot2050: Fix boot
Since commit 9e644284ab ("dm: core: Report bootph-pre-ram/sram node
as pre-reloc after relocation") A53 u-boot proper is broken. This is
because nodes marked as 'bootph-pre-ram' are not available at u-boot
proper before relocation.

To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-11 13:21:54 -04:00
Tom Rini
5ae883c716 Merge tag 'fsl-qoirq-2023-10-10' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Drop legacy PPA secure FW support
support for MC reserved memory
reset the FLSHxCR1 registers for nxp_fspi
2023-10-11 10:21:33 -04:00
Laurentiu Tudor
b9112cdfb5 armv8: fsl-layerscape: make some functions static
Some functions are not used outside this file, so make them static.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Laurentiu Tudor
487fa1aa97 fsl-layerscape: drop obsolete PPA secure firmware support
PPA was a secure firmware developed in-house which is no longer
supported and replaced by TF-A quite some years ago. Drop support
for it.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Matthias Schiffer
17deab0edd arm: mach-k3: common: fix compile warnings with PHYS_64BIT on 32bit
Use uintptr_t instead of phys_addr_t where appropriate, so passing the
addresses to writel() doesn't result in compile warnings when PHYS_64BIT
is set for 32bit builds (which is actually a useful configuration, as
the K3 SoC family boots from an R5 SPL, which may pass bank information
based on gd->bd->bi_dram to fdt_fixup_memory_banks() etc., so PHYS_64BIT
is needed for fixing up the upper bank).

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2023-10-09 15:24:31 -04:00
Tom Rini
4f9c7a9f54 exynos: Cleanup exynos_init
- None of the callers perform error checking and based on the non-empty
  versions of this function, there's no checking to be done, so make
  this a void.
- Add a default weak version of the function.
- Remove the empty versions of exynos_init now that we have a weak
  version.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-09 15:24:31 -04:00
Polak, Leszek
facfa5659b arm64: versal: Add SelectMAP boot mode identification
The SelectMAP configuration interface provides an 8-bit,
16-bit or 32-bit bidirectional data bus interface to the Versal FPGA
configuration logic that can be used for both configuration and readback.

A connected microcontoller to the SelectMAP interface can load boot
image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot.

This commit adds the missing identification of the SelectMAP mode.

Signed-off-by: Polak, Leszek <LPolak@arri.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Stefan Roese <sr@denx.de>
Link: https://lore.kernel.org/r/DU0PR07MB8419F7765892CDBCE7D559C5C8CFA@DU0PR07MB8419.eurprd07.prod.outlook.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-09 13:03:23 +02:00
Michal Simek
82bb62dfa9 arm64: xilinx: Do not use '_' in si5335 DT node names
Character '_' not recommended in node name. Use '-' instead.
Pretty much run sed below for node names.
s/si5335_/si5335-/

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ac752b1e27f02efb32608188992bb7ae50e4b1b0.1695809130.git.michal.simek@amd.com
2023-10-09 12:14:41 +02:00
Michal Simek
b311c9c40a arm64: zynqmp: Do not use '_' in DT node names
Using '_' is not recommended for node names. Use '-' instead.
Pretty much run seds below for node names.
s/heartbeat_led/heartbeat-led/
s/gtr_sel/gtr-sel/
s/zynqmp_ipi/zynqmp-ipi/
s/nvmem_firmware/nvmem-firmware/
s/soc_revision/soc-revision/

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dd33d6cb0595ffedab117d477f4a3c9d9eb11715.1695808665.git.michal.simek@amd.com
2023-10-09 12:13:36 +02:00
Michal Simek
c5cd2d2aba arm: dts: xilinx: Remove undocumented is-dual property
Xilinx was using in past is-dual property for QSPIs to reflect their
configurations. But handling for them never reached upstream code that's
why better to remove them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/15980560b98672959a889ff9970cbe9540b4ed69.1695808563.git.michal.simek@amd.com
2023-10-09 12:13:04 +02:00
Michal Simek
b51371e8c9 arm64: zynqmp: Add support for zcu670-revB
RevB has different SD level shifter compare to revA. There are couple of
changes between revisions but none of them requires SW alignment.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0f2bb29f88615ce75f887c006060543b4aeafd48.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
1ddf10d178 arm64: zynqmp: Add support for zcu670-revA
The board is sharing a lot of components with zcu208 but it contains
differet silicon and also several components are done differently.
The board has 4GB memory connected to PS and additional 4GB connected to
PL. Compare to zcu208 sata support has been dropped and only USB3.0 is
using GTR (lane2). Others GTRs are routed to connectors.

MIO configuration is also shared with zcu111.

The board is using si5381 chip compare to si5341 which is normally used.
And as of now there is no Linux driver for this chip. PS reference clock is
generated out of si570 chip which is also new approach compare to zcu208.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3b296ef0f52bd94e32bdeb6d1beee29ac85f00a2.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
eb357b75b7 arm64: zynqmp: Add support for VPXA2785
VPXA2785(vp-x-a2785-00) is evaluation board which contains two PCIe-Edge
fingers, one for PCIe-B(gen5x8) and one for CPM(dual gen5x8, gen5x16).
Each of the ports can operate in endpoint or root port mode. This allows
the single card to be used for both root port, endpoint, and switch modes.

The board is designed in the similar manner as others Versal boards. It
means board also have ZynqMP Zu4 System Controller which is described in a
separate file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/59d3b1f7e785bc65518b465e5122fd2787616a93.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
7f3639918f arm64: zynqmp: Describe i2c structures for SCs
Generic system controller (SC) covers connection defined by specification
but different boards have different i2c devices. That's why describe i2c
devices available on multiple boards.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ca1826b8b58981111229a94527818cc5a191ca9a.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
fa822ad19e arm64: zynqmp: Add support for SC revC
System controller revC is using ADI ethernet phy instead of TI because of
supply chain issues.
Describe reset assert and de-assert times to 10us and 5ms respectively
according to the datasheet. Also setup RGMII RX and TX delay values to
2400ps as per board bring up observations.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2790f6cede7485556d581ab8270dda477fa21522.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
64f5e3b492 arm64: zynqmp: Create description for generic SC (vpk120-revB)
System controllers are pretty much the same on the all boards that's why
use autodetection based on i2c eeprom. This should end up with having only
one BSP for all SCs with only DT overlays to cover different i2c
structures.

All MIOs are fixed by the spec that's why not a problem to description
pinctrl setting.

Apart from eth phy reset, it also set proper phy delays.
The TI DP83867 PHY datasheet says:
T1: Post RESET stabilization time == 195us
T3: Hardware configuration pins transition to output drivers == 64us
T4: RESET pulse width == 1us
So with a little overhead set 'reset-assert-us' to 100us (T4) and
'reset-deassert-us' to 280us (T1+T3).

NOTE: The tuning of TI DP83867 phy reset delay is derived from linux
upstream commit: 5dbadc848259(arm64: dts: fsl: add support for Kontron
pitx-imx8m board).

i2c structure on Xilinx Versal evaluation platforms contain a lot of
devices but also connection to connectors like SFP. Because of this
complicated structure with also all level shifters, i2c muxes, etc. not all
devices are able to reliably work on 400kHz even if they are compatible
with this speed. That's why set i2c frequency to 100KHz to increase
reliability of the i2c bus.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8092340f92144f0cc9096194198f227015bc013.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
fe90ce2368 arm64: zynqmp: Add support for vpk120-revA
Board contains two systems. The primary is Versal VP1202 ACAP device and
the secondary is ZynqMP zu4 which acts as system controller. The patch is
describing only ZynqMP system controller part.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bd8b79d7c6693e90e12bce422f8ed00f2f43c9ae.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
96e98b0264 arm64: zynqmp: Add x-prc-01/02/03/04/05 revA support from SC
Add i2c accessible devices with description.
There is versal specific eeprom and i2c-gpio controller.

SE3 has also clock chip present.

Also remove x-prc description from SC dts.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4f71ec6a63240fd4aaa3453824138281c50d71c3.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:30 +02:00
Michal Simek
46f0408771 arm64: zynqmp: Add support for vck190 revB system controller
There are some changes between revA and revB boards. u39 8T49N240 was
removed and also three ina226 at 42/43/44 addresses (u178/u180/u182).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/461cfe5b2b882365413f90d19efd8abcd6be56ed.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:29 +02:00
Michal Simek
44a56c2679 arm64: zynqmp: Remove xlnx,fclk nodes
xlnx,fclk nodes are not described in dtschema that's why remove them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b25dedd066f587321751d7d20c1f65bb96c53b89.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:29 +02:00
Michal Simek
7771873ab4 arm64: zynqmp: Add support for KD240 Kria SOM CC
Add support for KD240 Kria SOM CC. It is pretty much subset of KR260 board
from PS perspective.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/835f1d1b8982d46b902db69daad64e8445c051e9.1695808407.git.michal.simek@amd.com
2023-10-09 12:12:29 +02:00
Michal Simek
5d80889783 arm64: zynqmp: Aligned QSPI configuration with latest spec
Official DT binding description for dual stacked/paralllel configurations
have been merged that's why switch to it.

Link: https://lore.kernel.org/r/20220126112608.955728-3-miquel.raynal@bootlin.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2912091c231f5e945ee44601c285fe16263448da.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00