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ARM: psci: move GIC address override to Kconfig
As the code to switch an ARM core from secure to the non-secure state needs to know the base address of the Generic Interrupt Controller (GIC), we read an Arm Cortex defined system register that is supposed to hold that base address. However there are SoCs out there that get this wrong, and this CBAR register either reads as 0 or points to the wrong address. To accommodate those systems, so far we use a macro defined in some platform specific header files, for affected boards. To simplify future extensions, replace that macro with a Kconfig variable that holds this override address, and define a default value for SoCs that need it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sam Edwards <CFSworks@gmail.com>
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4 changed files with 14 additions and 7 deletions
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@ -58,6 +58,16 @@ config ARMV7_SECURE_MAX_SIZE
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default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3
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default 0x10000
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config ARM_GIC_BASE_ADDRESS
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hex
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depends on ARMV7_NONSEC
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depends on ARCH_EXYNOS5
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default 0x10480000 if ARCH_EXYNOS5
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help
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Override the GIC base address if the Arm Cortex defined
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CBAR/PERIPHBASE system register holds the wrong value.
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Used by the PSCI code to configure the secure side of the GIC.
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config ARMV7_VIRT
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bool "Enable support for hardware virtualization" if EXPERT
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depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
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@ -112,8 +112,8 @@ ENTRY(_do_nonsec_entry)
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ENDPROC(_do_nonsec_entry)
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.macro get_cbar_addr addr
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#ifdef CFG_ARM_GIC_BASE_ADDRESS
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ldr \addr, =CFG_ARM_GIC_BASE_ADDRESS
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#ifdef CONFIG_ARM_GIC_BASE_ADDRESS
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ldr \addr, =CONFIG_ARM_GIC_BASE_ADDRESS
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#else
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mrc p15, 4, \addr, c15, c0, 0 @ read CBAR
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bfc \addr, #0, #15 @ clear reserved bits
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@ -26,8 +26,8 @@ static unsigned int read_id_pfr1(void)
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static unsigned long get_gicd_base_address(void)
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{
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#ifdef CFG_ARM_GIC_BASE_ADDRESS
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return CFG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET;
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#ifdef CONFIG_ARM_GIC_BASE_ADDRESS
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return CONFIG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET;
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#else
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unsigned periphbase;
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@ -18,7 +18,4 @@
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#define CFG_SMP_PEN_ADDR 0x02020000
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/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
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#define CFG_ARM_GIC_BASE_ADDRESS 0x10480000
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#endif /* __CONFIG_H */
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