Commit graph

4933 commits

Author SHA1 Message Date
Simon Glass
4170dd9ec0 rockchip: Use multiple-images for rk3399
Enable multiple-images so we can generate more than one image. Also
add a comment for the end of the #if block.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:50:01 -07:00
Quentin Schulz
c925be73a0 rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
        * CPU: quad-core Cortex-A35
        * DRAM: 2GB dual-channel
        * eMMC: onboard eMMC
        * SD/MMC
        * TI DP83825I 10/100Mbps PHY
        * USB:
                * USB2.0 dual role port
                * 3x USB2.0 host via onboard USB2.0 hub
        * Display: MIPI-DSI
        * Camera: MIPI-CSI
        * onboard 2.4GHz WiFi + Bluetooth module
        * Companion Controller: on-board additional microcontroller
	  (STM32 Cortex-M0 or ATtiny):
                * RTC
                * fan controller
                * CAN (only STM32)

The non-U-Boot DTS files are imported from Linux v6.2-rc2.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Quentin Schulz
2c9f077064 arm64: dts: rockchip: sync px30 DTSI with Linux kernel v6.1
Sync the px30 dtsi from Linux kernel v6.1.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Peter Robinson
5a42fd0258 rockchip: Add initial support for the PINE64 Pinephone Pro
The Pinephone Pro is another device by PINE64. It's closely related
to the Pinebook Pro of which this initial support is derived from.

Specification:
- A variant of the Rockchip RK3399
- A 6 inch 720*1440 DSI display
- Front and rear cameras
- Type-C interface with alt mode display (DP 1.2) and PD charging
- 4GB LPDDR4 RAM
- 128GB eMMC
- mSD card slot
- An AP6255 module for 802.11ac WiFi and Bluetooth 5
- Quectel EG25-G 4G/LTE modem

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:01:11 +08:00
Peter Robinson
30a6d14a97 arm64: dts: rk3399: Add upstream Pinephone Pro dts
Initial support for the PinePhone Pro has now landed upstream in
Linux 6.1 RC1 so sync the dts from 6.2-rc1 for initial support.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
b8f1ca9540 board: rockchip: Add Edgeble Neu2 IO Board
Neural Compute Module 2(Neu2) IO board is an industrial form factor
IO board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
43e89241f3 ARM: dts: rockchip: Add rv1126-u-boot.dtsi
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.

Both eMMC and SD boot are tested in Edgeble Neu2 SoM.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
0736dad4ed ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) IO
Neural Compute Module 2(Neu2) IO board is an industrial form factor
evaluation board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
d12471c7be ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2)
Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RV1126 from Edgeble AI.

General features:
- Rockchip RV1126
- 2/4GB LPDDR4
- 8/16/32GB eMMC
- 2x MIPI CSI2 FPC connector
- Fn-link 8223A-SR WiFi/BT

Industrial grade (-40 °C to +85 °C) version of the same class of module
called Neu2k powered with Rockchip RV1126K.

Neu2 needs to mount on top of Edgeble IO boards for creating complete
platform solutions.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
2204a8c90a ARM: dts: rockchip: Add Rockchip RV1126 SoC
RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.

It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.

This patch add basic core dtsi support.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
3fc0dee585 ARM: dts: rockchip: Add Rockchip RV1126 pinctrl
Add pinctrl definitions for Rockchip RV1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Quentin Schulz
ccaa55fb6e rockchip: puma-rk3399: sync DTS with Linux kernel next-20221114
This synchronizes the Device Trees related to Puma RK3399 SoM with Linux
kernel next-20221114 to include two important changes pertaining to
eMMC and SD card instability.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Hai Pham
0fe4366c9a ARM: renesas: condor: switch eMMC bus to 1V8
The eMMC card has two supplies, VCC and VCCQ. The VCC supplies the NAND
array and the VCCQ supplies the bus. On Condor, the VCC is connected to
3.3V rail, while the VCCQ is connected to 1.8V rail. Adjust the pinmux
to match the bus, which is always operating in 1.8V mode.

Based on Linux commit 69efe4bbeda50745 ("arm64: dts: renesas: condor:
Switch eMMC bus to 1V8") from Wolfram Sang

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
2023-01-14 14:10:12 +01:00
Marek Vasut
3405cfa29d ARM: dts: renesas: condor: Enable SPI NOR fast-read
This board requires SPI NOR fast-read, otherwise the SPI NOR
access returns corrupted data. Enable the fast-read explicitly
in DT as it has been disabled in the MTD subsystem by commit
d008190920 ("mtd: spi-nor: Mask out fast read if not requested in DT")

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2023-01-14 14:10:12 +01:00
Patrick Delaunay
6e391c7d5f ARM: dts: stm32: Add timer interrupts on stm32mp15
The timer units in the stm32mp15x CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.

Sync the DT Files with linux kernel v6.1 and with commit a9b70102253ce
("ARM: dts: stm32: Add timer interrupts on stm32mp15")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Patrick Delaunay
126aa470d6 ARM: dts: stm32mp15: fix typo in stm32mp15xx-dkx.dtsi
Remove unnecessary space in device tree stm32mp15xx-dkx.dtsi.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Patrick Delaunay
d1d56638c4 ARM: dts: stm32mp15: remove clksrc include in SCMI dtsi file
The include file stm32mp1-clksrc.h is not necessary for the SCMI STM32MP15
dtsi files as the clock tree is not defined in the U-Boot SCMI device tree;
these SCMI device tree only support TFABOOT with stm32mp15_defconfig,
SPL with the basic boot defconfig is not supported.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Fabrice Gasnier
214d6e7e68 ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1
Add support for USB2514B onboard hub on stm32mp157c EV1 board. The HUB
is supplied by a 3v3 PMIC regulator.

[backport from linux ad9591b01d24]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-01-12 16:19:53 +01:00
Fabrice Gasnier
79da4074dd ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1
phy-stm32-usbphyc bindings uses a connector node with vbus-supply
property.

[backport from linux 43e55d778a6b]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:08:43 +01:00
Sjoerd Simons
39248d3260 arm: dts: k3-am625-sk: Enable first ethernet port
The K3 am625 sk EVM has two ethernet ports; Enable the first one for
usage in u-boot.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
2023-01-10 15:39:06 -05:00
Tom Rini
cebdfc22da Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-09 11:30:08 -05:00
Tom Rini
b82f12b642 First set of u-boot-at91 features for the 2023.04 cycle
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Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2023.04 cycle:

This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
2023-01-06 11:53:26 -05:00
Adam Ford
edd9c891d2 arm: dts: rz-g2-beacon-u-boot: Fix QSPI Regression
The QSPI is accessed via the RPC-IF, but the compatible flags
previously used a different name.  This compatibel name was changed
which broke the ability to access the QSPI.  Fix this by removing
the custom naming reference.

Fixes: 68083b897b ("renesas: Fix RPC-IF compatible values")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2023-01-06 08:14:19 -05:00
Fabio Estevam
f8548ce0e0 imx7d-pico: Fix the name of the u-boot.dtsi file
Since commit 2f96d4dd95 ("imx7s/d: synchronise device trees with linux")
the imx7d-pico board no longer boots.

The reason is that prior to the above commit there was an explicit
inclusion of arch/arm/dts/imx7d-pico-u-boot.dtsi inside imx7d-pico.dtsi.

After the syncing with the Linux upstream dtsi, this u-boot.dtsi inclusion
is gone and the board fails to boot.

U-Boot uses the imx7d-pico-pi.dtb file, so rename the u-boot.dtsi to
imx7d-pico-pi-u-boot.dtsi which gets included automatically by U-Boot
standard make logic and makes the board boot again.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-01-06 08:14:19 -05:00
Sergiu Moga
e4ad98d67b ARM: dts: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
Add the pinctrl nodes required by the USB related DT nodes.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
20bc95f8c8 ARM: dts: sama5d2_icp: Add pinctrl nodes for USB related DT nodes
Add the pinctrl subnodes required by the USB related DT nodes.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
3cd06bfa96 ARM: dts: sama7g5ek: Add pinctrl, gpio and phy properties for USB
Add the required pinctrl, gpio and phy properties required by the
USB DT nodes of the sama7g5ek boards. Since these have not yet been
defined in upstream Linux, place them in the U-Boot specific DT file.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
851960e591 ARM: dts: sama7g5: Add USB and UTMI DT nodes
Define the USB and UTMI DT nodes for the sama7g5 SoC's. Since these have
not yet been defined in upstream Linux, place them in the U-Boot specific
DT file.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-05 10:04:57 +02:00
Sergiu Moga
205ecbdccd ARM: dts: sam9x60ek: Add pinctrl and gpio properties for USB
Add the required pinctrl and gpio properties required by the USB DT
nodes of the sam9x60ek boards.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
445ff8bb5a ARM: dts: sam9x60_curiosity: Add pinctrl and gpio properties for USB
Add the required pinctrl and gpio properties needed by the USB DT nodes
of the sam9x60_curiosity boards.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
3631be3ed6 ARM: dts: sam9x60: Add OHCI and EHCI DT nodes
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-05 10:04:57 +02:00
Mihai Sain
ee43b1e744 ARM: dts: at91: sam9x60: add sdhci1 node and pinctrl
Add node for sdhci1 controller and its pinctrl.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2023-01-03 10:58:15 +02:00
Stefan Bosch
c8ba27f760 arm: s5p4418: dm_serial: add uarts to dts
Add S5P4418 UARTs and appropriate pinctrl to dts. Add UART to
s5p4418-nanopi2.dts.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02 16:06:08 -05:00
Dai Okamura
872413bb0a arm: uniphier: use DM_TIMER of arm a9 global timer
All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer
in a simple implementation. Now DM_TIMER of it is available
on 35751c7f3f ("timer: sti: convert sti-timer to arm a9 global timer"),
so let's switch to it.

The old driver reads the lower 32bits of counter field
and sets the prescaler as 50 with PERIPHCLK(=50MHz),
so the global timer works as a 32-bit 1MHz timer.

The DM_TIMER uses the whole 64bits with no prescaler,
so the global timer works as a 64-bit PERIPHCLK timer.

CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency,
if there is no 'clocks' property in devicetree.

Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
2023-01-02 16:01:39 -05:00
Rob Herring
bd8851c5b4 dts: synquacer: Drop unused and undocumented GPIO 'base' property
The 'base' GPIO controller property is unused in u-boot and Linux. It is
also not documented in the binding. So drop it.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-01-02 14:10:23 -05:00
Rob Herring
36ee37632c dts: synquacer: Drop unused and undocumented SPI properties
'active_clk_edges' and 'chipselect_num' SPI controller properties are
unused in u-boot and Linux. They are also not documented in the binding.
So drop them.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-01-02 14:10:23 -05:00
Rob Herring
00723684e4 dts: synquacer: Fix idle-states 'entry-method' value
The correct value for 'entry-method' in the idle-states binding is 'psci',
not 'arm,psci'. It hasn't mattered because it isn't used by the OS.

Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-02 14:05:44 -05:00
Rob Herring
563f238b67 dts: synquacer: Fix "arm, armv7-timer-mem" node address sizes
The "arm,armv7-timer-mem" schema defines the address sizes for child
nodes to be 32-bit as there's no need for 64-bit offsets and sizes of
the child 'frame' nodes.

Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-02 14:05:44 -05:00
Rob Herring
cc891c41f2 dts: synquacer: Use generic node names
DT node names should follow generic names defined in the DT spec. These
are also now checked by dtschema tools.

Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-02 14:05:44 -05:00
Rob Herring
6136c85ed0 dts: synquacer: Drop CPU 'arm,armv8' compatibles
'arm,armv8' compatible is for software models only. so drop it from cpu
nodes.

Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-02 14:05:43 -05:00
Christian Gmeiner
e93efaf9cc arm: dts: ti: k3-am64-mcu: Add pinctrl
Add the definition of the pinctrl for the MCU domain.

Same as kernel commit 500e6dfbb465531150ac6e2ff0856dd357ddc8a4

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-01-02 14:05:43 -05:00
Tom Rini
14f43797d0 Prepare v2023.01-rc4
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Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-21 13:09:01 -05:00
Eugen Hristev
8374617637 ARM: dts: at91: sama5d2: fix wrong interrupt-cells property
The PMC node is not an interrupt provider, so it must not have
interrupt-cells.

This fixes the warning (on newer DTC):
arch/arm/dts/sama5d2.dtsi:82.22-602.6: Warning (interrupt_provider): /ahb/apb/pmc@f0014000: '#interrupt-cells' found, but node is not an interrupt provider

Fixes: 2c4b2dd289 ("ARM: at91/dt: Add device tree for SAMA5D2 Xplained")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-12-20 11:59:07 +02:00
Eugen Hristev
4df35b38d1 ARM: dts: at91: sama7g5/sama7g5ek: align DT with kernel 6.1
Align the DT with current Linux 6.1 tree, wherever possible.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-12-20 11:59:07 +02:00
Michal Suchanek
216928c772 rockchip: Pinebook Pro: Do not initialize i2c before relocation
The i2c locks up when initialized before relocation, and it stays broken
in Linux as well breaking the ability to boot Linux.

The i2c bus and pmic was not actually used in pre-reloc before
commit ad607512f5 ("power: pmic: rk8xx: Support sysreset shutdown method")

The cause is not known.

This is board-specific, other boards that do not add the option to
include the i2c bus in pre-reloc DT are not affected.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Quentin Schulz
c74f6e748b rockchip: puma: fix GPT table corruption when saving U-Boot environment
The GPT table is taking the first 34 sectors, which amounts to 0x4400
bytes. Saving the environment below this address in storage will corrupt
the GPT table.

While technically the table ends at 0x4400, some tools (e.g. bmaptool)
are rounding everything to the logical block size (0x1000), so it is
safer to make it point to 0x5000 so that the environment could still
persist when flashing a sparse image with bmaptool or similar tools.

Obviously, the default 0x4000 environment size does not work anymore, so
let's set it to 0x3000 so it does fill the gap between the GPT table
(rounded to 0x1000) and the start of the idbloader.img.

Fixes: 56f580d3eb ("rockchip: dts: rk3399-puma: put environment (in MMC/SD configurations) before SPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
58eb6675da arm: dts: rockchip: rk3128: fix clocks, compatible and phys
Fix rk3128 clocks, compatible and phys, so that they match the bindings.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
565d77b4c0 arm: dts: rockchip: rk3128: fix DT node names
The rk3128 DT node names should be generic.
Rename them to the pattern defined in the DT bindings.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
b919d43af5 arm: dts: rockchip: move all rk3128 u-boot specific properties in separate dtsi files
Move all rk3128 u-boot specific properties in separate dtsi files.
Sort emmc node.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
c643468849 arm: dts: rockchip: rk3128: bulk convert gpios to their constant counterparts
Bulk convert rk3128 DT gpios to their constant counterparts.

sed -i -f script.sed rk3128.dtsi
sed -i -f script.sed rk3128-evb.dts

================================

/rockchip,pins *=/bcheck
b # to end of script
:append-next-line
N
:check
/^[^;]*$/bappend-next-line
s/<RK_GPIO\([0-9]\) /<\1 /g
s/<\([^ ][^ ]*  *\)0 /<\1RK_PA0 /g
s/<\([^ ][^ ]*  *\)1 /<\1RK_PA1 /g
s/<\([^ ][^ ]*  *\)2 /<\1RK_PA2 /g
s/<\([^ ][^ ]*  *\)3 /<\1RK_PA3 /g
s/<\([^ ][^ ]*  *\)4 /<\1RK_PA4 /g
s/<\([^ ][^ ]*  *\)5 /<\1RK_PA5 /g
s/<\([^ ][^ ]*  *\)6 /<\1RK_PA6 /g
s/<\([^ ][^ ]*  *\)7 /<\1RK_PA7 /g
s/<\([^ ][^ ]*  *\)8 /<\1RK_PB0 /g
s/<\([^ ][^ ]*  *\)9 /<\1RK_PB1 /g
s/<\([^ ][^ ]*  *\)10 /<\1RK_PB2 /g
s/<\([^ ][^ ]*  *\)11 /<\1RK_PB3 /g
s/<\([^ ][^ ]*  *\)12 /<\1RK_PB4 /g
s/<\([^ ][^ ]*  *\)13 /<\1RK_PB5 /g
s/<\([^ ][^ ]*  *\)14 /<\1RK_PB6 /g
s/<\([^ ][^ ]*  *\)15 /<\1RK_PB7 /g
s/<\([^ ][^ ]*  *\)16 /<\1RK_PC0 /g
s/<\([^ ][^ ]*  *\)17 /<\1RK_PC1 /g
s/<\([^ ][^ ]*  *\)18 /<\1RK_PC2 /g
s/<\([^ ][^ ]*  *\)19 /<\1RK_PC3 /g
s/<\([^ ][^ ]*  *\)20 /<\1RK_PC4 /g
s/<\([^ ][^ ]*  *\)21 /<\1RK_PC5 /g
s/<\([^ ][^ ]*  *\)22 /<\1RK_PC6 /g
s/<\([^ ][^ ]*  *\)23 /<\1RK_PC7 /g
s/<\([^ ][^ ]*  *\)24 /<\1RK_PD0 /g
s/<\([^ ][^ ]*  *\)25 /<\1RK_PD1 /g
s/<\([^ ][^ ]*  *\)26 /<\1RK_PD2 /g
s/<\([^ ][^ ]*  *\)27 /<\1RK_PD3 /g
s/<\([^ ][^ ]*  *\)28 /<\1RK_PD4 /g
s/<\([^ ][^ ]*  *\)29 /<\1RK_PD5 /g
s/<\([^ ][^ ]*  *\)30 /<\1RK_PD6 /g
s/<\([^ ][^ ]*  *\)31 /<\1RK_PD7 /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)0 /<\1RK_FUNC_GPIO /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)RK_FUNC_\([1-9]\) /<\1\2 /g

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00