Jon Loeliger
40bc83559d
Removed MPC8641HPCN DTS source file from build.
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It is no longer linked into U-Boot; its sources are
now located in the kernel tree.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-08-09 15:32:16 -05:00
John Traill
8fc8bd2cc4
Add Rapidio support for the MPC8641HPCN
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Signed-off-by: John Traill <john.traill@freescale.com>
2006-08-09 11:20:30 -05:00
John Traill
91a414c7d1
Fix caslat calculation
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Signed-off-by: John Traill <john.traill@freescale.com>
2006-08-09 11:06:25 -05:00
Jon Loeliger
709d3073e7
Convert to mac-address in ethernet nodes.
2006-08-09 09:00:30 -05:00
Haiying Wang
71748af833
Correct the irq value of DUART2
2006-07-31 09:43:08 -05:00
Haiying Wang
9cb3e8816a
Change the space size of PEX IO in README
2006-07-31 09:42:49 -05:00
Haiying Wang
239db37c94
Move get_board_sys_clk to board directory
2006-07-31 09:27:57 -05:00
John Traill
492900b985
Fix 8641HPCN pollution
2006-07-28 09:59:57 -05:00
John Traill
515ab8a62e
Fix 8641HPCN timebase
2006-07-28 09:54:10 -05:00
Zhang Wei
c86360b830
Fixed OF device tree of mpc86xxhpcn board.
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The changes works in with kernel irq mapping rework.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
2006-07-27 15:32:02 -05:00
Haiying Wang
bea3f28d28
Add support for reading and writing mac addresses to or from ID EEPROM.
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Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.
U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).
If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2006-07-13 10:57:37 -05:00
Jin Zhengxiong
fcb28e7634
Fixed initrd issue by define big RAM
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Signed-off-by:Jason Jin <Jason.jin@freescale.com>
2006-07-13 10:35:10 -05:00
Jason Jin
e6cd2a1785
We made a u-boot patch to fix the hang up issue
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when booting filesystem from ramdisk.
Signed-off-by:Jason Jin <Jason.jin@freescale.com>
2006-07-07 10:02:15 -05:00
Jin Zhengxiong
da012ab661
Change Id to symbolic name for RTL8139
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Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2006-06-28 08:43:56 -05:00
Jin Zhengxiong-R64188
bc09cf3c2b
Fix RTL8139 in big endian
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signed-off-by: Jason Jin <Jason.Jin@freescale.com>
signed-off-by: Wei Zhang <wei.zhang@freescale.com>
2006-06-27 10:29:32 -05:00
Jin Zhengxiong-R64188
fcfb9a5794
Fix Tsec bug when no link
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When tftp a non-exist file from the tftp server, u-boot will check
the link of all eth port. The original file will return wrong link
state on the no link ports.
signed-off-by: Jason Jin <Jason.Jin@freescale.com>
2006-06-27 10:00:13 -05:00
Jin Zhengxiong-R64188
bd22c2b975
Fix bug for io_bar size during pci scan
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During the pci scan process, Some devices return bar_reponse with the
highest bytes 0, such as the pci bridge in uli1575 return bar_response
with 0xffffff, So the bar_size should be manually set under 64K.
Signed-off-by: Jason Jin <jason.jin@freescale.com>
2006-06-27 09:18:22 -05:00
Jin Zhengxiong-R64188
fa7db9c377
Enable PCIE1 for MPC8641HPCN board
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Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2006-06-27 09:17:59 -05:00
Jon Loeliger
684623ce92
Fix bug in 8641hpcn reset command with no args.
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Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2006-06-22 08:51:46 -05:00
Zhang Wei
8be429a5dd
Reworked IRQ mapping in OF-tree.
2006-06-22 08:31:21 -05:00
Jon Loeliger
0e4c2a17ca
Do not enable address translation on secondary CPUs.
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Do not set up BATs on secondary CPUs. Let Linux do the nasty.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-06-15 21:45:26 -05:00
Jon Loeliger
8ecc971618
Fix a get_board_sys_clk() use-before-def warning.
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
2006-06-07 10:53:55 -05:00
Jon Loeliger
d9bf4858fc
Allow DTC path to be passed in.
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
2006-06-07 10:52:49 -05:00
Haiying Wang
c83ae9ea6d
Modify the IRQ of DUART2
2006-06-07 08:48:08 -05:00
Jon Loeliger
c934f655f9
Review cleanups.
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 14:01:32 -05:00
Jon Loeliger
cb5965fb95
White space cleanup.
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Some 80-column cleanups.
Convert printf() to puts() where possible.
Use #include "spd_sdram.h" as needed.
Enhanced reset command usage message a bit.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 12:44:44 -05:00
Jon Loeliger
3d5c5be547
Removed unneeded local_bus_init() from 8641HPCN board.
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 11:39:34 -05:00
Jon Loeliger
4d3d729c16
Moved mpc8641hpcn_board_reset() out of cpu/ into board/.
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 11:24:28 -05:00
Jon Loeliger
b2a941de06
Remove dead debug code.
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
2006-05-31 10:07:28 -05:00
Jon Loeliger
126aa70f10
Move mpc86xx PIXIS code to board directory
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First cut at moving the PIXIS platform code out of
the 86xx cpu directory and into board/mpc8641hpcn
where it belongs.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 09:49:33 -05:00
Haiying Wang
38cee12dcf
Improve "reset" command's interaction with watchdog.
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"reset altbank" will reset another bank WITHOUT watch dog timer enabled
"reset altbank wd" will reset another bank WITH watch dog enabled
"diswd" will disable watch dog after u-boot boots up successfully
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2006-05-30 09:10:32 -05:00
Haiying Wang
70205e5a6d
Fix two SDRAM setup bugs.
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Fix ECC setup bug.
Enable 1T/2T based on number of DIMMs present.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2006-05-30 08:51:19 -05:00
Haiying Wang
d11fec5015
Add first draft of the MPC8641HPCN doc/README.
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
2006-05-26 10:24:48 -05:00
Haiying Wang
ed45d6c930
Added pci@8000 block.
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Updated ethernet interrupt mappings (moved up 48).
Cleaned up a few comments.
Signed-off-by: Jon Loeliger <jdl@jdl.com>
2006-05-26 10:13:04 -05:00
Haiying Wang
3033ebb20f
Allow args on reset command.
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Signed-off-by: Jon Loeliger <jdl@jdl.com>
2006-05-26 10:01:16 -05:00
Jon Loeliger
14e37081ff
Change arbitration to round-robin for SMP linux.
2006-05-19 13:54:02 -05:00
Jon Loeliger
9a655876e5
Enable dual DDR controllers and interleaving.
2006-05-19 13:54:02 -05:00
Jon Loeliger
586d1d5abd
Update 86xx address map and LAWBARs.
2006-05-19 13:54:02 -05:00
Jon Loeliger
cccce5d058
Remove L2 Cache invalidate polling.
2006-05-19 13:54:02 -05:00
Jon Loeliger
f35ec68fb0
Enable 2nd CPU and I2C.
2006-05-19 13:54:02 -05:00
Jon Loeliger
bf690dcb51
Update interrupt mapping.
2006-05-15 07:26:56 -05:00
Haiying Wang
6cfea33477
Remove unneeded INIT_RAM_LOCK cache twiddling.
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Correctly tracks r29 as global data pointer now.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2006-05-10 09:38:06 -05:00
Jon Loeliger
d4dd317b58
Remove unnecessary flash.c file.
2006-05-10 09:33:07 -05:00
Jon Loeliger
18b6c8cd8a
Get MPC8641HPCN flash images working.
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Enable the CFI driver.
Remove bogus LAWBAR7 cruft.
Use correct TEXT_BASE, Fixup load script.
Enable SPD EEPROM during DDR setup.
Use generic RFC 1918 IP addresses by default.
2006-05-09 08:23:49 -05:00
Jon Loeliger
5c9efb36a6
Cleanup whitespaces and style issues.
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Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
2006-04-27 10:15:16 -05:00
Jon Loeliger
a2320a6bf8
Revert bad PCI prefetch limit change.
2006-04-27 08:22:39 -05:00
Jon Loeliger
debb7354d1
Initial support for MPC8641 HPCN board.
2006-04-26 17:58:56 -05:00
Detlev Zundel
76544f80e4
Include BC3450 board in configurations in README
2006-04-24 17:52:01 +02:00
dzu@denx.de
6ca24c64a5
Add support for BC3450 board
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Signed-off-by: dzu@denx.de <dzu@denx.de>
2006-04-21 18:30:47 +02:00
dzu@denx.de
56a4a63c10
Added missing nand.c for NC650 board
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Signed-off-by: dzu@denx.de <dzu@eddie.localdomain>
2006-04-19 15:27:11 +02:00