Commit graph

225 commits

Author SHA1 Message Date
Weijie Gao
0eaee027f7 mips: mtmips: add two reference boards for mt7621
The mt7621_rfb board supports integrated giga PHYs plus one external
giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
slots, SDXC and USB.

The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
uses NAND flash and SDXC is not available.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
4bc0104c97 mips: mtmips: add support for MediaTek MT7621 SoC
This patch adds support for MediaTek MT7621 SoC.
All files are dedicated for u-boot.

The default build target is u-boot-mt7621.bin.

The specification of this chip:
https://www.mediatek.com/products/homenetworking/mt7621

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Stefan Roese
f858bcccf4 mips: octeon: mrvl, octeon-nic23.dts: Add ethernet DT support
Add the Octeon ethernet (BGX) and SFP DT nodes to the NIC23 dts file to
enable ethernet support on this board.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
03b5f836b6 mips: octeon: mrvl, octeon-ebb7304.dts: Add ethernet DT support
Add the Octeon ethernet (BGX), SMI and PHY DT nodes to the EBB7304 dts
file to enable ethernet support on this board.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
6a9e294749 mips: octeon: mrvl, cn73xx.dtsi: Add ethernet (BGX) and SMI DT nodes
Add the Octeon ethernet (BGX) and SMI DT node to the dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Rasmus Villemoes
3609e1dc5f dts: automatically build necessary .dtb files
When building for a custom board, it is quite common to maintain a
private branch which include some defconfig and .dts files. But to
hook up those .dts files requires modifying a file "belonging" to
upstream U-Boot, the arch/*/dts/Makefile. Forward-porting that branch
to a newer upstream then often results in a conflict which, while it
is trivial to resolve by hand, makes it harder to have a CI do "try to
build our board against latest upstream".

The .config usually includes information on precisely what .dtb(s) are
needed, so to avoid having to modify the Makefile, simply add the
files in (SPL_)OF_LIST to dtb-y.

A technicality is that (SPL_)OF_LIST is not always defined, so rework
the Kconfig symbols so that (SPL_)OF_LIST is always defined (when
(SPL_)OF_CONTROL), but only prompted for in the cases which used to be
their "depends on".

nios2 and microblaze already have something like this in their
dts/Makefile, and the rationale in commit 41f59f6853 is similar to
the above. So this simply generalizes existing practice. Followup
patches could remove the logic in those two makefiles, just as there's
potential for moving some common boilerplate from all the
arch/*/dts/Makefile files to the new scripts/Makefile.dts.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-09 12:26:12 -07:00
Daniel Schwierzeck
73be5636f4 MIPS: malta: add DT bindings for PCI host controller
Add DT binding for GT64120 and MSC01 PCI controllers. Only
GT64120 is enabled by default to support Qemu. The MSC01 node
will be dynamically enabled by Malta board code dependent
on the plugged core card.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-07-18 20:37:39 +02:00
Aaron Williams
b1d9554e05 mips: octeon: ebb7304: Add support for some I2C devices
This patch adds support for the following I2C devices connected to
I2C bus 0 on the Octeon EBB7304:
- Dallas DS1337 RTC
- TLV EEPROM

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:23:30 +02:00
Aaron Williams
7f0aa48d86 mips: octeon: dts/dtsi: Change UART DT node to use clocks property
We already have a clock driver for MIPS Octeon. This patch changes the
Octeon DT nodes to supply the clock property via the clock driver
instead of using an hard-coded value, which is not correct in all cases.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:22:55 +02:00
Stefan Roese
ec85347102 mips: octeon: Add Octeon III NIC23 board support
This patch adds the basic support for the PCIe target board equipped
with the Octeon III CN2350 SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:22:55 +02:00
Stefan Roese
60c8efac8f mips: octeon: mrvl, cn73xx.dtsi: Add AHCI/SATA DT node
Add the AHCI compatible SATA DT node to the Octeon CN73xx dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:22:55 +02:00
Stefan Roese
827edf1818 mips: octeon: mrvl, cn73xx.dtsi: Add PCIe controller DT node
This patch adds the PCIe controller node to the MIPS Octeon 73xx dtsi
file.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:25 +02:00
Stefan Roese
cfa39fe78b mips: octeon: mrvl,octeon_ebb7304.dts: Add MMC DT node
Add the MMC DT node to the Octeon EBB7304 DT file including the
regulator node for the MMC power supply.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-22 02:47:57 +02:00
Stefan Roese
25869707c1 mips: octeon: mrvl,cn73xx.dtsi: Add MMC DT node
Add the MMC DT node to the Octeon CN73xx dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-22 02:47:57 +02:00
Horatiu Vultur
6b59304602 net: jr2: Reset switch
Make sure to reset the switch core at probe time.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-04-22 02:34:45 +02:00
Weijie Gao
76880b08c4 mips: mtmips: add two reference boards for mt7620
The mt7620_rfb board supports integrated 10/100M PHYs plus two external
giga PHYs. It also has 8MB SPI-NOR, mini PCI-e x1 slot, SDHC and USB.

The mt7620_mt7530_rfb boards supports an external MT7530 giga switch and a
16MB SPI-NOR flash.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
dd4fdc0b14 mips: mtmips: add support for MediaTek MT7620 SoC
This patch adds support for MediaTek MT7620 SoC.
All files are dedicated for u-boot.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
da41a56059 mips: dts: switch to board defines for dtb for mtmips
Previous the dts files for gardena-smart-gateway-mt7688 and
linkit-smart-7688 are set to be built when mtmips is selected.

This can lead to a compilation error if another soc is added to this arch
with different dtsi files.

So it's better to build the dtb only if their board is selected.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Sean Anderson
237e5880f8 spi: dw: Add SoC-specific compatible strings
This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented device versions include MSCC SoCs, and Arc Socs. All
compatible strings except those for SoCFPGAs and some of the versioned
strings have been taken from Linux.

Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly
necessary. However, it is a good cleanup and brings things closer to Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Stefan Roese
d25d2db847 mips: octeon: Add USB DT nodes
Add the USB device tree nodes to the Octeon dts/dtsi files.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-10-07 20:25:57 +02:00
Stefan Roese
a23c279059 mips: octeon: dts: mrvl, cn73xx.dtsi: Add memory controller DT node
This patch adds the memory controller (LMC) DT node to the Octeon 3 dtsi
file. It also adds the L2C DT node, as this is referenced by the DDR
driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-10-07 20:25:56 +02:00
Mauro Condarelli
7d1538cc9b mips: vocore2: fix various issues
- fix SPL image generation
- fix incorrect console output
- increase malloc_f and malloc_r space to fix LZMA decompression errors
- increase SPI flash clock

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
[squashed to one patch, fix commit subject and description]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-09-23 00:14:56 +02:00
John Robertson
bd25f9a69f mips: dts: Fix PIC32MZDA GPIO register definitions
The GPIO bank name for banks J and K are not correct when using the
'gpio' command from the console.

The driver derives the bank name from the device tree instance string by
using the instance value and adding 'A': gpio0@xxaddrxx is Bank A,
gpio1@yyaddryy is Bank B and so on.

On the PIC32, there is no Bank I so instances 8 and 9 need to be
incremented as a minimum change.

An alternative (less opaque) implementation would be to use a bank-name
property instead but this would require modifying the driver code too.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:29 +02:00
John Robertson
81b543a4e6 mips: dts: Fix PIC32MZDA GPIO register definitions
GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or
using the 'gpio' command from the console.

The root cause is a discrepancy between the driver and the device tree:
the driver code expects an absolute I/O address in the <reg> property,
while the device tree defines the address relative to a declaration in
the parent pinctrl node.

Changing the device tree to fix a driver issue would normally be wrong,
however:
- I have run the first version of U-Boot in which this driver appears
  (v2016.03) and the same problem exists, so this is not a regression;
- There is no code that references a parent device tree node that might
  suggest the intent of the author was to parse the DT as it exists now;
- The equivalent Linux PIC32 GPIO driver also uses absolute addresses
  for the GPIO <reg> property. This change brings the U-Boot DT more
  into line with Linux.

Additionally, the data sheet (Microchip ref. 60001361H) shows that the
register set to control a GPIO bank spans 0xE0 bytes, but the device
tree specified size is only 0x48 bytes.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
0723c2ddeb mips: dts: Fix device tree warnings for PIC32MZDA
Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
69af033fb9 mips: pic32mzdask: disable SDHCI SDCD signal workaround
The PIC32MZ DA Starter Kit does not need the card detect workaround
because the SDCD signal line is connected properly. Disable the
workaround in this case.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:14 +02:00
Stefan Roese
9044ed2c68 mips: octeon: mrvl, octeon-ebb7304.dts: Add SPI flash DT node
Add the SPI flash DT node for the EBB7304.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:14:48 +02:00
Stefan Roese
1032491904 mips: octeon: mrvl,cn73xx.dtsi: Add SPI DT node
Add the Octeon SPI DT node to the dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:14:48 +02:00
Stefan Roese
a078c65172 mips: octeon: dts: Add Octeon clock driver DT nodes
This patch adds the DT nodes for the Octeon clock support via the
common clk_ API.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:11:41 +02:00
Stefan Roese
7ab932825d mips: octeon: dts: Add I2C DT nodes
Add I2C DT nodes to the Octeon dts / dtsi files.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:11:41 +02:00
Stefan Roese
fad5ec5ecd mips: octeon: mrvl,cn73xx.dtsi: Add GPIO DT nodes
Add the Octeon GPIO DT node to the dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-03 21:11:41 +02:00
Stefan Roese
5fef24c912 mips: octeon: Add minimal Octeon 3 EBB7304 EVK support
This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on this board.

Supported devices:
- UART
- reset
- CFI parallel NOR flash

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 15:47:50 +02:00
Stefan Roese
ff7e4f030b mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file
This patch adds the base dtsi file for the Octeon 3 cn73xx SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 15:47:50 +02:00
Mauro Condarelli
3fd0231432 mips: Add support for SoM "VoCore2".
Small patch to add support for VoCore/VoCore2 board.

VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.

Details about this SoM can be found at "https://vocore.io/v2.html".

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-27 20:30:14 +02:00
Weijie Gao
6bd888b63b mips: mtmips: add support for mt7628-rfb
This patch adds support for mt7628 reference board. SPL_DM and DT are not
enabled for SPL to save about 17KiB for u-boot-spl.bin.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
7a4b6964b5 mips: mtmips: add SPL support
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.

The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.

A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.

A spl loader is added to support uncompress the payload.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:12 +02:00
Weijie Gao
df3bad96f3 dts: mtmips: add alternative pinmux node for uart2
This patch adds a new pinmux for UART2, which shares the pins with SPIS.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
c366a45649 mips: mtmips: make use of sysreset-resetctrl for mt7628 soc
This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
4e2ccca26d dts: mtmips: add default pinctrl to eth nodes for all boards
This patch adds default eth pinctrl for all boards.

There are two pinctrl nodes used for two scenarios:
ephy_iot_mode    - for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
ef55fa03d4 dts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688
This adds default pinctrl (dual SPI chip select) for gardena smart gateway

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
e3b326fee5 dts: mtmips: add mmc related nodes for mt7628an.dtsi
This patch adds mmc related nodes for mt7628an.dtsi

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
cff0b044d2 dts: mtmips: enable eth port0 led and link poll functions for all boards
This patch adds default p0led status and phy0 link polling for all boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
6658ebc96a dts: mtmips: update reset controller node for mt7628
This patch updates reset controller node for mt7628

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
123ffd4679 dts: mtmips: add default pinctrl for uart nodes
This patch adds default pinctrl for uart nodes

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
fdf92df285 dts: mtmips: add pinctrl node for mt7628
This patch adds pinctrl node with default pin state for mt7628an.dtsi.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
2d767a7497 dts: mtmips: add clock node for mt7628
This patch adds clkctrl node for mt7628 and adds clocks property for
some node.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
5fcea8d3f9 dts: mtmips: enable high-speed UART support for mt7628
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.

Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
d1d8814458 dts: mtmips: move uart property clock-frequency into mt7628an.dtsi
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Álvaro Fernández Rojas
a69bae04fd mips: bmips: switch to board defines for dtb
Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
f923c758e0 bmips: correct name characters
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00