Commit graph

2276 commits

Author SHA1 Message Date
Masahiro Yamada
30088b0997 ARM: socfpga: move SoC headers to mach-socfpga/include/mach
Move headers to mach-socfpga as well.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-07 05:21:15 +02:00
Tom Rini
1131d4e22c Merge git://git.denx.de/u-boot-marvell 2015-05-05 10:32:08 -04:00
Stefan Roese
8cb7872230 arm: armada-xp: Move SoC headers to mach-mvebu/include/mach
Move arch/arm/include/asm/arch-armada-xp/*
     -> arch/arm/mach-mvebu/include/mach/*

Additionally the SYS_SOC is renamed from "armada-xp" to "mvebu". With this
change all these files can better be shared with other, newer Mavell
MVEBU SoC's. Like the upcoming Armada 38x support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00
Tom Rini
3f2f1a0039 Merge branch 'master' of git://git.denx.de/u-boot-arm 2015-05-05 07:00:11 -04:00
Albert ARIBAUD
b939689c7b Merge branch 'u-boot/master' into 'u-boot-arm/master' 2015-05-05 10:09:06 +02:00
Hans de Goede
e13afeef6f sunxi: usb: Do not call phy_probe from hcd code
The 2/3 usb-phys on the sunxi SoCs are really a single separate functional
block, and are modelled as such in devicetree. So once we've moved all the
sunxi usb code to the driver-model then phy_probe will be called once
for the entire block from the driver-model enumeration code.

Move to this now as this also avoids problems with phy_probe being called
multiple times once we introduce ohci support. This also allows us to get rid
of the sunxi_usb_phy_enabled_count variable as phy_probe now is guaranteed
to be called only once.

Since we're effectively rewriting the probe / remove functions, move them
to the end of the file while we are at it, as that is the most logical place
for them.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:55 +02:00
Hans de Goede
2aacc4239c sunxi: usb: Rename the usbc.? files to usb_phy.?
The usbc.? files now only contain usb-phy related code, rename them to make
this clear.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:55 +02:00
Hans de Goede
7b798658b2 sunxi: usb: Rename sunxi_usbc_foo functions to sunxi_usb_phy_bar
Rename the sunxi_usbc_foo functions to sunxi_usb_phy_bar to make it clear
that these are usb-phy functions. Also change the verbs & nouns in the suffix
to match the verbs & nouns used in the Linux kernels generic phy framework.

This patch purely renames things, it contains no functional changes.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:55 +02:00
Hans de Goede
a781c97aaa sunxi: usb: Remove sunxi_usbc_get_io_base function
This is the only function left in sunxi/usbc.c which is not phy related,
so remove it.

This is a preparation patch for turning the usbc.c code into a proper
usb phy driver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:54 +02:00
Hans de Goede
421b32b880 sunxi: axp: Remove non driver-model support from the axp gpio code
Now that all sunxi boards are using driver-model for gpio (*), we can remove
the non driver-model support from the axp gpio code, and the glue to call
into the axp gpio code from the sunxi_gpio non driver-model code.

*) For the regular u-boot build, SPL still uses non driver-model gpio for
now, but the SPL never uses axp gpios support and we were already not building
axp-gpio support for the SPL.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:54 +02:00
Hans de Goede
aab096401c sunxi: gmac: Move sunxi_gmac_initialize proto out of netdev.h
netdev.h should not be included in driver-model enabled builds (doing so
causes compiler warnings about struct eth_driver not being declared), but
we do use sunxi_gmac_initialize in the driver-model case, so move it out of
netdev.h .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:53 +02:00
Hans de Goede
f9b7a04bc8 sunxi: axp: Add driver-model support to the axp_gpio code
Add driver-model support to the axp_gpio code, note that this needs a small
tweak to the driver-model version of sunxi_name_to_gpio to deal with the
vbus detect and enable pins which are not standard numbered gpios.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:53 +02:00
Hans de Goede
2fcf033d36 sunxi: axp: Move axp gpio code to a separate axpi-gpio driver
Move the axp-gpio code out of the drivers/power/axp*.c code, and into
a new separate axpi-gpio driver.

This change drops supports for the gpio3 pin on the axp209, as that requires
special handling, and no boards are using it.

Besides cleaning things up by moving the code to a separate driver, as
a bonus this change also adds support for the (non vusb) gpio pins on the
axp221 and the gpio pins on the axp152.

The new axp-gpio driver gets its own Kconfig option, and is only enabled
on boards which need it. Besides that it only gets enabled in the regular
u-boot build and not for the SPL as we never need it in the SPL.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:53 +02:00
Hans de Goede
1d624a4f08 sunxi: axp: Move axp pmic register helpers to a separate file
Move the register helpers used to access the registers via p2wi resp.
rsb bus on the otherwise identical axp221 and axp223 pmics to a separate
file, so that they can be used by the upcoming standalone axp gpio driver
too.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:53 +02:00
Vishnu Patekar
ffc0ae0c70 sunxi: Add a33 dram init code
Based on Allwinner dram init code from the a33 bsp:
https://github.com/allwinner-zh/bootloader/blob/master/basic_loader/bsp/bsp_for_a33/init_dram/mctl_hal.c

Initial u-boot port by Vishnu Patekar, major cleanup / rewrite by
Hans de Goede.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:51 +02:00
Hans de Goede
886a7b45ef sunxi: Add support for A33 PLL11 (second DRAM pll)
Add support for the new second DRAM PLL found on the A33 SoC.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:51 +02:00
Hans de Goede
5e6bacdb84 sunxi: s/sun8i/sun8i_a23/
This is a preparation patch for adding A33 support, which will have a
mach name of sun8i-a33.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:51 +02:00
Hans de Goede
44d8ae5b69 sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool
sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i
have a various things in common, like having separate ahb reset control
registers, the SID living inside the pmic, custom pmic busses, new style
watchdog, etc.

This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be
used to check for these features avoiding the need for an ever growing list
of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more
"new style" sunxi SoCs.

Note that this commit changes the behavior of the gmac and hdmi code for
sun8i and the upcoming sun9i devices. This does not matter as sun8i does
not have gmac nor hdmi, and sun9i has new hardware-blocks for these so
the old code will not work there.

Also this is intentional as if a sun8i / sun9i variant which does use the
old hwblocks shows up then the GEN_SUN6I code paths will be the right ones
to use.

For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-05-04 16:51:51 +02:00
Tom Rini
ace97d2617 Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze 2015-04-29 06:46:33 -04:00
Masahiro Yamada
9b9c6516b0 ARM: zynq: move SoC headers to mach-zynq/include/mach
Move arch/arm/include/asm/arch-zynq/*
  -> arch/arm/mach-zynq/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:05 +02:00
Michal Simek
31137acb27 zynqmp: Enable SDHCI0 options
Enable SDHCI0 for zynqmp.
Add empty gpio.h because of sdhci requirement.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:04 +02:00
Siva Durga Prasad Paladugu
48d7260d19 zynqmp: Add SPI driver support for ZynqMP
Added the SPI driver support for ZynqMP
The controller is same as zynq SPI controller

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-04-29 11:19:04 +02:00
Siva Durga Prasad Paladugu
2594e03c64 zynqmp: i2c: Enable i2c driver for zynqMP
Enable the i2c driver for ZynqMP
Also enable the eeprom for read and writes
to eeprom on ZynqMP
ZynqMP uses the same i2c controller as in Zynq

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:04 +02:00
Michal Simek
39c56f55be zynqmp: Add support for EMMC bootmode
Add support for EMMC bootmode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:04 +02:00
Michal Simek
16247d28d5 zynqmp: Add support for emulation platform - Veloce
Add support for Veloce - zynqmp emulation platform.
Platform doesn't support SDHCI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:03 +02:00
Michal Simek
5cb2420037 zynqmp: Add support for R5 sw loading
Add support for loading sw for R5 with enabling for zynqmp.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-04-29 11:19:03 +02:00
Andrea Scian
d37c6288a6 gpio: add Xilinx Zynq PS GPIO driver
Most of the code is taken (and adapted) from Linux kernel driver.

Just add CONFIG_ZYNQ_GPIO to you config to enable it

Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 10:41:24 +02:00
Tom Rini
536266231a Merge branch 'master' of git://www.denx.de/git/u-boot-socfpga 2015-04-28 20:48:43 -04:00
Tom Rini
e536ab8849 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-04-28 12:15:13 -04:00
Tom Rini
3f6dcdb9cd Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-04-24 13:43:24 -04:00
Yangbo Lu
8b06460e55 ls2085a: esdhc: Add esdhc support for ls2085a
This patch adds esdhc support for ls2085a.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 16:46:51 -07:00
Scott Wood
b2d5ac5985 armv8/ls2085aqds: NAND boot support
This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.

Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 16:46:50 -07:00
Sanchayan Maity
a94bb7a42c usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
This driver adds support for the USB peripheral on Freescale Vybrid
SoC's.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:09 -04:00
Sanchayan Maity
e7b860fa4d ARM: vf610: Initial integration for Colibri VF50/VF61
This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.

- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
  - for VF50, use PLL2 as memory clock (synchronous mode)
  - for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default

Tested on Colibri VF50/VF61 booting using serial loader over UART.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-23 14:56:09 -04:00
Sanchayan Maity
1db503c4b9 ARM: vf610: Add SoC and CPU type detection
Vybrid product family consists of several rather similar SoC which
can be determined by softare during boot time. This allows use of
variable ${soc} for Linux device tree files. Detect VF5xx CPU's by
reading the CPU count register. We can determine the second number
of the CPU type (VF6x0) which indicates the presence of a L2 cache.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:08 -04:00
Stefan Agner
8b4f9afac0 ARM: vf610: Enable external 32KHz oscillator
Enable the SCSC (Slow Clock Source Controller) and select the external
32KHz oscillator. This improves the accuracy of the RTC.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:08 -04:00
Sanchayan Maity
c7ea243cc0 ARM: vf610: Move DDR3 initialization to imx-common
In order to avoid code duplication, move the DDR3 initialization to the
common place under imx-common. Currently ROW_DIFF and COL_DIFF can be
chosen from the board file. The JEDEC timings are specified using a
common ddr3_jedec_timings structure.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:08 -04:00
Bryan De Faria
23f2f4329d arm: am437x: mux: Update mux names
Correct and complete the mux names following AM437x Technical Reference Manual.

Signed-off-by: Bryan De Faria <bdefaria-ext@adeneo-embedded.com>
2015-04-23 14:56:07 -04:00
Dileep Katta
f12467d1a5 ARM: DRA7: Set serial number environment variable
This patch populates serial number environment variable from
die_id_0 and die_id_1 register values for DRA7xx boards.

The function is added in omap common code so that this can be re-used.

Serial# environment variable will be useful to show correct
information in "fastboot devices" commands.

Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c

Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-23 13:59:19 -04:00
Peter Howard
a868e44333 davinci: add support for omapl138-lcdk board
Signed-off-by: Peter Howard <phoward@gme.net.au>
[trini: Add config file, update for ..._ether_addr() -> ..._ethaddr() rename]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-04-23 13:58:43 -04:00
Prabhakar Kushwaha
9cc2c4713a driver/ldpaa: Add support of WRIOP static data structure
Wire rate IO Processor (WRIOP) provide support of receive and transmit
ethernet frames from the ethernet MAC.  Here Each WRIOP block supports
upto 64 DPMACs.

Create a house keeping data structure to support upto 16 DPMACs and
store external phy related information.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:58 -07:00
Shaohui Xie
cd348efa6c net/memac_phy: reuse driver for little endian SoCs
The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:57 -07:00
Minghuan Lian
31d34c6c4b armv8: Add SerDes framework for Layerscape Architecture
Add support of SerDes framework for Layerscape Architecture.
    - Add support of 2 SerDes block
    - Add SerDes protocol parsing and detection
    - Create table of SerDes protocol supported by LS2085A

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:57 -07:00
Scott Wood
d746fef406 armv8/ls2085a: Add workaround for USB erratum A-008751
Without this "USB may not work" according to the erratum text, though I
did not notice a problem without it.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:56 -07:00
Scott Wood
b991b981e0 fsl-lsch3: Introduce place for common early SoC init
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:56 -07:00
Scott Wood
07c6600068 armv8/fsl-lsch3: Set nodes in DVM domain
This is required for TLB invalidation broadcasts to work.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:55 -07:00
Prabhakar Kushwaha
f3f8c564a1 armv8/ls2085a: Update common header file
ls2085a_common.h contains hard-coded information for NOR/NAND flash,
I2C, DDR, etc. These are platform specific. Move them out of common
header file and placed into respective board header files.

Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector
size.

Enable command auto complete. Update prompt symbol. Set fdt_high to
0xa0000000 because Linux requires that the fdt  be 8-byte aligned
and below 512 MiB. Besides ensuring compliance with the 512 MiB
limit, this avoids problems with the dtb being misaligned within
the FIT image.

Change the MC FW, MC DPL and Debug server NOR addresses in compliance
with the NOR flash layouts for 128MB flash.

Add PCIe macros. Enable "loadb" command. Disable debug server.
Enable workaround for erratum A008511.
Stop reset on panic for postmortem debugging.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:54 -07:00
York Sun
060ef09460 armv8/fsl-lsch3: Implement workaround for erratum A008585
Generic Timer may contain an erroneous value. The workaround is to
read it twice until getting the same value.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:54 -07:00
Prabhakar Kushwaha
c517771ae7 driver/ldpaa_eth: Add LDPAA Ethernet driver
LDPAA Ethernet driver is a freescale's new ethernet driver based on
Layerscape architecture.

Every ethernet driver controls on DPNI object. Where all DPNIs share
one common DPBP and DPIO object to support  Rx and Tx flows.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Cristian Sovaiala <cristian.sovaiala@freescale.com>
CC: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
CC: J. German Rivera <German.Rivera@freescale.com>
[York Sun: s/NetReceive/net_process_received_packet]
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:17 -07:00
Masahiro Yamada
526fcc2203 ARM: ARM720t: remove empty asm/arch/hardware.h
arch/arm/cpu/arm720t/start.S includes <asm/arch/hardware.h>,
but the hardware.h headers of ARM720T boards are all empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
2015-04-23 08:52:27 -04:00
rev13@wp.pl
eaaa4f7e0e ARMv7M: Add STM32F4 support
Signed-off-by: Kamil Lulko <rev13@wp.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-22 12:14:55 -04:00
rev13@wp.pl
12d8a72913 ARM: Add ARMv7-M support
Signed-off-by: Kamil Lulko <rev13@wp.pl>
2015-04-22 12:14:55 -04:00
Tim Harvey
78c5a18087 arm: mx6: ddr: add pd_fast_exit flag to system information
DDR3 has a special Precharge power-down mode: fast-exit vs slow-exit.

In slow-exit mode the DLL is off but in some quiescent state that makes it easy
to turn on again in tXPDLL cycles (about 10tCK) vs the full tDLLK (512tCK).
In fast-exist mode the DLL is maintained such that it is ready again in about
3tCK.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-04-22 14:35:35 +02:00
Prabhakar Kushwaha
a2a55e518f driver/fsl-mc: Add support of MC Flibs
Freescale's Layerscape Management Complex (MC) provide support various
objects like DPRC, DPNI, DPBP and DPIO.
Where:
	DPRC: Place holdes for other MC objectes like DPNI, DPBP, DPIO
	DPBP: Management of buffer pool
	DPIO: Used for used to QBMan portal
	DPNI: Represents standard network interface

These objects are used for DPAA ethernet drivers.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:27:35 -07:00
Bhupesh Sharma
422cb08acb armv8/fsl-lsch3: Add Freescale Debug Server driver
The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:

MC DDR region start = Top of DDR - area reserved by Debug Server FW

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:26:29 -07:00
Zhao Qiang
ae42eb035e QE/DeepSleep: add QE deepsleep support for mpc85xx
Muram will power off during deepsleep, and the microcode of qe
in muram will be lost, it should be reload when resume.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:19:19 -07:00
Minghuan Lian
d42bd3453a pci/layerscape: remove unnecessary pcie_layerscape.h
The patch uses the common function name ft_pci_setup to replace
ft_pcie_setup, then removes unnecessary pcie_layerscape.h because
all the functions have been declared in common.h.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:19:19 -07:00
gaurav rana
98cb0efde8 Add bootscript support to esbc_validate.
1. Default environment will be used for secure boot flow
 which can't be edited or saved.
2. Command for secure boot is predefined in the default
 environment which will run on autoboot (and autoboot is
 the only option allowed in case of secure boot) and it
 looks like this:
 #define CONFIG_SECBOOT \
 "setenv bs_hdraddr 0xe8e00000;"                 \
 "esbc_validate $bs_hdraddr;"                    \
 "source $img_addr;"                             \
 "esbc_halt;"
 #endif
3. Boot Script can contain esbc_validate commands and bootm command.
 Uboot source command used in default secure boot command will
 run the bootscript.
4. Command esbc_halt added to ensure either bootm executes
 after validation of images or core should just spin.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:19:19 -07:00
Alison Wang
036f3f3379 arm/ls102xa:Add support of conditional workaround implementation as per SoC ver
For LS102xA, some workarounds are only used in VER1.0, so silicon
version detection are added for QDS and TWR boards.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:19:19 -07:00
Marek Vasut
b284d268af arm: socfpga: spl: Add stub sdram.h
Since the SoCFPGA SDRAM support is not yet applied to u-boot, we still
need to be able to compile the codebase. Introduce stub functions which
temporarily supplement the missing SDRAM setup functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
2015-04-21 12:37:12 +02:00
Dinh Nguyen
08e463ee8a arm: socfpga: spl: allow bootrom to enable IOs after warm reset
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
2015-04-21 12:23:16 +02:00
Dinh Nguyen
c218f85ea1 arm: socfpga: add functions to bring sdram, timer, and uart out of reset
These functions will be needed for use by the SPL for enabling the
console and sdram initialization.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2015-04-21 12:23:16 +02:00
Heiko Schocher
cb9f8e6a73 video, ipu: make ldb clock frequency overwritable through board code
the ldb clock can be setup in board code (for example set through PLL5).
Update the ldb_clock rate also through board code.

This should be removed, if a clock framework is availiable.

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
2015-04-20 09:36:59 +02:00
Tom Rini
20913018fb Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-04-16 12:51:23 -04:00
Bryan Brinsko
97840b5d1f ARMv7 TLB: Fixed TTBR0 and Table Descriptors to allow caching
The TTBR0 register and Table Descriptors of the ARMv7 TLB weren't being
properly set to allow for the configuration specified caching modes to
be active over DRAM. This commit fixes those issues.

Signed-off-by: Bryan Brinsko <bryan.brinsko@rockwellcollins.com>
2015-04-16 14:59:33 +02:00
Valentine Barshak
9ba379ade7 ARM: cpu: Add ARMv7 barrier operations support
This enables ARMv7 barrier operations support when
march=armv7-a is enabled.

Using CP15 barriers causes U-Boot bootm command crash when
transferring control to the loaded image on Renesas R8A7794 Cortex A7 CPU.
Using ARMv7 barrier operations instead of the deprecated CP15 barriers
helps to avoid these issues.

Signed-off-by: Valentine Barshak <valentine.barshak+renesas@cogentembedded.com>
Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2015-04-16 13:53:26 +02:00
David Feng
148822d546 Armv8: Initializing CNTVOFF_EL2
Linux-arm64 require that CNTVOFF_EL2 should be programmed with
a consistent value on all cpus. Initializing CNTVOFF_EL2 at state
transition instead of start.S could prevent potential different value
on cpus if ATF exist and u-boot runs at only one cpu.

Signed-off-by: David Feng <fenghua@phytium.com.cn>
2015-04-16 11:27:15 +02:00
Vitaly Andrianov
81e9fe5a29 arm: implement find_next_zero_bit function
This commit copies implementation of the find_next_zero_bit() from
git://git.denx.de/u-boot.git/arch/mips/include/asm/bitops.h. v2014.07

The function is required to enable MCAST_TFTP support for ARM platforms.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
2015-04-16 09:31:14 +02:00
Paul Kocialkowski
6c739c5d8a sunxi: Complete i2c support for each supported platform
Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms
even have up to 5. This adds support for every controller on each supported
platform, which is especially useful when using expansion ports on single-board-
computers.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-04-15 16:33:17 +02:00
Paul Kocialkowski
dd82242b4d i2c: mvtwsi: Support for up to 4 different controllers
Orion5x, Kirkwood and Armada XP platforms come with a single TWSI (I2C) MVTWSI
controller. However, other platforms using MVTWSI may come with more: this is
the case on Allwinner (sunxi) platforms, where up to 4 controllers can be found
on the same chip.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-04-15 16:33:17 +02:00
Paul Kocialkowski
8deacca975 sunxi: Complete mmc pin mux for each supported platform, configured with Kconfig
Sunxi platforms have different possible mmc pin mux setups (except for mmc0),
which are different across platforms.

This lets users configure which is used through the CONFIG_MMC*_PINS Kconfig
options. This is especially relevant when a second (in addition to mmc0) port
is used and CONFIG_MMC_SUNXI_SLOT_EXTRA is enabled.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-04-15 16:17:17 +02:00
Paul Kocialkowski
487b3277d4 sunxi: GPIO pin mux hardware-feature-specific function index defines
Each hardware feature exposed through the GPIO pin mux is usually using the same
function index (for a given port), so there is no need to define one value per
pin: one value per hardware feature per port is sufficient, avoids duplication
and makes everything easier to understand.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-04-15 16:17:17 +02:00
Paul Kocialkowski
ebd468b2d2 sunxi: common VBUS detection logic in usbc
VBUS detection could be needed not only by the musb code (to prevent host mode),
but also by e.g. gadget drivers to start only when a cable is connected.

In addition, this allows more flexibility in vbus detection, as it could easily
be extended to other USBC indexes. Eventually, this would help making musb
support independent from a hardcoded USB controller index (0).

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-04-15 16:17:17 +02:00
Paul Kocialkowski
f7c7ab636a power: axp221: Virtual VBUS detect and enable GPIOs to replace separate logic
This converts the VBUS detection and enable logic to GPIO instead of separate
axp functions and checks that have to be used aside usual GPIO functions.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-04-15 16:17:17 +02:00
Paul Kocialkowski
991963bce9 sunxi: gpio: Indentation fix
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-04-15 16:17:17 +02:00
Kishon Vijay Abraham I
9f81eb77ea board: ti: AM43xx: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in am43xx board file that
can be invoked by various gadget drivers.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:11 +02:00
Kishon Vijay Abraham I
a17188c1c2 board: ti: DRA7: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in dra7xx board file that
can be invoked by various gadget drivers.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:11 +02:00
Kishon Vijay Abraham I
72e7c32fe4 include: asm: types: add resource_size_t type
Added resource_size_t type in order to get rid of the following
compilation error whiel building dwc3 gadget.
include/linux/ioport.h:19:2: error: unknown type name ‘resource_size_t’

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:09 +02:00
Kishon Vijay Abraham I
2f06693567 arm: asm: dma-mapping: added dma_free_coherent API
Added dma_free_coherent corresponding to the dma_alloc_coherent in
dma-mapping.h in order to free memory allocated using dma_alloc_coherent.
This API is used in dwc3 driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:09 +02:00
Kishon Vijay Abraham I
aecbf87965 include: asm: dma-mapping: get rid of the compilation warning in udc-core
Fixed the following warning here.
"warning: ‘dma_alloc_coherent’ defined but not used" while compiling
udc-core

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:08 +02:00
Kishon Vijay Abraham I
fc2f15d2f7 ARM: AM43xx: Enable clocks for USB OTGSS and USB PHY
Enabled clocks for dwc3 controller and USB PHY present in AM43xx.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:08 +02:00
Kishon Vijay Abraham I
d3cfcb3e2c ARM: DRA7: Enable clocks for USB OTGSS and USB PHY
Enabled clocks for dwc3 controller and USB PHY present in DRA7.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:08 +02:00
Pavel Machek
a6a4c542d3 break build if it would produce broken binary
Add an error in known-bad case so that we don't produce broken and
hard to debug binaries.

Signed-off-by: Pavel Machek <pavel@denx.de>
2015-04-13 10:52:51 -04:00
Albert ARIBAUD \(3ADEV\)
412ae53aad lpc32xx: add support for board work_92105
Work_92105 from Work Microwave is an LPC3250-
based board with the following features:
- 64MB or 128MB SDR DRAM
- 1 GB SLC NAND, managed through MLC controller.
- Ethernet
- Ethernet + PHY SMSC8710
- I2C:
  - EEPROM (24M01-compatible)
  - RTC (DS1374-compatible)
  - Temperature sensor (DS620)
  - DACs (2 x MAX518)
- SPI (through SSP interface)
  - Port expander MAX6957
- LCD display (HD44780-compatible), controlled
  through the port expander and DACs

This board has SPL support, and uses the LPC32XX boot
image format.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:39 +02:00
Albert ARIBAUD \(3ADEV\)
981219eebe lpc32xx: add LPC32xx SSP support (SPI mode)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:20 +02:00
Albert ARIBAUD \(3ADEV\)
606f704760 lpc32xx: add GPIO support
This driver only supports Driver Model, not legacy model.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:09 +02:00
Albert ARIBAUD \(3ADEV\)
5e862b9539 lpc32xx: i2c: add LPC32xx I2C interface support
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:07 +02:00
Albert ARIBAUD \(3ADEV\)
c8381bf435 lpc32xx: mtd: nand: add MLC NAND controller
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.

The SPL framework is supported.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:22:56 +02:00
Albert ARIBAUD \(3ADEV\)
ac2916a224 lpc32xx: add Ethernet support
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:22:48 +02:00
Ajay Kumar
70b4fb660d arm: exynos: add display clocks for Exynos5800
Add get_lcd_clk and set_lcd_clk callbacks for Exynos5800 needed by
exynos video driver.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:40 +09:00
Tom Rini
692e5c4e7e Merge branch 'master' of git://git.denx.de/u-boot-tegra
Conflicts:
	board/armltd/vexpress64/vexpress64.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-04-03 09:14:38 -04:00
Marcel Ziswiler
1ed056e84d ARM: tegra: fix colibri_t20 machine type
A while ago I got Russell to change the machine type of our Colibri T20
from COLIBRI_TEGRA2 to COLIBRI_T20 which at least in parts is also
reflected in his machine registry:

http://www.arm.linux.org.uk/developer/machines/list.php?id=3323

For us it is really very beneficial to actually still be able to boot
downstream L4T kernel with its working hardware accelerated
graphics/multimedia stack albeit it being proprietary/closed-source.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Stephen Warren
89d9437356 ARM: tegra: enable MIPI PAD CTRL support for Tegra124
This allows selection between CSI and DSI_B on the MIPI pads.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Stephen Warren
5ee7ec7baf ARM: tegra: pinctrl: add support for MIPI PAD control groups
Some pinmux controls are in a different register set. Add support for
manipulating those in a similar way to existing pins/groups.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Stephen Warren
c21478bc6e ARM: tegra: pinctrl: minor cleanup
Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable
declaration together with other pin/mux level definitions. Now the whole
file is grouped/ordered pin/mux-related then drvgrp-related definitions.

Fix typo in ifdef comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Hans de Goede
246e3b8787 sunxi: musb: Fix some lo speed devices not working with musb host
The usb0 / otg phy on sunxi boards has a bug where it wrongly detects a
high speed squelch on usb reset deassert when a lo speed device is plugged in.

The android kernel has a work around for this in the form of temporary
disabling the phy's squelch detection on reset deassert, this commit adds
the same workaround to the u-boot sunxi musb code, thereby fixing various usb
lo speed devices not working.

Tested with a (before non working) usb keyboard and a usb 2.4 GHz wireless
keyboard/mouse combo receiver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-03-29 12:58:59 +02:00
Linus Walleij
d5f3d17ca6 armv8: semihosting: delete external interface
Now that loading files using semihosting can be done using
a command in standard scripts, and we have rewritten the boardfile
and added it to the Vexpress64, let's delete the external
interface to the semihosting file retrieveal and rely solely
on these commands, and staticize them inside that file so the
whole business is self-contained.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:46 -04:00
Masahiro Yamada
d6c418e4b8 ARM: bcm283x: move SoC headers to mach-bcm283x/include/mach
Move arch/arm/include/asm/arch-bcm283x/*
  -> arch/arm/mach-bcm283x/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-03-28 09:03:09 -04:00
David Feng
b263302aa5 ARMv8: enable pre-allocation malloc
Allocate memory space for pre-allocation malloc and zero global data.
This code is partly from crt0.S.

Signed-off-by: David Feng <fenghua@phytium.com.cn>
2015-03-27 16:28:58 +01:00
Nishanth Menon
cdef0b3f3a ARM: OMAP3: rx51: Enable workaround for ARM errata 454179, 430973, 621766
RX51 has a secure logic which uses different parameters compared to
traditional implementation. So, make the generic secure acr write
over-ride-able by board file and refactor rx51 code to use this.

While at it, enable the OMAP3 specific errata code for 454179, 430973,
621766.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13 09:29:33 -04:00