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65773 commits

Author SHA1 Message Date
Michal Simek
3ccea69fc4 arm64: zynqmp: Print multiboot reg in decimal
It is better to print multiboot value in decimal because boot images are
also composed in decimal not in hex.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Mike Looijmans
39c5cf0e70 topic: zynqmp: Add support for zynqmp-xilinx-xdp platform
XDP - Xilinx Drone Platform is a board for drones or other UAV.

Pinmux the SD card by default, and if the SD card detect line is high
(inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on
extension card and shares connection with on board wife. That means that
when SD card is present in the board wifi can't be used.

There seems to be an issue with DDR access from PL at 2400MT/s, after
updating the PMU and ATF firmware this is causing extremely slow DDR
access. Reducing the DDR speed from 2400 to 2133 appears to solve that
issue, even though the hardware has proven to be 2400 capable.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Mike Looijmans
dfbe492ede board: zynqmp: Fix for wrong AMS setting by ROM
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register
at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to
exchange the PS supply voltages 0 and 1. On Xilinx boards this is
not noticeable since these are tied together, it's only really
noticeable if banks 500 and 501 have different supplies. Xilinx' tech
support reported this undocumented register to be the cause, and
this patch applies a fix for all boards by programming the correct
value.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Mike Looijmans
fe1eb9945b board: topic-miami: Set FCLK1 to 150MHz
In all reference designs the FCLK1 runs at 150MHz, but the bootloader
doesn't set it up like that. Set the divider to 8 to generate the
correct clock. Fixes (a.o.) the DMA speed being too slow.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Patrick van Gelder
945a55050d net: xilinx: axi_emac: Fix endless loop when no PHYs are connected
The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.

Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Johannes Krottmayer
6b3984c631 doc: board: xilinx: zynq.rst: add description how to flash a SD card
Add a short description in the ZYNQ documentation how to prepare a SD card and
copy the related images to SD card.

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
T Karthik Reddy
33d3f8e577 arm64: xilinx: Print fpga error value in hex
Fpga returns error value when fails, error status should be
printed in hex format.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Ashok Reddy Soma
f44bd3bcfd spi: zynq_[q]spi: Convert config's to macro's
Remove below config options and convert them to macros. They have never
been configured to different values than default one. And also it makes
sense to reduce the config_whitelist.
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_XILINX_SPI_IDLE_VAL

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Michal Simek
26e62cc971 net: gem: Disable PCS autonegotiation in case of fixed-link
Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.

Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:06 +02:00
T Karthik Reddy
7831292fc9 arm64: zynqmp: Change spi-max-frequency for qspi mini
Change mini u-boot qspi spi-max-frequency to 108Mhz, make the
frequency similar to full u-boot qspi flash spi-max-frequency.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Saeed Nowshadi
3ab205c117 arm64: zynqmp: Fix si570 clock output names and references
Align clock output names with node references.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
052451c10b arm64: zynqmp: Reduce console buffer size
Reduce console buffer size to 1kbyte to accommodate memory
allocations in mini u-boot for zynqmp.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ashok Reddy Soma
a0f309ee9e arm64: versal: Enable config to map TCM and OCM
Enable CONFIG_DEFINE_TCM_OCM_MMAP to map TCM and OCM memory.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ashok Reddy Soma
032d9aa189 arm: zynq: Enable alternative memory test
Enable alternative memory test for zynq platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
b80a476faa fpga: zynqpl: Add zynq aes load & loadp commands
Added support for zynq aes load & loadp commands.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
ca0c0e07ad fpga: zynqpl: Flush dcache only for non-bitstream data
In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ibai Erkiaga
c64afba2fb fpga: zynqpl: Check if aes engine is enabled
AES engine cannot be used if has not been enabled at boot time
with an encrypted boot image.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
1d9632a3cc fpga: zynqpl: Check fpga config completion
This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Siva Durga Prasad Paladugu
3427f4d204 fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
4c86e0834a firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()
There is no need to panic all the time when pmufw config object loading
failed. The patch improves function logic to report permission deny case
and also panic only for SPL case.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-24 13:07:57 +02:00
Rajan Vaja
2b2012d1c1 clk: versal: Remove alt_ref_clk from clock sources
alt_ref_clk is applicable only for PS extended version.
For PS base version there is no separate alt_ref_clk.
It is tied with ref_clk, so remove it from driver.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
70014a7802 arm64: versal: Let U-Boot to update memory node by default
There is no reason not to let U-Boot to update memory node by default. In
past this was disabled by purpose to be able to test different memory
configurations from one U-Boot instance.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
aeb3c386c8 mmc: zynq_sdhci: Remove global pointer
Driver is not calling gd anywhere that's why there is not need to define
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
0ef8cd38d0 arm: versal: Fix xspi0 boot mode
Use proper number to be aligned with xspi0 boot mode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Tom Rini
4ff63383e3 Fixes for 2020.07
-----------------
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/701059103
 
 - Fixes for atheros und cubox
 - Toradex: mostly environment
 - i.MX7: DDR fixes
 - switch to DM
 - sabrelite : fix MMC access
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCXvHAlw8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76bxWgCff20CYrqhuHruG/7Pml9nAMT9XPAAoICYvCiN
 oXidgFCkaO9Af8/2Rkrv
 =8bnC
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Merge tag 'u-boot-imx-20200623' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.07
-----------------

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/701059103

- Fixes for atheros and cubox
- Toradex: mostly environment
- i.MX7: DDR fixes
- switch to DM
- sabrelite : fix MMC access
2020-06-23 08:20:55 -04:00
Tom Rini
7635defaf2 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-23 08:20:07 -04:00
Tom Rini
868fb9969c Prepare v2020.07-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-22 20:49:04 -04:00
Walter Lozano
824e6fe0ae mx6cuboxi: remove unused code
After enabling SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC the MMC
initialization code is not longer needed.

This patch removes the unused code.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23 00:08:53 +02:00
Walter Lozano
6a4bae6c37 mx6cuboxi: enable OF_CONTROL and DM in SPL
In order to take the beneficts of DT and DM in SPL, like reusing the code
and avoid redundancy, enable SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC.

With this new configuration SPL image is 50 KB, higher than the
38 KB from the previous version, but it still under the 68 KB limit.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23 00:08:53 +02:00
Walter Lozano
6c3fbf3e45 mx6cuboxi: customize board_boot_order to access eMMC
In SPL legacy code only one MMC device is created, based on BOOT_CFG
register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are created
based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.

This patch customizes board_boot_order taking into account BOOT_CFG
register to point to correct MMC1 / MMC2 device. Additionally, handle
IO mux for the desired boot device.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23 00:08:53 +02:00
Walter Lozano
24899e03a5 mx6cuboxi: enable MMC and eMMC in DT for SPL
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-23 00:08:53 +02:00
Fabio Estevam
dbb0c4bf49 mx6ull_14x14_evk_plugin: Convert to DM_ETH
Convert to DM_ETH to avoid board removal from the project.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23 00:08:53 +02:00
Fabio Estevam
a5df831620 mx6slevk_spl: Convert to DM_ETH
Convert to DM_ETH to avoid board removal from the project.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23 00:08:53 +02:00
Fabio Estevam
eea10754cd mx6slevk_spinor: Convert to DM_ETH
Convert to DM_ETH to avoid board removal from the project.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-23 00:08:53 +02:00
Ye Li
59a88e0af0 arm: dts: imx: fsl-imx8qm.dtsi: fix gpio aliases
Current aliases missed gpio0 node, and this node shoud be
aliased to gpio index 0 to align with i.MX8QXP. Otherwise, we
will get below message when running "gpio status" command, and
see the reason by "dm uclass".

=> gpio status
Device 'gpio@5d090000': seq 0 is in use by 'gpio@5d080000'
Device 'gpio@5d0a0000': seq 1 is in use by 'gpio@5d090000'
Device 'gpio@5d0b0000': seq 2 is in use by 'gpio@5d0a0000'

=> dm uclass
uclass 36: gpio
0   * gpio@5d080000 @ fbaefb90, seq 0, (req -1)
1   * gpio@5d090000 @ fbaefc70, seq 1, (req 0)
2   * gpio@5d0a0000 @ fbaefd50, seq 2, (req 1)
3   * gpio@5d0b0000 @ fbaefe30, seq 5, (req 2)
4   * gpio@5d0c0000 @ fbaeff10, seq 3, (req 3)
5   * gpio@5d0d0000 @ fbaefff0, seq 4, (req 4)
6   * gpio@5d0e0000 @ fbaf00d0, seq 6, (req 5)
7   * gpio@5d0f0000 @ fbaf01b0, seq 7, (req 6)

Signed-off-by: Ye Li <ye.li@nxp.com>
2020-06-23 00:08:53 +02:00
Ye Li
e168eacde1 gpio: mxc_gpio: change gpio index for i.MX8
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX
platforms, so we have to adjust the index accordingly.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2020-06-23 00:08:53 +02:00
Otavio Salvador
9959d0f679 mx6ul_14x14_evk: Avoid overlap of environment over U-Boot proper
We need to change the environment offset to avoid corrupting the U-Boot
binary when saving it.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-06-23 00:08:53 +02:00
Otavio Salvador
87ea9f784c mx6ul_14x14_evk: Enable SPL USB and SDP support
This fixes the boot from USB loader, which is critical to easy the
manufacture process.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-06-23 00:08:53 +02:00
Marek Vasut
a1f6d04aa1 ARM: imx: soc: Select default TEXT_BASE for MX7
Select default U-Boot and SPL text base for the MX7 SoC. The U-Boot
text base is picked as the one used by various MX7 boards. The SPL
text base however is different.

The SPL text base is set to 0x912000 instead of the usual 0x911000,
that is because the 0x911000 value cannot work. Using 0x911000 as a
SPL text base will result in the DCD header being placed below the
0x911000 address, which is a reserved SRAM area which must not be
used. This will actually trigger eMMC boot failure on MX7D at least.
Hence the increment.

Update all boards affected by this SPL problem to the new SPL_TEXT_BASE.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-06-22 17:44:20 +02:00
Marek Vasut
7204160315 ARM: imx: soc: Switch BOARD_EARLY_INIT_F to imply on MX7
There are systems where board_early_init_f() is plain empty. Switch
the config option from "select" to "imply", to permit user to unset
the BOARD_EARLY_INIT_F if it were to be empty.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-06-22 17:44:13 +02:00
Marek Vasut
cb82ee25f7 ARM: imx: ddr: Fill in missing DDRC ZQCTLx on i.MX7
The iMX7 defines further DDRC ZQCTLx registers, however those were
thus far missing from the list of registers and not programmed. On
systems with LPDDR2 or DDR3, those registers must be programmed with
correct values, otherwise the DRAM may not work. However, existing
systems which worked without programming these registers before are
now setting those registers to 0, which is the default value, so no
functional change there.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-06-22 17:44:06 +02:00
Oliver Graute
fb0b862e81 imx: imx8qm_rom7720_a1: update README
Update README to extract firmware from scripts

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2020-06-22 17:43:59 +02:00
Marek Vasut
ba78c25afe ARM: imx6: Fetch MAC address in board_init_late() on DH iMX6 PDK2
This is needed to obtain the MAC from EEPROM/OTP only after the final
env is populated, otherwise the ethaddr might be overriden.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Claudius Heine <ch@denx.de>
Cc: Harald Seiler <hws@denx.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-06-22 17:43:51 +02:00
Heinrich Schuchardt
a1f79c2170 arm: wandboard: move CONFIG_MXC_UART to defconfig
For using a debug UART on the Wandboard CONFIG_MXC_UART=y must be set in
the .config file.

To avoid duplicate definitions move the setting from
include/configs/wandboard.h to configs/wandboard_defconfig.

Document the debug UART settings in the README.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-06-22 17:43:31 +02:00
Martyn Welch
f7ac30b042 Fix MMC access on Sabrelite
It appears that MMC access on the Sabrelite has been broken since
cdcaee9518:

Loading Environment from MMC... Card did not respond to voltage select!
*** Warning - No block device, using default environment

Remove the board_mmc_init() and related entries now that we should be
using DM_MMC, add PINCTRL so that things work as expected.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2020-06-22 17:43:20 +02:00
Igor Opaniuk
0e15165bc4 colibri_imx6: boot env configuration updates
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-22 17:43:06 +02:00
Igor Opaniuk
a17930a36c colibri_imx7: boot env configuration updates
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-22 17:42:59 +02:00
Igor Opaniuk
8b9c0cb464 apalis_imx6: boot env configuration updates
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-22 17:42:51 +02:00
Igor Opaniuk
1cfe8d6b30 toradex: imx: enable BOOTCOUNT feature
This introduces automatic boot counter that increases after every
reset.After a power-on reset, it will be initialized with 1,
and each reboot will increment the value by 1. By default it's
disabled if bootlimit isn't set.

To enable this feature you have set bootcount limit ("bootlimit"),
alternate boot action ("altbootcmd") that will be performed if
the new value of bootcount exceeds the value of bootlimit, and
"upgrade_available" to let U-Boot automatically increase and save
the counter value after every reset:

> setenv bootlimit 5
> setenv upgrade_available 1
> setenv altbootcmd "bootm ..."

In case the bootlimit exceeds, the message will be shown and
albootcmd executed:
Warning: Bootlimit (5) exceeded. Using altbootcmd.

To reset bootcount run:
> bootcount reset

Print current value:
> bootcount print

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-22 17:42:44 +02:00
Igor Opaniuk
670795a38d apalis-tk1: fix setting fdtfile value
s/fdt-module/fdt_module/g, as we don't use dash in fdt_file anymore.

Fixes: 4c63a601("apalis-tk1: support v1.2 hardware revision")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-06-22 17:42:35 +02:00