Commit graph

19813 commits

Author SHA1 Message Date
Gabe Black
34b5ee1f6a Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4
The pwm_config function in the exynos pwm driver divides by its period
period parameter. A function was calling pwm_config with a 0ns period and a
0ns duty cycle. That doesn't actually make any sense physically, and results
in a divide by zero in the driver. This change changes the parameters to be a
100000ns period and duty cycle.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Gabe Black
c059f274ad Exynos: pwm: Fix two bugs in the exynos pwm configuration code
First, the "div" value was being used incorrectly to compute the frequency of
the PWM timer. The value passed in is a constant which reflects the value
that would be found in a configuration register, 0 to 4. That should
correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was
being used instead.

Second, the reset value of the timers were being calculated to give an overall
frequency, thrown out, and set to a maximum value. This was done so that PWM 4
could be used as the system clock by counting down from a high value, but it
was applied indiscriminantly. It should at most be applied only to PWM 4.

This change also takes the opportunity to tidy up the pwm_init function.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Che-Liang Chiou
f24869d3a8 Exynos: Add timer_get_us function
timer_get_us returns the time in microseconds since a certain reference
point of history.  However, it does not guarantee to return an accurate
time after a long period; instead, it wraps around (that is, the
reference point is reset to some other point of history) after some
periods. The frequency of wrapping around is about an hour (or 2^32
microseconds).

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Simon Glass
3d00c0cb96 Exynos: Change get_timer() to work correctly
At present get_timer() does not return sane values. It should count up
smoothly in milliscond intervals.

We can change the PWM to count down at 1MHz, providing a resolution
of 1us and a range of about an hour between required get_timer() calls.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Akshay Saraswat
4f3bfa97c4 Exynos5: config: enable time command
This patch enables time command.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:07 +09:00
Akshay Saraswat
a4d40b856f Exynos5: clock: Fix a typo bug in exynos clock init
We intended to clear the bits of CLK_SRC_TOP2 register, instead we were
writing on the reserved bits of src_core1 register. Since the default
value of clk_src_top2 register were itself zero, this typo was not
creating any big issue. But it is better to fix this error for better
readability of the code.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 20:36:48 +09:00
Akshay Saraswat
2c6346c1be Exynos: config: Enable hash command
This enables hash command.

Tested with command "hash sha256 0x40008000 0x2B 0x40009000".
Used mm and md to write a standard string to memory location
0x40008000 and ran the above command to verify the output.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-29 20:10:42 +09:00
Akshay Saraswat
1f9c92808a gen: Add sha h/w acceleration to hash
Adding H/W acceleration support to hash which can be used
to test SHA 256 hash algorithm.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-29 20:10:42 +09:00
Akshay Saraswat
8e6ee2933c Exynos: config: Enable ACE HW for SHA 256 for Exynos
This enables SHA 256 for exynos.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-29 20:10:42 +09:00
Akshay Saraswat
acbb1eb772 Exynos: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using ACE hardware.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-29 20:10:42 +09:00
Akshay Saraswat
db9e5e63be Exynos: clock: Fix a bug in PLL lock check condition
The condition for testing of PLL getting locked was incorrect. Rectify
this error in this patch.

Reported-by: Alexei Fedorov <alexie.fedorov@arm.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 15:15:11 +09:00
Przemyslaw Marczak
dc993a65f4 spl:falcon:trats: Fix SPL image size computing.
"spl_imgsize" was set as decimal variable by "setexpr"
and this causes wrong image size written by "ext4write".
Preset this val with "0x" prefix allow to fix this issue.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 11:42:35 +09:00
Vivek Gautam
7d17958408 spi: exynos: Fix compiler warnings for non-dt systems
Enclosing process_nodes() and spi_get_config() inside
CONFIG_OF_CONTROL, since they are compiled only for DT systems.

This fixes following warning:
exynos_spi.c:391:12: warning: 'process_nodes' defined but not used [-Wunused-function]

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 11:16:25 +09:00
Vivek Gautam
48e2218cd1 SMDK5250: Fix compiler warning for non-dt systems
Compiling for non-dt systems gives folowing warning:
smdk5250.c: In function 'board_eth_init':
smdk5250.c:152:6: warning: unused variable 'node' [-Wunused-variable]

Declare variable 'node' only for dt enabled systems to remove this
warning.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 11:16:25 +09:00
Ajay Kumar
18637815a4 SMDK5250: Use statically defined structures only in non DT case
Since we have DT support in exynos_fb and exynos_dp drivers now,
we need not define any static structure or platform data related to
display in the board file smdk5250.c.
So, we place the already existing structures inside #ifndef CONFIG_OF_CONTROL block.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:23:27 +09:00
Ajay Kumar
dc97299443 SMDK5250: Add device node for DP
Add DT bindings for DP supporting an eDP panel of size 2560x1600.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:23:23 +09:00
Ajay Kumar
71e6ba4655 EXYNOS5: Add device node for DP
Add DT node and bindings documentaion for DP.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:23:18 +09:00
Ajay Kumar
9947d13e51 video: exynos_dp: Add function to parse DP DT node
Add function to parse the required platform data fron DP DT node
and fill the edp_info structure.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:23:15 +09:00
Ajay Kumar
1e4706a715 EXYNOS5: FDT: Add compatible strings for FIMD
Add required compatible information for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:23:11 +09:00
Ajay Kumar
beded3d13a video: exynos_dp: Make dp_regs global
dp_regs variable was redundantly defined across all the functions in
the driver even though it contains just the same address. We make it
global and initialize it once using exynos_dp_set_base_addr().
>From then on, other funtions can use the address stored in the global variable.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:21:19 +09:00
Ajay Kumar
539d8f49df SMDK5250: Add device node for FIMD
Add DT bindings for FIMD supporting an eDP panel of size 2560x1600.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:21:14 +09:00
Ajay Kumar
9a1313e1c1 EXYNOS5: Add device node for FIMD
Add DT node and bindings documentation for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:19:09 +09:00
Ajay Kumar
c23f3157d6 video: exynos_fb: add DT support for FIMD driver
Add function to parse FIMD data from device tree.
The driver still supports non-DT case.
Define panel_info statically in some file if you are not using DT.
If you have defined DT node for FIMD, panel_info will be filled
using the bindings of FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:17:29 +09:00
Ajay Kumar
d7377b5193 EXYNOS: FDT: Add compatible strings for FIMD
Add required compatible information for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:17:23 +09:00
Ajay Kumar
47ff6073a8 video: exynos_fb: Make fimd_ctrl global
fimd_ctrl variable was redundantly defined across all the functions in
the driver even though it contains just the same address. We make it
global and initialize it in exynos_fimd_lcd_init. From then on, other
funtions can use the data in the global variable.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:17:19 +09:00
Ajay Kumar
c18222bee8 video: exynos_dp: Remove callbacks from the driver
Replaced the functionality of callbacks by using a standard set of functions.
Instead of implementing and hooking up a callback, put the same code in one of
the standard set of functions by overriding it.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:17:15 +09:00
Ajay Kumar
29fd57046e video: exynos_fb: Remove callbacks from the driver
Replaced the functionality of callbacks by using a standard set of functions.
Instead of implementing and hooking up a callback, put the same code in one of
the standard set of functions by overriding it.

This patch is tested only on SMDK5250.
For Trats and universal_c210 board, it is only compile tested.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 21:17:12 +09:00
Rajeshwari Shinde
7ee68fe85f EXYNOS5: Add L2 Cache Support.
This patch set adds L2 Cache Support to EXYNOS.

Signed-off-by: Arun Mankuzhi <arun.m@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-27 16:53:37 +09:00
Albert ARIBAUD
ebd749da69 Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master' 2013-03-26 10:40:13 +01:00
Albert ARIBAUD
412665b461 Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2013-03-26 09:51:09 +01:00
Tom Warren
f789be6086 Tegra114: MMC: Enable DT MMC driver support for Tegra114 Dalmore boards
Tested on my Dalmore E1611 board, eMMC and SD-Card work fine, can load
a kernel off of an SD card OK, card detect works, and the env is now
stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20/30).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:08 -07:00
Tom Warren
6d9ea159e4 Tegra114: MMC: Add SD bus power-rail init routine
T114 requires SD bus power-rail bringup for the SDIO card on SDMMC3.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Tom Warren
2a04a31791 Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table
SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup
before the MMC driver is added.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Tom Warren
e9cd20654c Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)
Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Allen Martin
ec37b2b423 tegra114: dalmore: config: enable SPI
Turn on SPI in dalmore config file

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Allen Martin
77c42e80b9 tegra114: add SPI driver
Add driver for tegra114 SPI controller.  This controller is not
compatible with either the tegra20 or tegra30 controllers, so it
requires a new driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Allen Martin
af77fdb2ce tegra114: dalmore: fdt: enable dalmore SPI controller
Dalmore has a SPI flash part attached to controller 4, so enable
controller 4 and set to 25MHz.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Allen Martin
9a38fb4d94 tegra114: fdt: add SPI blocks
Add nodes for t114 SPI controller hardware

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:06 -07:00
Allen Martin
6a3742fe7a tegra114: fdt: add apbdma block
Add node for apbdma controller hardware.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:06 -07:00
Allen Martin
c3bb3c8bb3 tegra114: fdt: add compatible string for tegra114 SPI ctrl
Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:06 -07:00
Allen Martin
772ba15474 sf: winbond: add W25Q32DW
Add support for Winbond W25Q32DW 32Mbit part

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:06 -07:00
Allen Martin
78f47b7353 spi: add common fdt SPI driver interface
Add a common interface to fdt based SPI drivers.  Each driver is
represented by a table entry in fdt_spi_drivers[].  If there are
multiple SPI drivers in the table, the first driver to return success
from spi_init() will be registered as the SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:06 -07:00
Allen Martin
6b3a03e112 tegra20: spi: move fdt probe to spi_init
Make the tegra20 SPI driver similar to the tegra30 (and soon to be
tegra114) SPI drivers in preparation of common fdt SPI driver front
end.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:06 -07:00
Allen Martin
7a49ba6e5b tegra: spi: pull register structs out of headers
Move register structs from headers into .c files and use common name.
This is in preparation of making common fdt front end for SPI
drivers.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:05 -07:00
Allen Martin
2a3c5bc29c tegra: spi: remove non fdt support
Remove non fdt support from tegra20 and tegra30 SPI drivers in
preparation of new common fdt based SPI driver front end.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:05 -07:00
Allen Martin
ff1da6fb5f tegra: spi: rename tegra SPI drivers
Rename tegra SPI drivers to tegra20_flash and tegra20_slink in
preparation for commonization and addition of tegra114_spi.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:05 -07:00
Allen Martin
9000652da0 tegra: remove support for UART SPI switch
This feature was only used for tegra20 seaboard that had a pinmux
conflict on the SPI pins.  These boards were never manufactured, so
remove this support to clean up SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:05 -07:00
Albert ARIBAUD
b6379e15a7 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-03-24 17:52:22 +01:00
Peter Korsgaard
173ddc5b68 mmc: omap_hsmmc.c: only register getcd/getwp callbacks if gpio could be used
Gets rid of warnings from omap_gpio:
ERROR : check_gpio: invalid GPIO -1

(and undefined behaviour as the -1 error code is interpreted as gpio value)

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-03-24 12:49:12 -04:00
Peter Korsgaard
d4e1da4e09 mmc: mmc_getcd/getwp: use sensible defaults
Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't
provide handlers for them.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Add braces around first if test in each case to fix warning]
Signed-off-by: Tom Rini <trini@ti.com>
2013-03-24 12:49:12 -04:00