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Exynos: pwm: Fix two bugs in the exynos pwm configuration code
First, the "div" value was being used incorrectly to compute the frequency of the PWM timer. The value passed in is a constant which reflects the value that would be found in a configuration register, 0 to 4. That should correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was being used instead. Second, the reset value of the timers were being calculated to give an overall frequency, thrown out, and set to a maximum value. This was done so that PWM 4 could be used as the system clock by counting down from a high value, but it was applied indiscriminantly. It should at most be applied only to PWM 4. This change also takes the opportunity to tidy up the pwm_init function. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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parent
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commit
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1 changed files with 14 additions and 10 deletions
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@ -143,7 +143,7 @@ int pwm_init(int pwm_id, int div, int invert)
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u32 val;
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const struct s5p_timer *pwm =
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(struct s5p_timer *)samsung_get_base_timer();
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unsigned long timer_rate_hz;
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unsigned long ticks_per_period;
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unsigned int offset, prescaler;
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/*
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@ -167,20 +167,24 @@ int pwm_init(int pwm_id, int div, int invert)
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val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id);
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writel(val, &pwm->tcfg1);
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timer_rate_hz = get_pwm_clk() / ((prescaler + 1) *
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(div + 1));
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if (pwm_id == 4) {
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/*
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* TODO(sjg): Use this as a countdown timer for now. We count
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* down from the maximum value to 0, then reset.
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*/
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ticks_per_period = -1UL;
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} else {
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const unsigned long pwm_hz = 1000;
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unsigned long timer_rate_hz = get_pwm_clk() /
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((prescaler + 1) * (1 << div));
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timer_rate_hz = timer_rate_hz / CONFIG_SYS_HZ;
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ticks_per_period = timer_rate_hz / pwm_hz;
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}
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/* set count value */
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offset = pwm_id * 3;
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/*
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* TODO(sjg): Use this as a countdown timer for now. We count down
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* from the maximum value to 0, then reset.
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*/
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timer_rate_hz = -1;
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writel(timer_rate_hz, &pwm->tcntb0 + offset);
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writel(ticks_per_period, &pwm->tcntb0 + offset);
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val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id));
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if (invert && (pwm_id < 4))
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