Commit graph

22 commits

Author SHA1 Message Date
Nandor Han
886678fcf7 board,ge,bx50v3 - rtc time validation
Validate the time at startup:
 - in case rtc error add to kernel command line RTC_ERROR
 - clamp date to 1-Jan-2036

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
f07b3148d7 board: ge: bx50v3: Support FIT and select configuration based on VPD
Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
6d6564957c board: ge: bx50v3: Enable hardware watchdog
Enable the hardware watchdog on bx50v3 to cause it to reset in the event
the board hangs.

Configure GPIO_9 pin as WDOG1_B so that a watchdog timeout results in a
full system reset.

The watchdog is used and reconfigured by systemd approximately 1.7 seconds
into boot. Adding a few seconds for U-Boot and a few more seconds as a
safety margin.

Note that the PCIe controller is _not_ put back into a safe state prior
to board reset.  This is a problem if board reset is implemented as CPU
reset.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
2850645cab board: ge: bx50v3: program MAC address to I210
There are two I210s on the b850v3 and one on the b450v3 and b650v3.
One is connected to Marvell 88e6240 which is already programmed.

Follow the flow documented in doc/README.enetaddr: set the
enet[0-9]*addr environment variable and let the driver program the
hardware.

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order.

The environment variables are removed after programming the hardware
because the variables seem to influence MAC addresses also after U-Boot.
Specifically the MAC address of FEC (MC interface) would be incorrectly
set: 'ethaddr', which maps to the first I210 chip and is set to I210's
default address read from the driver by eth_write_hwaddr in eth_legacy.c
because the variable is undefined (not set even by bx50v3.c), would
result in the eth0 interface's MAC address to be set to I210's default
address.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
cf678b31ac board: ge: bx50v3: move FEC MAC address programming to driver
Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.

This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.

The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
87da89e803 board: ge: Enable access to i2c bus 1 and 2
The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.

Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
b418dfe16e board: ge: make VPD code common
The VPD data is used on a number of GE products. Move the parsing code to
a common location so that we can share this code.

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Acked-by: Stefano Babic <sbabic@denx.de>
2017-11-20 09:58:31 +01:00
Diego Dorta
7594c51ae6 imx: Include <input.h> header file
When building with W=1 errors like the one below is seen:

board/freescale/mx6sabresd/mx6sabresd.c:546:5: warning:
no previous prototype for ‘overwrite_console’
[-Wmissing-prototypes] int overwrite_console(void)

Fix the build warnings by including <input.h>.

Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-10-12 17:31:16 +02:00
Ian Ray
be2808c3b0 board: ge: bx50v3: set eth0 MAC address
Define i2c mux configuration.  Add new vpd_reader which is used to read
vital product data.  Read VPD from EEPROM and set eth0 MAC address.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Jose Alarcon <jose.alarcon@ge.com>
2017-09-20 15:34:59 +02:00
Stefano Babic
552a848e4f imx: reorganize IMX code as other SOCs
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic <sbabic@denx.de>

CC: Fabio Estevam <fabio.estevam@nxp.com>
CC: Akshay Bhat <akshaybhat@timesys.com>
CC: Ken Lin <Ken.Lin@advantech.com.tw>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Heiko Schocher <hs@denx.de>
CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Patrick Bruenn <p.bruenn@beckhoff.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Nikita Kiryanov <nikita@compulab.co.il>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: "Eric Bénard" <eric@eukrea.com>
CC: Jagan Teki <jagan@amarulasolutions.com>
CC: Ye Li <ye.li@nxp.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Adrian Alonso <adrian.alonso@nxp.com>
CC: Alison Wang <b18965@freescale.com>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Martin Donnelly <martin.donnelly@ge.com>
CC: Marcin Niestroj <m.niestroj@grinn-global.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Adam Ford <aford173@gmail.com>
CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
CC: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Soeren Moch <smoch@web.de>
CC: Richard Hu <richard.hu@technexion.com>
CC: Wig Cheng <wig.cheng@technexion.com>
CC: Vanessa Maegima <vanessa.maegima@nxp.com>
CC: Max Krummenacher <max.krummenacher@toradex.com>
CC: Stefan Agner <stefan.agner@toradex.com>
CC: Markus Niebel <Markus.Niebel@tq-group.com>
CC: Breno Lima <breno.lima@nxp.com>
CC: Francesco Montefoschi <francesco.montefoschi@udoo.org>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Scott Wood <oss@buserror.net>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Simon Glass <sjg@chromium.org>
CC: "Andrew F. Davis" <afd@ti.com>
CC: "Łukasz Majewski" <l.majewski@samsung.com>
CC: Patrice Chotard <patrice.chotard@st.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Hans de Goede <hdegoede@redhat.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stephen Warren <swarren@nvidia.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: "Álvaro Fernández Rojas" <noltari@gmail.com>
CC: York Sun <york.sun@nxp.com>
CC: Xiaoliang Yang <xiaoliang.yang@nxp.com>
CC: Chen-Yu Tsai <wens@csie.org>
CC: George McCollister <george.mccollister@gmail.com>
CC: Sven Ebenfeld <sven.ebenfeld@gmail.com>
CC: Filip Brozovic <fbrozovic@gmail.com>
CC: Petr Kulhavy <brain@jikos.cz>
CC: Eric Nelson <eric@nelint.com>
CC: Bai Ping <ping.bai@nxp.com>
CC: Anson Huang <Anson.Huang@nxp.com>
CC: Sanchayan Maity <maitysanchayan@gmail.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Patrick Delaunay <patrick.delaunay@st.com>
CC: Gary Bisson <gary.bisson@boundarydevices.com>
CC: Alexander Graf <agraf@suse.de>
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12 10:17:44 +02:00
Yung-Ching LIN
ec7aa8fd67 board: ge: bx50v3: apply the proper register setting to fix the voltage peak issue
Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register
to avoid the voltage peak issue while we do the IEEE PHY comformance test

Signed-off-by: Ken Lin <yungching0725@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Ian Ray <ian.ray@ge.com>
2017-03-26 09:58:11 -05:00
Yung-Ching LIN
d42db168e6 board: ge: bx50v3: fix AR8033 reset timing issue
Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet

Signed-off-by: Ken Lin <yungching0725@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Ian Ray <ian.ray@ge.com>
2017-03-26 09:58:08 -05:00
Ken Lin
22d358da0b board: ge: bx50v3: add the PMIC configuration support
Change the PMIC bulk configuration from auto mode to sync mode to avoid
voltage dropout issue seen in auto mode.

Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
2016-11-29 16:42:53 +01:00
Masahiro Yamada
1221ce459d treewide: replace #include <asm/errno.h> with <linux/errno.h>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content.  (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23 17:55:42 -04:00
Fabio Estevam
c6a51bab17 bx50v3: Use imx_ddr_size() for calculating the DDR size
imx_ddr_size() can be used to calculate the DDR size in runtime.

By using this function we no longer need to define PHYS_SDRAM_SIZE.

Cc: Martin Donnelly <martin.donnelly@ge.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:20 +02:00
Andrew Shadura
0c344e6e7a board: ge: bx50v3: don't configure the backlight when there's no display
Don't try to configure the backlight when CONFIG_VIDEO_IPUV3 isn't set.

Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
2016-06-07 18:13:05 +02:00
Akshay Bhat
8d293f49b4 board: ge: bx50v3: Fix to meet LVDS display power on timing
On a reset/reboot, the display power needs to be off for atleast 500ms
before turning it back on. So add a delay to the boot process to meet
the display timing requirement.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:51 +02:00
Akshay Bhat
54971ac6de board: ge: bx50v3: Use pwm for display backlight
Setup the LCD backlight brightness control pin to use PWM

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:51 +02:00
Akshay Bhat
494d43ec35 board: ge: bx50v3: Setup LDB_DI_CLK source
To generate accurate pixel clocks required by the displays we need to
set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since
PLL5 is disabled on reset, we need to enable PLL5.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:13 +02:00
Akshay Bhat
de708da0e8 board: ge: bx50v3: Split display setup function
B450v3/B650v3 uses single channel LVDS and does not support HDMI.
B850v3 uses dual channel LVDS and supports HDMI. Hence split the display
setup into two different functions.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:13 +02:00
Justin Waters
7d0b8cfeaa board: ge: bx50v3: Disable unused pins
Certain pins are not used on the i.MX6, and should have a neutral
pad configuration in order to reduce electrical interference on
the board. This commit defines these pins with a default value
rather than relying on the system defaults.

Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 15:54:59 +02:00
Akshay Bhat
f9162b15c1 arm: imx: Add support for GE Bx50v3 boards
Add support for GE B450v3, B650v3 and B850v3 boards. The boards
are based on Advantech BA16 module which has a i.MX6D processor.
The boards support:
 - FEC Ethernet
 - USB Ports
 - SDHC and MMC boot
 - SPI NOR
 - LVDS and HDMI display

Basic information about the module:
 - Module manufacturer: Advantech
 - CPU: Freescale ARM Cortex-A9 i.MX6D
 - SPECS:
     Up to 2GB Onboard DDR3 Memory;
     Up to 16GB Onboard eMMC NAND Flash
     Supports OpenGL ES 2.0 and OpenVG 1.1
     HDMI, 24-bit LVDS
     1x UART, 2x I2C, 8x GPIO,
     4x Host USB 2.0 port, 1x USB OTG port,
     1x micro SD (SDHC),1x SDIO, 1x SATA II,
     1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2016-03-09 12:45:42 +01:00