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u-boot/board/ge/bx50v3
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Akshay Bhat 494d43ec35 board: ge: bx50v3: Setup LDB_DI_CLK source 
To generate accurate pixel clocks required by the displays we need to
set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since
PLL5 is disabled on reset, we need to enable PLL5.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:13 +02:00
..
bx50v3.c board: ge: bx50v3: Setup LDB_DI_CLK source 2016-04-19 16:05:13 +02:00
bx50v3.cfg arm: imx: Add support for GE Bx50v3 boards 2016-03-09 12:45:42 +01:00
Kconfig arm: imx: Add support for GE Bx50v3 boards 2016-03-09 12:45:42 +01:00
MAINTAINERS arm: imx: Add support for GE Bx50v3 boards 2016-03-09 12:45:42 +01:00
Makefile arm: imx: Add support for GE Bx50v3 boards 2016-03-09 12:45:42 +01:00