Commit graph

35 commits

Author SHA1 Message Date
Stefan Roese
2a72e9ed18 ppc4xx: Add option for PPC440SPe ports without old Rev. A support
The 440SPe Rev. A is quite old and newer 440SPe boards don't need support
for this CPU revision. Since removing support for this older version
simplifies the creation for newer U-Boot ports, this patch now enables
440SPe > Rev. A support by creating the CONFIG_440SPE_REVA define. By
defining this in the board config header, Rev. A will still be supported.
Otherwise (default for newer board ports), Rev. A will not be supported.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-14 10:27:39 +02:00
Stefan Roese
b0b867462c ppc4xx: Consolidate 4xx PCIe board specific configuration
This patch consolidates the PPC4xx board specific PCIe configuration
code. This way the duplicated code is removed. Boards can implement a
special, non standard behaviour (e.g. number of PCIe slots, etc) by
overriding the weak default functions.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-09 11:26:57 +01:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0e8d158664 rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5a1aceb068 rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
9314cee691 rename CFG_ENV_IS_IN_NVRAM in CONFIG_ENV_IS_IN_NVRAM
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:47:59 +02:00
Jean-Christophe PLAGNIOL-VILLARD
bb1f8b4f8b rename CFG_ENV_IS_IN_EEPROM in CONFIG_ENV_IS_IN_EEPROM
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 21:09:38 +02:00
Stefan Roese
72675dc6c0 ppc4xx: Unify AMCC's board config files (part 3/3)
This patch series unifies the AMCC eval board ports by introducing
a common include header for all AMCC eval boards:

include/configs/amcc-common.h

This header now includes all common configuration options/defines which
are removed from the board specific headers.

The reason for this is ease of maintenance and unified look and feel
of all AMCC boards.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06 15:55:21 +02:00
Stefan Roese
3c1de1a6d3 ppc4xx: Remove implementations of testdram()
This patch removes the used testdram() implementations of the board
that are maintained by myself.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:24 +02:00
Stefan Roese
a00eccfebc ppc4xx: Add fdt support to all remaining AMCC PPC4xx eval boards
This patch adds fdt (flattened device tree) support to all remaining AMCC
eval boards. Most newer boards already support device tree. With this patch,
all AMCC boards now enable device tree passing from U-Boot to Linux
arch/powerpc kernels.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 11:05:15 +02:00
Detlev Zundel
d8ab58b212 Replace "run load; run update" with conditionalized "run load update".
The latter version stops when "run load" fails for whatever reasons
rendering the combination *a lot* more secure.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-03-06 17:35:40 +01:00
Wolfgang Denk
32bf3d143a Fix quoting problem (preboot setting) in many board config files.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-03 12:37:53 +01:00
Stefan Roese
d25dfe08fb ppc4xx: Remove cache definition from 4xx board config files
All 4xx board config files don't need the cache definitions anymore.
These are now defined in common headers.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Stefan Roese
d4cb2d1794 ppc4xx: Dynamic configuration of 4xx PCIe mode as root or endpoint mode
This patch adds support for dynamic configuration of PCIe ports for the
AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe
boards Yucca & Katmai and the 405EX board Kilauea.

This dynamic configuration is done via the "pcie_mode" environement
variable. This variable can be set to "EP" or "RP" for endpoint or
rootpoint mode. Multiple values can be joined via the ":" delimiter.
Here an example:

pcie_mode=RP:EP:EP

This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2
as endpoint.

Per default Yucca will be configured as:
pcie_mode=RP:EP:EP

Per default Katmai will be configured as:
pcie_mode=RP:RP:REP

Per default Kilauea will be configured as:
pcie_mode=RP:RP

Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:50 +01:00
Stefan Roese
97923770cb ppc4xx: 4xx_pcie: More general cleanup and 405EX PCIe support added
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Stefan Roese
4dbee8a90d ppc4xx: 4xx_pcie: Change CFG_PCIE_MEMSIZE to 128MB on Yucca & Katmai
128MB seems to be the smallest possible value for the memory size
for on PCIe port. With this change now the BAR's of the PCIe cards
are accessible under U-Boot.

One big note: This only works for PCIe port 0 & 1. For port 2 this
currently doesn't work, since the base address is now 0xc0000000
(0xb0000000 + 2 * 0x08000000), and this is already occupied by
CFG_PCIE0_CFGBASE. But solving this issue for port 2 would mean
to change the base addresses completely and this change would have
too much impact right now.

This patch adds debug output to the 4xx pcie driver too.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Grzegorz Bernacki
6efc1fc0b6 [PPC440SPe] PCIe environment settings for Katmai and Yucca
- 'pciconfighost' is set by default in order to be able to scan bridges
behind the primary host/PCIe

- 'pciscandelay' env variable is recognized to allow for user-controlled
delay before the PCIe bus enumeration; some peripheral devices require a
significant delay before they can be scanned (e.g. LSI8408E); without the
delay they are not detected

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 18:35:37 +02:00
Grzegorz Bernacki
7f19139389 [PPC440SPe] Improve PCIe configuration space access
- correct configuration space mapping
- correct bus numbering
- better access to config space

Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 18:20:23 +02:00
Kim Phillips
79f240f7ec lib_ppc: make board_add_ram_info weak
platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.

this consequently eliminates CONFIG_ADD_RAM_INFO.

Thanks to Stefan for the hint.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-18 21:39:46 +02:00
Jon Loeliger
079a136c35 include/configs/[p-z]* + misc: Cleanup BOOTP and lingering CFG_CMD_*.
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.

Remove lingering references to CFG_CMD_* symbols.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-10 10:12:10 -05:00
Jon Loeliger
dca3b3d6d6 include/configs: Use new CONFIG_CMD_* in various [v-z]* named board config files.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-05 11:05:18 +02:00
Stefan Roese
466fff1a7b ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25 15:57:39 +02:00
Stefan Roese
6072380343 ppc4xx: Change Yucca config file to support ECC
With the updated 44x DDR2 driver the Yucca board now supports
ECC generation and checking.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-31 08:48:36 +02:00
Stefan Roese
2f5df47351 [PATCH] Update AMCC Yucca 440SPe eval board support
The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08 10:10:18 +01:00
Stefan Roese
5a753f98c6 [PATCH] Update some AMCC 4xx board config files (set initrd_high)
Some boards that can have more than 768MBytes of SDRAM need to
set "initrd_high", so that the initrd can be accessed by the
Linux kernel.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-07 16:51:08 +01:00
Wolfgang Denk
0a0f3a46fb Cleanup debug code for yucca board. 2006-08-17 10:48:36 +02:00
Wolfgang Denk
c72d9c5285 Merge with /home/sr/git/u-boot/denx 2006-08-13 02:25:32 +02:00
Rafal Jaworowski
36b904a7fd Fix PCI-Express on PPC440SPe rev. A. 2006-08-11 12:35:52 +02:00
Rafal Jaworowski
692519b1ed Add support for PCI-Express on PPC440SPe (Yucca board). 2006-08-10 12:43:17 +02:00
Stefan Roese
4f92ed5fc0 Add commandline history support to all AMCC eval boards
Patch by Stefan Roese, 07 Aug 2006
2006-08-07 14:33:32 +02:00
Marian Balakowicz
edd6cf20e1 Fix timer problems on AMCC yucca board.
Set Timer Clock Select to use CPU clock as a timer input source.
2006-07-06 21:17:24 +02:00
Wolfgang Denk
caaeaf925f Bring yucca config more in line with other AMCC boards. 2006-07-05 10:42:14 +02:00
Marian Balakowicz
fbb0b559ae Add system memory to the PCI region list for AMCC PPC44x CPUs.
Enabled it for Yucca board.
2006-07-04 00:55:47 +02:00
Marian Balakowicz
fe84b48a94 Cleanup config file and bootup output for Yucca board. 2006-07-03 23:42:36 +02:00
Marian Balakowicz
6c5879f380 Add support for AMCC 440SPe CPU based eval board (Yucca). 2006-06-30 16:30:46 +02:00