Commit graph

48964 commits

Author SHA1 Message Date
Stephen Warren
32090e5070 test/py: highlight warnings in the log summary
Currently, if a test emits a warning message but otherwise passes, there's
no indication of this in the log summary, which can lead to warnings being
missed. Enhance the test logic to explicitly mention warnings in otherwise
passing tests, and not to collapse the log sections for tests with
warnings, so that they're more easily seen when scanning the log.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2018-03-13 21:59:26 -04:00
Stephen Warren
4bdc90f9c7 test/py: add MMC/SD block read test
Add a standalone MMC block read test. This allows direct testing of MMC
access rather than relying on doing so as a side-effect of e.g. DFU or
UMS testing, which may not be enabled on all platforms.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2018-03-13 21:59:26 -04:00
Kever Yang
56670d6fb8 disk: part: use common api to lookup part driver
Do not need to scan disk every time when we get part info
by name.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[trini: Fix build in !CONFIG_HAVE_BLOCK_DEVICE case]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-13 21:58:45 -04:00
Kever Yang
d472926919 disk: part: scan the disk if the part_type is unknown
If a DUT do not have partition table, and we write one with 'gpt write'
cmd, we should able to list the partition with 'part list' cmd.
It's reasonable to scan the disk again if the initial part_type is
unknown in case we just write a new one into disk.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-03-13 21:46:05 -04:00
Patrice Chotard
f5bd13ed57 mach-stm32: Use default memory map as background region
On linux kernel side, on STM32F7 and STM32H7 SoCs, DMA requires
uncachable regions. These regions are defined in DT.
Since kernel linux v4.15, on ARMv7-M Cortex, kernel is able
to configure MPU regions depending on DT settings.

As kernel is able to configure MPU, this allows to remove
MPU region settings in bootloader.

On Cortex M processors, MPU allows to use a default memory map.
(see B3.5.4 MPU Control Register, MPU_CTRL in
https://developer.arm.com/products/architecture/m-profile/docs/ddi0403/latest/armv7-m-architecture-reference-manual)
Use the default memory map as background region for all STM32 SoCs
family with an additional MPU region corresponding to the SDRAM area.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
227cefe02c configs: stm32: Enable DOS_PARTITION for STM32F4/F7 boards
Enable DOS_PARTITION for boards STM32F429-eval, STM32F469-disco
and STM32F746-disco.
This allows to read FAT partition on mmc.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
d0d6451587 ARM: dts: Add support for stm32f746-evaluation board support
This board offers:
  _ STM32F746NGH6 microcontroller with 1 Mbyte Flash and 320+4 Kbytes RAM
  _ Six 5 V power supply options:
        Power jack
        ST-LINK/V2-1 USB connector
        User USB HS connector
        User USB FS1 connector
        User USB FS2 connector
        Daughterboard
  _ SAI Audio DAC, stereo audio jack which supports headset with microphone
  _ Stereo digital microphone, audio jack connector used to connect
    external speakers
  _ 2 Gbytes (or more) SDMMC interface microSD card
  _ RF-EEPROM on I2C compatible serial interface
  _ RS-232 communication
  _ IrDA transceiver
  _ JTAG/SWD and ETM trace debug support, ST-LINK/V2-1 embedded
  _ IEEE-802.3-2002 compliant Ethernet connector
  _ Camera module
  _ 8Mx32 bit SDRAM, 1Mx16 bit SRAM & 8Mx16 bit Nor Flash
  _ 512 Mbits QuadSPI Nor Flash
  _ 5.7 inch 640x480 pixel TFT color LCD with capacitive touch panel
  _ Joystick with 4-direction control and selector
  _ Reset, WakeUp/Tamper or key button
  _ 4 color user LEDs
  _ Extension connectors & memory connectors for daughterboard or
    wrapping board
  _ USB OTG HS and FS with Micro-AB connectors
  _ RTC with backup battery
  _ CAN 2.0A/B compliant connection
  _ Potentiometer
  _ Motor control connector

More detailed information are available here :
http://www.st.com/en/evaluation-tools/stm32746g-eval.html

To compile stm32f746-eval board, use same defconfig as
stm32f746-disco, the only difference is to pass
"DEVICE_TREE=stm32746g-eval".

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
585beebd05 arch-stm32: Clean arch-stm32f7/syscfg.h
Remove all unused defines

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
1b76a7333a arch-stm32: Remove stm32_periph.h
Remove arch/arm/include/asm/arch-stm32fx/stm32_periph.h
as all defines or enums are no more used.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
2536f18bfa arch-stm32: Factorize stm32.h for STM32F4 and F7
For STM32F4 and F7 SoCx family, a specific stm32.h file exists.
Some common defines are duplicated or even unused in each of
these stm32.h.

Factorize all common definition in arch/arm/include/asm/stm32f.h and keep
specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
f36bcf2390 arch-stm32: Move gpio.h for STM32 SoCs in include/asm/
Instead to have 3 identical gpio.h for all STM32 SoCs,
migrate them in one file in include/asm.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
bb43fe6e45 arch-stm32f4: Remove fmc.h file
fmc.h file is no more used, remove it.
All FMC related defines are declared in drivers/ram/stm32_sdram.c
which is common to all STM32 SoCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
dd1e3e799a ARM: dts: stm32: limit sdio frequency to 14Mhz for stm32f429i-eval
This avoids the following errors while reading on mmc:
  Read data bytes CRC error: 0x2
  switch to partitions #0, OK
  mmc0 is current device
  Read data bytes CRC error: 0x82002
  ** Unrecognized filesystem type **

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
6243c88448 clk: clk_stm32f: Add DSI clock support
DSI clock is available on STM32F769-disco and
STM32F469-disco board.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
5e993508cb clk: clk_stm32f: Add set_rate for LTDC clock
Implement set_rate() for LTDC clock only, set_rate for other
clocks will be added if needed. This is needed by future LTDC driver
improvements.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
e8fb9ed254 clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clock
Configure SAI PLL configuration to generate LTDC pixel clock on
the PLLSAIR output.

PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
1038e033e1 clk: clk_stm32f: Rework SDMMC stm32_clk_get_rate() part
Rework the way SDMMC clock get rate is done in a more
generic way :

_ Add stm32_clk_get_pllsai_rate() which give the PLLSAI
  indicated output rate.

_ Add stm32_clk_get_pllsai_vco_rate() which give the VCO
  internal rate.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
651a70e8d5 clk: clk_stm32f: No more need of 48Mhz from PLL_SAI
Initially, 48Mhz for SDIO clock was generated from SAI pll for
STM32F469 and STM32F746 SoCs, but this solution was not suitable
for STM32F429 SoCs.

A generic solution is to used the PLL_Q output as 48Mhz clock
for all STM32F SOCs family.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
526aa92960 clk: clk_stm32f: Fix RCC_PLLSAICFGR mask defines
Use the correct name for RCC_PLLSAICFGR_PLLSAIx_MASK masks.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
aa230be4bf clk: clk_stm32f: Fix stm32_clk_get_rate()
Wrong parameter was passed to stm32_clk_pll48clk_rate().
sysclk (PLL_p output value) was passed instead of VCO value.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrick Delaunay
167f2c90f6 mmc: stm32: sdmmc2: add support for st, pin-ckinsdmmc_ckin
This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature.
When using an external driver (a voltage switch transceiver),
it's advised to select SDMMC_CKIN feedback clock input to sample
the received data.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrick Delaunay
a72dd8ed95 mmc: stm32: sdmmc2: add hardware flow control support
The hardware flow control functionality is used to avoid
FIFO underrun (TX mode) and overrun (RX mode) errors.
The behavior is to stop SDMMC_CK during data transfer and
freeze the SDMMC state machines.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
aa5e3e22f4 board: stm32: switch to DM STM32 timer
Use available DM stm32_timer driver instead of dedicated
mach-stm32/stm32fx/timer.c.

Remove all defines or files previously used for timer usage in
arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx

Enable DM STM32_TIMER for STM32F4/F7 and H7.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
cd389c03f2 ARM: dts: stm32: Add timer support for STM32F7
Add missing timer node to enable timer5 for STM32F7 SoCs family

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
09b335a675 clk: clk_stm32h7: Fix prescaler for Domain 3
d1cfgr register was used to calculate the domain 3
prescaler value instead of d3cfgr.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
b43679482b clk: clk_stm32h7: Fix stm32_clk_get_rate() for timer
For timer clock, an additional prescaler is used which
was not taken into account previously.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
61803a95a1 clk: clk_stm32f: Fix stm32_clk_get_rate() for timer
For timer clock, an additionnal prescaler is used which was
not taken into account previously.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrice Chotard
5120a083e7 timer: stm32: Add timer support for STM32 SoCs family
This timer driver is using GPT Timer (General Purpose Timer)
available on all STM32 SOCs family.
This driver can be used on STM32F4/F7 and H7 SoCs family

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Tom Rini
cc66dcdd16 Merge git://git.denx.de/u-boot-rockchip 2018-03-13 19:00:29 -04:00
Tom Rini
ee5f24909f Merge branch 'next' of git://git.denx.de/u-boot-video 2018-03-13 17:32:47 -04:00
Jagan Teki
1e84e44cfe rk3288: vyasa: Add eMMC boot support
RK3288 Vyasa has eMMC boot support, with JP4 open.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
159916f4e8 ARM: dts: rockchip: Add usb otg for rk3288-vyasa
Add usb otg support for rk3288-vyasa, board support usb1 otg
power through otg_vbus_drv and naming conversion followed
as per schematic.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
fd0d7f9345 ARM: dts: rockchip: Add usb host for rk3288-vyasa
Add usb host support for rk3288-vyasa, board support hub power
through phy_pwr_en and usb2 host power through usb2_pwr_en and
naming conversion followed as per schematic.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
7d07b83618 rockchip: rk3288-vyasa: defconfig: Enable gmac support
Enable gmac support for rk3288-vyasa board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
0d3193415d ARM: dts: rockchip: Add gmac support for rk3288-vyasa board
Sync gmac dts node from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:36 +01:00
Jagan Teki
ad6c965529 ARM: dts: rockchip: Add regulators for rk3288-vyasa
Add supporting regulators for rk3288-vyasa board, dc12_vbat is
parent regulatorand followed regulators as are child regulators.
regulator naming conversion followed as per schematic for better
readability and easy for identification.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Jagan Teki
58b3f26fd7 ARM: dts: rockchip: rk3288-vyasa: Use vmmc-supply from PMIC
rk808, SWITCH_REG1 has configured for sdmmc regulator as vcc_sd,
so use the same by renaming vcc33_sd to vcc_sd(as per schematic)
and drop explicit regulator definition from root.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Jagan Teki
764a94d90c ARM: dts: rockchip: rk3288-vyasa: Remove vdd_log from rk808, DCDC_REG1
vdd_log, never used on DCDC_REG1 of rk808 from latest schematic so
remove the same and update the regulator-name as 'vdd_arm' to sync
with existing rk3288 board dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Jagan Teki
d11455f56a ARM: dts: rockchip: Sync rk3288-vyasa dts from Linux
Sync rk3288-vyasa board dts from Linux for proper updates and maintenance
- rk3288-vyasa.dts: Similar to Linux dts
- rk3288-vyasa-u-boot.dtsi: u-boot dts changes

Also updated MAINTAINERS for these dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Klaus Goger
0c8e0b319f rockchip: add text_offset to kernel_addr_r on aarch64 platforms
Booting a aarch64 Linux kernel requires the image to be placed
text_offset bytes from a 2MB aligned address.
See https://www.kernel.org/doc/Documentation/arm64/booting.txt

booti_setup() takes care about this alignment and will relocate the
image if not properly aligned with memmove(). This can require up
to double the size of the loaded image and therefore accidentally
overwrite content placed there (i.e ramdisk_addr_r) for large kernel
images.

By adding text_offset to the default kernel_addr_r we can prevent that
from happening for kernels larger 18MB and also save a few cycles.

We can assume a text_offset of 0x80000 for most cases, all others will be
handled by booti_setup() anyway.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
f9326ec318 rockchip: pwm: convert to use live dt
use live dt api to get base addr

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
bbfef40f92 rockchip: clk: rk1108: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
08516431cf rockchip: clk: rk3328: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
995cde1f9c rockchip: clk: rk3288: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:35 +01:00
Kever Yang
99b8553cb8 rockchip: clk: rk322x: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:34 +01:00
Kever Yang
aca456471f rockchip: clk: rk3188: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:34 +01:00
Kever Yang
7ae028b669 rockchip: clk: rk3036: convert to use live dt
Use live dt api to get cru base addr.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13 18:12:34 +01:00
Tom Rini
f95ab1fb6e Prepare v2018.03
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-13 08:02:19 -04:00
Bryan O'Donoghue
ca89df7dd4 imx: hab: Convert DCD non-NULL error to warning
commit 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.") makes the DCD field being NULL a
dependency.

This change though will break loading and executing of existing pre-signed
binaries on a u-boot update i.e. if this change is deployed on a board you
will be forced to redo all images on that board to NULL out the DCD.

There is no prior guidance from NXP that the DCD must be NULL similarly
public guidance on usage of the HAB doesn't call out this NULL dependency
(see boundary devices link).

Since later SoCs will reject a non-NULL DCD there's no reason to make a
NULL DCD a requirement, however if there is an actual dependency for later
SoCs the appropriate fix would be to do SoC version checking.

Earlier SoCs are capable (and happy) to authenticate images with non-NULL
DCDs, we should not be forcing this change on downstream users -
particularly if it means those users now must rewrite their build systems
and/or redeploy signed images in the field.

Fixes: 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.")

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Link: https://boundarydevices.com/high-assurance-boot-hab-dummies
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-13 07:51:32 -04:00
Breno Lima
6d7403bf72 doc: mxc_hab: Update i.MX HAB documentation
The README.mxc_hab is outdated and need improvements, add the following
modifications:

- Reorganize document and remove duplicate content
- Add CST download link
- Update CST package name
- Align command lines with CST v2.3.3
- Update U-Boot binary name
- Remove CSF padding since is not documented in AN4581

Signed-off-by: Breno Lima <breno.lima@nxp.com>
2018-03-11 16:00:21 +01:00