Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that is loaded
by the code from the SPL. It initializes the DDR with the SPD or other
operations.
The TPL's size is sizeable, the maximum size is decided by the memory's
size that TPL runs. It initializes the DDR through SPD code, and copys
final uboot image to DDR. So there are three stage uboot images:
* spl_boot, * tpl_boot, * final uboot image
Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
The code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that
ddr spd code can get the interleaving mode setting in env. It loads
final uboot image from offset 96KB.
* final uboot image, size is variable depends on the functions enabled.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Fixup an easy conflict over adding the clk_get prototype and USB_OTG
defines for am33xx having moved.
Conflicts:
arch/arm/include/asm/arch-am33xx/hardware.h
Signed-off-by: Tom Rini <trini@ti.com>
At present the console for linux is silent if the U-Boot console is silent,
unless CONFIG_SILENT_U_BOOT_ONLY is set. I wonder if a better way would be
to have an environment variable to control this? Then we can control the
verbosity from scripts, and set the variable to 'no' for those boards that
want Linux to boot with console output.
Signed-off-by: Simon Glass <sjg@chromium.org>
BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a
integrated device that contains two powerpc e500v2 cores and two DSP
starcores.
To support DSP starcore
-Creating LAW and TLB for DSP-CCSR space.
-Creating LAW for DSP-core subsystem M2 and M3 memory
-Creating LAW for 1GB DDR which is connected exclusively to DSP-cores
Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Prepare for emulator support for mpc85xx parts.
Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers.
These two registers improve stability but not supported by emulator.
Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base.
Signed-off-by: York Sun <yorksun@freescale.com>
CONFIG_CMD_HDMIDETECT
CONFIG_CMD_BMODE
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.
Conflicts:
board/sandburst/common/ppc440gx_i2c.c
board/sandburst/common/ppc440gx_i2c.h
Signed-off-by: Tom Rini <trini@ti.com>
Like many other projects, U-Boot has a tradition of including big
blocks of License headers in all files. This not only blows up the
source code with mostly redundant information, but also makes it very
difficult to generate License Clearing Reports. An additional problem
is that even the same lincenses are referred to by a number of
slightly varying text blocks (full, abbreviated, different
indentation, line wrapping and/or white space, with obsolete address
information, ...) which makes automatic processing a nightmare.
To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique Lincense Identifiers
as defined by the Linux Foundation's SPDX project [1]. For example,
in a source file the full "GPL v2.0 or later" header text will be
replaced by a single line:
SPDX-License-Identifier: GPL-2.0+
We use the SPDX Unique Lincense Identifiers here; these are available
at [2].
Note: From the legal point of view, this patch is supposed to be only
a change to the textual representation of the license information,
but in no way any change to the actual license terms. With this patch
applied, all files will still be licensed under the same terms they
were before.
Note 2: The apparent difference between the old "COPYING" and the new
"Licenses/gpl-2.0.txt" only results from switching to the upstream
version of the license which is differently formatted; there are not
any actual changes to the content.
Note 3: There are some recurring questions about linense issues, such
as:
- Is a "All Rights Reserved" clause a problem in GPL code?
- Are files without any license header a problem?
- Do we need license headers at all?
The following excerpt from an e-mail by Daniel B. Ravicher should help
with these:
| Message-ID: <4ADF8CAA.5030808@softwarefreedom.org>
| Date: Wed, 21 Oct 2009 18:35:22 -0400
| From: "Daniel B. Ravicher" <ravicher@softwarefreedom.org>
| To: Wolfgang Denk <wd@denx.de>
| Subject: Re: GPL and license cleanup questions
|
| Mr. Denk,
|
| Wolfgang Denk wrote:
| > - There are a number of files which do not include any specific
| > license information at all. Is it correct to assume that these files
| > are automatically covered by the "GPL v2 or later" clause as
| > specified by the COPYING file in the top level directory of the
| > U-Boot source tree?
|
| That is a very fact specific analysis and could be different across the
| various files. However, if the contributor could reasonably be expected
| to have known that the project was licensed GPLv2 or later at the time
| she made her contribution, then a reasonably implication is that she
| consented to her contributions being distributed under those terms.
|
| > - Do such files need any clean up, for example should we add GPL
| > headers to them, or is this not needed?
|
| If the project as a whole is licensed under clear terms, you need not
| identify those same terms in each file, although there is no harm in
| doing so.
|
| > - There are other files, which include both a GPL license header
| > _plus_ some copyright note with an "All Rights Reserved" clause. It
| > has been my understanding that this is a conflict, and me must ask
| > the copyright holders to remove such "All Rights Reserved" clauses.
| > But then, some people claim that "All Rights Reserved" is a no-op
| > nowadays. License checking tools (like OSLC) seem to indicate this is
| > a problem, but then we see quite a lot of "All rights reserved" in
| > BSD-licensed files in gcc and glibc. So what is the correct way to
| > deal with such files?
|
| It is not a conflict to grant a license and also reserve all rights, as
| implicit in that language is that you are reserving all "other" rights
| not granted in the license. Thus, a file with "Licensed under GPL, All
| Rights Reserved" would mean that it is licensed under the GPL, but no
| other rights are given to copy, modify or redistribute it.
|
| Warm regards,
| --Dan
|
| Daniel B. Ravicher, Legal Director
| Software Freedom Law Center (SFLC) and Moglen Ravicher LLC
| 1995 Broadway, 17th Fl., New York, NY 10023
| (212) 461-1902 direct (212) 580-0800 main (212) 580-0898 fax
| ravicher@softwarefreedom.org www.softwarefreedom.org
[1] http://spdx.org/
[2] http://spdx.org/licenses/
Signed-off-by: Wolfgang Denk <wd@denx.de>
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
CONFIG_I2C_MUX is replaced through the new i2c multibus/multiadapter
framework, configured through CONFIG_SYS_I2C. As CONFIG_I2C_MUX
is only used on the keymile boards, and they are now completely
moved to the new framework, remove CONFIG_I2C_MUX.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
- added to soft_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Add support for Atmel TPM devices with two wire interface.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Extend the tpm library with support for single authorized (AUTH1) commands
as specified in the TCG Main Specification 1.2. (The internally used helper
functions are implemented in a way that they could also be used for double
authorized commands if someone needs it.)
Provide enums with the return codes from the TCG Main specification.
For now only a single OIAP session is supported.
OIAP authorized version of the commands TPM_LoadKey2 and TPM_GetPubKey are
provided. Both features are available using the 'tpm' command, too.
Authorized commands are enabled with CONFIG_TPM_AUTH_SESSIONS. (Note that
this also requires CONFIG_SHA1 to be enabled.)
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Remove CONFIG_SPLASH_SCREEN_PREPARE from README
Add doc/README.splashprepare to document functionality
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Dfu transfer uses a buffer before writing data to the
raw storage device. Make the size (in bytes) of this buffer
configurable through environment variable "dfu_bufsiz".
Defaut value is configurable through CONFIG_SYS_DFU_DATA_BUF_SIZE
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@ti.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Tom Rini <trini@ti.com>
Align the list of default commands mentioned in the configuration options
paragraph of the README with the actual definitions found in
include/config_cmd_default.h
Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com>
RSA provides a public key encryption facility which is ideal for image
signing and verification.
Images are signed using a private key by mkimage. Then at run-time, the
images are verified using a private key.
This implementation uses openssl for the host part (mkimage). To avoid
bringing large libraries into the U-Boot binary, the RSA public key
is encoded using a simple numeric representation in the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch adds the driver for keyboard that's controlled by ChromeOS EC.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the
size for existing boards which has < 16Mbytes SPI flashes.
It's upto user which has provision to use the bank addr code for
flashes which has > 16Mbytes.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There will need the environment in SPL for reasons other than network
support (in particular, hwconfig contains info for how to set up DDR).
Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT
for environment in common/Makefile.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM,
then jump to it to begin execution. After that, the SPL loads the final uboot
image into DDR, then jump to it to begin execution. The segment .resetvec in
the SPL and in final U-boot is useless.
So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application.
If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded
and the segment .bootpg is placed in the previous 4K of the segment .text.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable
the master module of Boot from SRIO and PCIE on a platform. But this
is not a silicon feature, it's just a specific booting mode based on
the SRIO and PCIE interfaces. So it's inappropriate to put the macro
into the file arch/powerpc/include/asm/config_mpc85xx.h.
Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to
"CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from
arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros
in configuration header file of each board which can support the
master module of Boot from SRIO and PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
BSC9131RDB is a Freescale Reference Design Board for
BSC9131 SoC which is a integrated device that contains
one powerpc e500v2 core and one DSP starcore.
To support DSP starcore
-Creating LAW and TLB for DSP-CCSR space.
-Creating LAW for DSP-core subsystem M2 memory
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
IFC errata A003399 is valid for IFC NOR boot i.e.if no on-board NOR flash or
no NOR boot, do not compile its workaround.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
A negative value of CONFIG_ENV_OFFSET is treated as a backwards offset
from the end of the eMMC device/partition, rather than a forwards offset
from the start.
This is useful when a single board may be stuffed with different eMMC
devices, each of which has a different capacity, and you always want the
environment to be stored at the very end of the device (or eMMC boot
partition for example).
One example of this case is NVIDIA's Ventana reference board.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Describe the meaning of CONFIG_ENV_IS_IN_MMC, and all related defines that
must or can be set when using that option.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch makes the minimum power-on delay for USB HUB
become configurable. The original design waits at least
100 msec here, but some EHCI controlers(e.g. Faraday EHCI)
are known to require much longer delay interval.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
The pci_indirect.c file is always compiled when
CONFIG_PCI is defined although the indirect PCI
bridge support is not needed by every board.
Introduce a new CONFIG_PCI_INDIRECT_BRIDGE
config option and only compile indirect PCI
bridge support if this options is enabled.
Also add the new option into the configuration
files of the boards which needs that.
Compile tested for powerpc, x86, arm and nds32.
MAKEALL results:
powerpc:
--------------------- SUMMARY ----------------------------
Boards compiled: 641
Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB )
----------------------------------------------------------
Note: the warnings for ELPPC and MPC8323ERDB are present even
without the actual patch.
x86:
--------------------- SUMMARY ----------------------------
Boards compiled: 1
----------------------------------------------------------
arm:
--------------------- SUMMARY ----------------------------
Boards compiled: 311
----------------------------------------------------------
nds32:
--------------------- SUMMARY ----------------------------
Boards compiled: 3
----------------------------------------------------------
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
If Falcon mode support is enabled (and the system isn't directed into
booting u-boot), it will instead try to load kernel from sector
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR and
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS of kernel argument parameters
starting from sector CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
If Falcon mode support is enabled (and the system isn't directed into
booting u-boot), it will instead try to load kernel from
CONFIG_SPL_FAT_LOAD_KERNEL_NAME file and kernel argument parameters from
CONFIG_SPL_FAT_LOAD_ARGS_NAME, both from the same partition as u-boot.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
This patch does a similar code reogranzation from
http://patchwork.ozlabs.org/patch/132179/
which is based on an old version of code (fdt support and bus selection
still not in). It merges this tidy-up on top of the recent code. It does
not make any logical change.
tpm.c implements the interface defined in tpm.h based on underlying
LPC or I2C TPM driver. tpm.c and the underlying driver communicate
throught tpm_private.h.
Note: Merging the LPC driver with tpm.c is left to future patches.
Change-Id: Ie1384f5f9e3935d3bc9a44adf8de80c5a70a5f2b
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The new name is more aligned with Linux kernel's naming of TPM driver.
Signed-off-by: Peter Huewe <peter.huewe@infineon.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.
Remove the code to avoid wasting maitaining efforts on dead stuff.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
This code is very large, and in SPL it isn't always useful to print
out image information (in fact there might not even be a console
active). So disable this feature unless this option is set.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add softswitch_output command for bf609-ezkit to enable softswitches.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Warm reset on OMAP5 freezes when USB cable is connected.
Fix requires PRM_RSTTIME.RSTTIME1 to be programmed
with the time for which reset should be held low for the
voltages and the oscillator to reach stable state.
There are 3 parameters to be considered for calculating
the time, which are mostly board and PMIC dependent.
-1- Time taken by the Oscillator to shut + restart
-2- PMIC OTP times
-3- Voltage rail ramp times, which inturn depends on the
PMIC slew rate and value of the voltage ramp needed.
In order to keep the code in u-boot simple, have a way
for boards to specify a pre computed time directly using
the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
option. If boards fail to specify the time, use a default
as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead.
Using the default value translates into some ~22ms and should work in
all cases.
However in order to avoid this large delay hiding other bugs,
its recommended that all boards look at their respective data
sheets and specify a pre computed and optimal value using
'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
In order to help future board additions to compute this
config option value, add a README at doc/README.omap-reset-time
which explains how to compute the value. Also update the toplevel
README with the additional option and pointers to
doc/README.omap-reset-time.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[rnayak@ti.com: Updated changelog and added the README]
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
