Commit graph

20295 commits

Author SHA1 Message Date
Patrick Delaunay
2e2e6d8cac video: Add video_is_active function
Add the helper function video_is_active() to test if one video device
is active.

This function can be used in board code to execute operation
only when the display is probed / really used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
b3c29dc9e5 stm32mp1: ram: remove tuning support
Remove the DDR interactive command tuning, as the support of a predefined
DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A
and the result of this tuning will be never used.

Moreover this SW tuning procedure can failed on some hardware
configuration (to many BIST errors and no convergence); it will be no
more supported in the next delivery of the DDR utilities included in
the CubeMX tool of STMicroelectronics.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
9819fe345c stm32mp1: ram: remove the support of calibration result
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional parameter "st,phy-cal"

After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
4831ba2903 stm32mp1: ram: add read valid training support
Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.

This training is supported on the PUBL integrated in the STM32MP15x
DDR subsystem and it is not required for DDR3.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Marek Vasut
8e5266eefd mmc: stm32_sdmmc2: Add support for probing bus voltage level translator
Add support for testing whether bus voltage level translator is present
and operational. This is useful on systems where the bus voltage level
translator is optional, as the translator can be auto-detected by the
driver and the feedback clock functionality can be disabled if it is
not present.

The translator test sets CMD high to avoid interfering with a card, and
then verifies whether signal set on CK is detected on CKIN. If the signal
is detected, translator is present, otherwise the CKIN feedback clock are
disabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
4c5956086a pinctrl: stmfx: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 11:20:34 +01:00
Tom Rini
2402c93130 Prepare v2022.01-rc3
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Merge tag 'v2022.01-rc3' into next

Prepare v2022.01-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-29 12:00:57 -05:00
Simon Glass
29fe555dec dm: core: Add a way to count the devices in a uclass
Add a function that returns the number of devices in a uclass. This can be
helpful in sizing an array that needs to hold a list of them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28 16:51:51 -07:00
Simon Glass
4b030177b6 dm: core: Allow finding children / uclasses by partial name
In some cases it is useful to search just by a partial name, such as
when looking for a sibling device that has a common name substring. Add
helper functions to handle these requirements.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28 16:51:51 -07:00
Simon Glass
075bfc9575 dm: core: Add a way to obtain a string list
At present we support reading a string list a string at a time. Apart
from being inefficient, this makes it impossible to separate reading of
the devicetree into the of_to_plat() method where it belongs, since any
code which needs access to the string must read it from the devicetree.

Add a function which returns the string property as an array of pointers
to the strings, which is easily used by clients.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28 16:51:51 -07:00
Simon Glass
32c6a8e1f8 dm: core: Fix up string-function documentation
The details for of_property_read_string_helper() and
ofnode_read_string_index() are a little inaccurate. Fix up the comments to
avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28 16:51:51 -07:00
Simon Glass
8044318305 dm: core: Fix handling of uclass pre_unbind method
This method is currently called after the platform data has been freed.
But the pre_unbind() method may wish to access this, e.g. to free some
data structures stored there.

Split the unbinding of devices into two pieces, as is done with removal.
This corrects the problem.

Also tidy a code-style issue in device_remove() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28 16:51:51 -07:00
Simon Glass
ce34a6653f mmc: Allow for children other than the block device
At present the MMC uclass assumes that the only child it can have is a
block device. Update this so we can add a bootmethod too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28 16:51:51 -07:00
Simon Glass
0bf61aced2 sandbox: mmc: Support a backing file
Provide a way for sandbox MMC to present data from a backing file. This
allows a filesystem to be created on the host and easily served via an
emulated mmc device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28 16:51:51 -07:00
Etienne Carriere
48108f3a6a firmware: scmi: Add OP-TEE transport
This change implements an SCMI transport for agent interfacing the
OP-TEE SCMI service. OP-TEE provides an SCMI PTA (Pseudo-TA) for
non-secure world to send SCMI messages over an identified channel.
The driver implemented here uses a SMT shared memory for passing
messages between client and server.

The implementation opens and releases channel resources for each
passed SCMI message so that resources allocated (sessions) or
registered (shared memory areas) in OP-TEE firmware are released for
example before relocation as the driver will likely allocate/register
them back when probed after relocation.

The integration of the driver using dedicated config switch
CONFIG_SCMI_AGENT_OPTEE is designed on the model posted to the
U-Boot ML by Patrick Delaunay [1].

Link: [1] https://lore.kernel.org/all/20211028191222.v3.4.Ib2e58ee67f4d023823d8b5404332dc4d7e847277@changeid/
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23 13:54:43 -05:00
Etienne Carriere
7c1a9b2eb9 tee: optee: remove unused duplicated login Id macros
Remove unused OPTEE_MSG_LOGIN_* ID macros as suitable TEE_LOGIN_* ID
macros are already defined tee.h.

Cc: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23 13:53:03 -05:00
Etienne Carriere
32190a959d firmware: scmi: smccc transport: simplify probe sequence
Minor simplification in scmi_smccc_probe() exit sequence.

Cc: Simon Glass <sjg@chromium.org>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23 13:53:03 -05:00
Etienne Carriere
3de5aef451 firmware: scmi: smccc transport: use plat data, not priv data
Change SCMI smccc transport drivers to use platform data rather
than private data for channel reference since it only stores platform
data retrieved from the DT. Consequently the probe handler is replaced
with a of_to_plat handler.

Cc: Simon Glass <sjg@chromium.org>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23 13:53:03 -05:00
Etienne Carriere
88a304f864 firmware: scmi: mailbox transport: use plat data, not priv data
Change SCMI mailbox transport drivers to use platform data rather
than private data for channel reference since it only stores platform
data retrieved from the DT. Consequently the probe handler is replaced
with a of_to_plat handler.

Cc: Simon Glass <sjg@chromium.org>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23 13:53:03 -05:00
Etienne Carriere
7b4993907a firmware: scmi: mailbox transport: fix probe failure implementation
Correct scmi mailbox probe function that can't free the scmi channel
instance since its auto-allocated by the device model framework.

Cc: Simon Glass <sjg@chromium.org>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23 13:53:03 -05:00
Patrick Delaunay
73ead2bcc5 firmware: scmi: add configs to select the supported agents
Add two configs CONFIG_SCMI_AGENT_MAILBOX and CONFIG_SCMI_AGENT_SMCCC
to select the supported agents as all the agents are not supported.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23 13:53:03 -05:00
Patrick Delaunay
d47c4fea8c power: regulator: scmi: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-23 13:53:03 -05:00
Patrick Delaunay
31dc56fca5 clk: scmi: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23 13:53:03 -05:00
Patrick Delaunay
d96315411c reset: scmi: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23 13:53:03 -05:00
Samuel Holland
f11513d997 net: phy: realtek: Add tx/rx delay config for 8211e
Some boards need to change the tx/rx delay config in order for
gigabit Ethernet to work.

In Linux commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), Realtek documented the bits for overriding the delays
from the hardware straps.

Copy the logic from linux, so the delay config is set from the PHY's
interface type (the phy-mode property in the device tree).

This removes the need for a one-off workaround for the Pine A64+ board.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:56 +02:00
Dylan Hung
8b41dedd40 drivers: net: add Aspeed MDIO driver
Add a driver for the MDIO interface for Aspeed AST2600 SOC.  The driver
only supports clause 22 for now.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-11-23 09:57:56 +02:00
Bin Meng
10aaefba52 net: tsec: Make redundant_init() static
redundant_init() is only called in the tsec driver. Make it static.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:56 +02:00
Bin Meng
04c350c337 net: fec_mxc: Declare 'promisc' as bool
priv->promisc is used as the parameter of the set_promisc() call
which accepts a bool type instead of char.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:56 +02:00
Peter Hoyes
d5ba6188df cmd: pxe_utils: Check fdtcontroladdr in label_boot
If using OF_CONTROL, fdtcontroladdr is set to the fdt used to configure
U-Boot. When using PXE, if no fdt is defined in the menu file, and
there is no fdt at fdt_addr, add fall back on fdtcontroladdr too.

We are developing board support for the Armv8r64 FVP using
config_distro_bootcmd. We are also using OF_BOARD and would like the
PXE boot option to default to the fdt provided by board_fdt_blob_setup.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:56 +02:00
Vladimir Oltean
7f7e73eee3 net: dsa: sja1105: add support for SGMII
The list of ports which support SGMII depending on switch generation is
available here:
https://www.kernel.org/doc/html/latest/networking/dsa/sja1105.html#port-compatibility-matrix

SGMII can either be used to connect to an external PHY or to the host
port. In the first case, the use of in-band autoneg is expected, in the
last, in-band autoneg is expected to be turned off (fixed-link). So the
driver supports both cases.

SGMII support means configuring the PCS and PMA. The PCS is a Synopsys
Designware XPCS, in Linux this has a separate driver but here it is
embedded within the sja1105 driver. If needed it can be taken out later,
although we would need a UCLASS_PCS for it, which we don't have atm.

Nonetheless, I did go all the way to export an internal MDIO bus for PCS
access, because it is nice to be able to debug the PCS through commands
such as:

=> mdio read ethernet-switch@1-pcs 4 1f.0
Reading from bus ethernet-switch@1-pcs
PHY at address 4:
31.0 - 0x1140

The internal MDIO bus is not registered with DM because there is no
udevice on it, as mentioned. But the XPCS code can still be ripped out,
as needed.

I did not add support for 2500base-x because I do not expect this
interface type to be used as a boot source for anybody, it would just
add unnecessary bloat.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:56 +02:00
Vladimir Oltean
f24b666b22 net: dsa: add driver for NXP SJA1105 L2 switch
The SJA1105 driver is largely reused from Linux. Its programming model
is that it is blank out of reset, and it waits for a static
configuration stream over SPI, which contains all runtime parameters (it
has no notion of "default values").

Keeping a binary array for the configuration stream would have meant
that aspects such as the CPU port and the MAC speeds could have not been
configured easily, and would have been static and board-dependent.
Live-patching the binary array means recalculating the static config
table CRCs, which is not a fun process.

So we create an abstraction over the static config tables, using the
packing API, same as in Linux. The tables are kept as C structures, and
the binary configuration stream is constructed on-the-go, with CRC and
all.

All static config tables instantiated in this driver are mandatory.
The hardware reference manual can be found at:
https://www.nxp.com/docs/en/user-guide/UM10944.pdf

For tagging, a simplified version of tag_8021q from Linux is used. The
VLAN EtherType is the same (0xdadb) but since we don't want switching in
U-Boot, there is no reason to have a TX VLAN and an RX VLAN for each
port. We just need the RX VLANs to act as the unique pvid of each
front-panel port, to decode the switch port number. The RX VLAN is used
for both RX and TX.

The device tree bindings are the same as in Linux.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:56 +02:00
Vladimir Oltean
e3789a7262 net: dsa: felix: configure the in-band autoneg property based on OF node info
Instead of trying to guess which operating modes need in-band
negotiation to be active and which ones don't, parse the available
information from the device tree. That will be correct in the cases we
can already guess, and more.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:55 +02:00
Vladimir Oltean
2dd6acb795 net: introduce a helper to determine whether to use in-band autoneg
Certain serial SERDES protocols like 1000base-x, 2500base-x, SGMII,
USXGMII can operate either in a mode where the PHY (be it on-board or
inside an SFP module) passes the link parameters (speed, duplex, pause)
to the MAC through in-band through control words standardized by IEEE
802.3 clause 37, or in a mode where the MAC must configure (force) its
link parameters based on information obtained out-of-band (MDIO reads,
guesswork etc).

In Linux, the OF node property named "managed" is parsed by the phylink
framework, and the convention is that if a driver uses phylink, then the
presence of this property means that in-band autoneg should be enabled,
otherwise it shouldn't.

To be compatible with the OF node bindings of drivers that use phylink
in Linux, introduce parsing support for this property in U-Boot too.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:55 +02:00
Vladimir Oltean
9dcb810b88 net: tsec: add support for promiscuous mode
The Freescale TSEC can be a DSA master, and the ports of the attached
DSA switch can have different MAC addresses compared to the TSEC.
Nonetheless, the TSEC must receive the packets on behalf of those switch
ports. Therefore, implement the promiscuous mode method to allow DSA to
set this.

Note that the init_registers() function called from eth_ops :: start
overwrites this setting. There is no reason why the RCTRL register
should be zero-initialized, so just stop clearing it so that the setting
we applied in eth_ops :: set_promisc sticks.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:55 +02:00
Vladimir Oltean
4a4e52f05f net: phy: mscc: add support for VSC8502 in dual RGMII mode
The VSC8502 is a Microchip (formerly Microsemi, formerly Vitesse)
dual port, gigabit Ethernet copper PHY which supports the MII, GMII and
RGMII MAC-side interfaces.

Of these, I could only test RGMII, and my board needed RGMII delays to
be applied by software, so I am able to confirm that this patch handles
that properly.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:55 +02:00
Tom Rini
454a97485a - pinctrl: Correct the driver GPIO declaration
- meson64_android: handle errors on boot and run fastboot on boot failure
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Merge tag 'u-boot-amlogic-20211119' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- pinctrl: Correct the driver GPIO declaration
- meson64_android: handle errors on boot and run fastboot on boot failure
2021-11-19 16:33:33 -05:00
Simon Glass
886d36efdb pinctrl: meson: Correct the driver GPIO declaration
This should use the provided U_BOOT_DRIVER() macro so that the driver gets
added to the appropriate linker list. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7c9dcfed50 ("pinctrl: meson: rework gx pmx function")
Reported-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> on libretech-cc
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-11-19 18:15:26 +01:00
Tom Rini
f9bab982ae Revert "nvme: Enable FUA"
Unaddressed review comments.

This reverts commit b6bfb8971d.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-18 20:18:34 -05:00
Tom Rini
8e2a782af3 Revert "nvme: Fix error in nvme_setup_prps"
Dependent commit has unaddressed review comments.

This reverts commit c4eef59faa.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-18 20:18:22 -05:00
Aswath Govindraju
1ac3b72077 usb: cdns3: cdns3-ti: Add compatible for AM64 SoC
Add new compatible for AM64 SoC.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-11-17 17:09:47 -05:00
Aswath Govindraju
82c65587f6 phy: cadence: phy-cadence-torrent: Change the name of subnode searched
Search for "phy" in the subnode names, to syncup with kernel.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-11-17 17:09:47 -05:00
Jon Lin
c4eef59faa nvme: Fix error in nvme_setup_prps
Consulting to "NVM Express® Base Specification, revision 2.0".

If more PRP List pages are required, then the last entry of
the PRP List contains the Page Base Address of the next PRP
List page. The next PRP List page shall be memory page aligned.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
2021-11-17 17:09:47 -05:00
Jon Lin
b6bfb8971d nvme: Enable FUA
Most NVME devcies maintain data in internal cache for an uncertain
times, and u-boot has no method to force NVME to flush cache.
So this patch adds FUA to avoid data loss caused by power off after data
programming.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
2021-11-17 17:09:47 -05:00
Alistair Delva
4f2e228086 RFC: arm: pci: Add PCI cam support to PCI-E ecam driver
When booting U-Boot in crosvm, the virtual machine emulates a PCI cam
device, not the PCI-E 'ecam' device normally seen on e.g. QEMU. This
PCI device can be supported with only trivial changes to the ecam
driver.

Instead of adding a completely new driver which is identical besides the
initialization step, add support for the PCI version to the existing
driver.

Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: Ram Muthiah <rammuthiah@google.com>
2021-11-17 17:09:47 -05:00
Chia-Wei Wang
89c36cca0b crypto: aspeed: Add AST2600 ACRY support
ACRY is designed to accelerate ECC/RSA digital signature
generation and verification.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17 17:05:00 -05:00
Chia-Wei Wang
af6451187c clk: ast2600: Add RSACLK control for ACRY
Add RSACLK enable for ACRY, the HW RSA/ECC crypto engine
of ASPEED AST2600 SoCs.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17 17:05:00 -05:00
Johnny Huang
9fcdd98e54 crypto: aspeed: Add AST2600 HACE support
Hash and Crypto Engine (HACE) is designed to accelerate the
throughput of hash data digest, and symmetric-key encryption.

Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-17 17:05:00 -05:00
Joel Stanley
4080714f5e clk: ast2600: Add YCLK control for HACE
Add YCLK enable for HACE, the HW hash engine of
ASPEED AST2600 SoCs.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17 17:05:00 -05:00
Julien Masson
faf5d4d53d mmc: mtk-sd: implement waiting for DAT0 line state
With the recent changes on mmc driver, we saw that the boot is ~5 secs
longer compared to v2021.07 on mediatek platforms.

This regression is seen during mmc_init and caused by the following
patch [1].

Indeed since we did not support poll dat0, we fulfilled the condition
of [1] and a delay of 500 ms was added for every __mmc_switch call.

By adding the support of wait_dat0(), we now don't need to mdelay
during mmc_init anymore.

[1]: https://patchwork.ozlabs.org/project/uboot/patch/1629192034-64056-1-git-send-email-ye.li@nxp.com/

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-17 17:04:59 -05:00
Pali Rohár
a4bc38da27 pci: Add standard PCIe ECAM macros
Lot of PCIe controllers are using ECAM addressing. So add common ECAM
macros into U-Boot's pci.h header file which can be suitable for most
PCI controller drivers.

Replace custom ECAM address macros in every PCI controller driver by new
ECAM macros from U-Boot's pci.h header file.

Similar macros are defined also in Linux kernel. There is a small
difference between Linux and these new U-Boot macros.

U-Boot's PCIE_ECAM_OFFSET() takes device and function numbers in separate
arguments. Linux's PCIE_ECAM_OFFSET() takes device and function numbers
encoded in one argument. The reason is that U-Boot's PCI_DEVFN() macro is
different than Linux's PCI_SLOT() macro. So having device and function
numbers in separate arguments makes code more straightforward.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-17 17:04:58 -05:00