Commit graph

61246 commits

Author SHA1 Message Date
Bin Meng
bf275222ab Bring all testings in gitlab and travis CI to Azure Pipelines
This expands current Azure Pipelines Windows host tools build
testing to cover all the CI testing in gitlab and travis CI.

Note for some unknown reason, the 'container' cannot be used for
any jobs that have buildman, for buildman does not exit properly
and hangs the job forever. As a workaround, we manually call
docker to run the image to perform the CI tasks.

A complete run on Azure Pipelines takes about 2 hours and 10
minutes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-29 16:17:36 -04:00
Bin Meng
d3c369d196 .travis.yml: Remove the unneeded '&' for ls20xx buildman
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-10-29 16:17:36 -04:00
Bin Meng
6cdd177ca9 arm: mvebu: Avoid generating kwbimage.cfg in the source tree
At present some boards generate kwbimage.cfg in the source tree
during the build. This breaks buildman testing on some systems
where the source tree is read-only. Update makefile rules to
generate it in the build tree instead.

Note some other boards have the kwbimage.cfg file written in
advance, hence we need check if the file exists in the build
tree first, otherwise we fall back to one in the source tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-29 16:17:36 -04:00
Bin Meng
578b637203 tools: buildman: Remove useless mkdir() in Make() in test.py
In the 'Make' function, the codes tries to create a directory
if current stage is 'build'. But the directory isn't used at
all anywhere.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-29 16:17:39 -04:00
Bin Meng
bc750bca12 tools: buildman: Honor output directory when generating boards.cfg
buildman always generates boards.cfg in the U-Boot source tree.
When '-o' is given, we should generate boards.cfg to the given
output directory.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-29 16:17:36 -04:00
Peng Fan
a335f80502 spl: spl_mmc: fix getting raw_sect when boot from emmc boot partition
On i.MX8, when booting from eMMC boot partition, the whole flash.bin
is stored in boot partition, however SPL switches to user partition
during the init of mmc driver:
  spl_mmc_load() -> mmc_init()

Then it tries to load the container image in
spl_mmc_get_uboot_raw_sector(), but here it reads the data from user
partition and the header is not recognized as a valid header.

So we move spl_mmc_get_uboot_raw_sector after eMMC partition switch
to address this issue.

Anyway put spl_mmc_get_uboot_raw_sector before eMMC partition switch
is not correct, so let's move it after eMMC partition switch.

Reported-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-29 10:09:44 +08:00
Yangbo Lu
5d336d1701 mmc: fsl_esdhc: drop i.MX DDR support code
A previous patch below adding DDR mode support was actually for i.MX
platforms. Now i.MX eSDHC driver is fsl_esdhc_imx.c. For QorIQ eSDHC,
it uses different process for DDR mode, and hasn't been supported.
Let's drop DDR support code for i.MX in fsl_esdhc driver.

0e1bf61 mmc: fsl_esdhc: Add support for DDR mode

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-29 10:09:22 +08:00
Yangbo Lu
2913926f3b mmc: fsl_esdhc: remove redundant DM_MMC checking
Remove redundant DM_MMC checking which is already in DM_MMC conditional
compile block.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-29 10:09:21 +08:00
Yangbo Lu
41dec2fe99 mmc: fsl_esdhc: make BLK as hard requirement of DM_MMC
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.

- Drop non-BLK support for DM_MMC introduced by below patch.
  66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled

- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).

- Use DM_MMC instead of BLK for conditional compile.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-10-29 10:09:21 +08:00
Bin Meng
d2e680fa55 Add Microsoft Azure Pipelines configuration
Microsoft Azure Pipelines [1] provides unlimited CI/CD minutes and
10 parallel jobs to every open source project for free.

This adds a configuration file for Azure Pipelines to utilize the
free Windows VM hosted by Microsoft to ensure no build broken in
building U-Boot host tools for Windows.

[1] https://azure.microsoft.com/en-us/blog/announcing-azure-pipelines-with-unlimited-ci-cd-minutes-for-open-source/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:51 -04:00
Bin Meng
4d90f6cd98 tools: Avoid creating symbolic links for tools/version.h
When building U-Boot host tools for Windows from Microsoft Azure
Pipelines, the following errors were seen:

  HOSTCC  tools/mkenvimage.o
  In file included from tools/mkenvimage.c:25:
  ./tools/version.h:1:1: error: expected identifier or ‘(’ before ‘.’ token
     1 | ../include/version.h
       | ^
  tools/mkenvimage.c: In function ‘main’:
  tools/mkenvimage.c:117:4: warning: implicit declaration of function ‘usage’ [-Wimplicit-function-declaration]
   117 |    usage(prg);
       |    ^~~~~
  tools/mkenvimage.c:120:35: error: ‘PLAIN_VERSION’ undeclared (first use in this function)
   120 |    printf("%s version %s\n", prg, PLAIN_VERSION);
       |                                   ^~~~~~~~~~~~~
  tools/mkenvimage.c:120:35: note: each undeclared identifier is reported only once for each function it appears in
  make[2]: *** [scripts/Makefile.host:114: tools/mkenvimage.o] Error 1

It turns out tools/version.h is a symbolic link and with Windows
default settings it is unsupported hence the actual content of
tools/version.h is not what file include/version.h has, but the
the linked file path, which breaks the build.

To fix this, remove the symbolic links for tools/version.h. Instead
we perform a copy from include/version.h during the build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:51 -04:00
Bin Meng
1f35137997 Add .gitattributes for line endings
When building U-Boot host tools for Windows from Microsoft Azure
Pipelines, we see tons of weird warnings and errors emitted from
every Kconfig files:

  Kconfig:6:warning: ignoring unsupported character ''
  Kconfig:6:warning: ignoring unsupported character ''
  Kconfig:8:warning: ignoring unsupported character ''
  Kconfig:9:warning: ignoring unsupported character ''
  Kconfig:10:warning: ignoring unsupported character ''
  Kconfig:10:warning: ignoring unsupported character ''
  Kconfig:13:warning: ignoring unsupported character ''
  arch/Kconfig:1:warning: ignoring unsupported character ''
  arch/Kconfig:2:warning: ignoring unsupported character ''
  arch/Kconfig:2:warning: ignoring unsupported character ''
  arch/Kconfig:4:warning: ignoring unsupported character ''
  ...

After several rounds of experiments, it turns out this is caused
by line endings. Historically, Linux and macOS used linefeed (LF)
characters while Windows used a carriage return plus a linefeed
(CRLF). When Azure Pipelines checks out the U-Boot repo, Git tries
to compensate for the difference by automatically making lines end
in CRLF in the working directory on Windows, which confuses the
Kconfig file parsing logic.

Fortunately Git provides a way for repos to tell Git not to do such
automatical line endings conversion via .gitattributes file below:

* text eol=lf

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:51 -04:00
Bin Meng
7114d89e08 doc: Add documentation for how to build U-Boot host tools
This adds a reST document for how to build U-Boot host tools,
including information for both Linux and Windows.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:51 -04:00
Bin Meng
ccd4398fa7 tools: ifwitool: Define __packed when it is not defined
Some compilers may provide __packed define for us.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:51 -04:00
Bin Meng
10289b4ed9 linux/types.h: Surround 'struct ustat' with __linux__
'struct ustat' uses linux-specific typedefs to declare its memebers:
__kernel_daddr_t and __kernel_ino_t. It is currently not used by any
U-Boot codes, but when we build U-Boot tools for other platform like
Windows, this becomes a problem.

Let's surround it with __linux__.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:51 -04:00
Bin Meng
afd3bf4318 tools: zynqmpbif: Use compiler builtin instead of linux-specific __swab32
__swab32() is a Linux specific macro defined in linux/swab.h. Let's
use the compiler equivalent builtin function __builtin_bswap32() for
better portability.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:51 -04:00
Bin Meng
a7c9a65ed9 tools: mtk_image.h: Use portable uintXX_t instead of linux-specific __leXX
__leXX has Linux kernel specific __attribute__((bitwise)) which is
not portable. Use corresponding uintXX_t instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:51 -04:00
Bin Meng
1af5e97d8d tools: image.h: Use portable uint32_t instead of linux-specific __be32
__be32 has Linux kernel specific __attribute__((bitwise)) which is
not portable. Use uint32_t instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-28 13:32:50 -04:00
Jean-Jacques Hiblot
d60ae4c59d fdt: Fix alignment issue when reading 64-bits properties from fdt
The FDT specification [0] gives a requirement of aligning properties on
32-bits. Make sure that the compiler is aware of this constraint when
accessing 64-bits properties.

[0]: https://github.com/devicetree-org/devicetree-specification/blob/master/source/flattened-format.rst

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-27 13:01:53 -06:00
Kever Yang
97b5f9d1a0 dm: core: Update log method for uclass_find_device_by_seq
Use log() insted of debug() for uclass_find_device_by_seq function,
since this print is very much and we can filter it out with log()
interface.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move #define to top of file as per docs:
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 13:01:43 -06:00
Dmitry Torokhov
8ab452d587 patman: separate emails in CC list with NULs
There is a contributor in Linux kernel with a comma in their name, which
confuses patman and results in invalid to- or cc- addresses on some
patches. To avoid this, let's use \0 as a separator when generating cc
file.

Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
31f9f0ea57 bootstage: Allow SPL to obtain bootstage info from TPL
It is possible to enable bootstage in TPL. TPL can stash the info for SPL.
But at present this information is then lost because SPL does not read
from the stash.

Add support for SPL not being the first phase to enable bootstage.
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
5256beecb8 bootstage: Mark the start/end of TPL and SPL separately
At present bootstage in TPL and SPL use the same ID so it is not possible
to see the timing of each. Separate out the IDs and use the correct one
depending on which phase we are at.

Example output:

Timer summary in microseconds (14 records):
       Mark    Elapsed  Stage
          0          0  reset
    224,787    224,787  TPL
    282,248     57,461  end TPL
    341,067     58,819  SPL
    925,436    584,369  end SPL
    931,710      6,274  board_init_f
  1,035,482    103,772  board_init_r
  1,387,852    352,370  main_loop
  1,387,911         59  id=175

Accumulated time:
                   196  dm_r
                 8,300  dm_spl
                14,139  dm_f
               229,121  fsp-m
               262,992  fsp-s

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
ac9cd4805c bootstage: Correct relocation algorithm
At present bootstage relocation assumes that it is possible to point back
to memory available before relocation, so it does not relocate the
strings. However this is not the case on some platforms, such as x86 which
uses the cache as RAM and loses access to this when the cache is enabled.

Move the relocation step to before U-Boot relocates, expand the allocated
region to include space for the strings and relocate the strings at the
same time as the bootstage records.

This ensures that bootstage data can remain accessible from TPL through
SPL to U-Boot before/after relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
65b2d96f4c bootstage: Avoid conflicts between stash/unstash
At present there is a single shared address for bootstage data in both
TPL and SPL. If SPL unstashs TPL bootstage info and then stashes it again
to pass it to U-Boot, the new stash overwrites the strings of the old
stash.

Fix this by duplicating the strings into the malloc() region. This should
be a small code. Fix the header-file order at the same time.

This problem doesn't happen at the next stage (SPL->U-Boot) since U-Boot
relocates the boostage data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
ed54bdaf88 bootstage: Fix counting of entries in stash
The current code searches for empty records but these not existing with
bootstage now. This used to be needed when bootstage records were stored
in a spare array.

Drop the unnecessary code and fix a code-style nit at the same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
53a4f253f1 bootstage: Store the next ID in the stash
When stashing bootstage info, store the next ID so that it can be used
when the stash is restored. This avoids the ID starting at zero and
potentially overwriting existing entries.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
5074a8a3c0 bloblist: Reserve an aligned base
Make sure that the bloblist starts on an aligned boundary. This protects
against one of the early allocating causing the alignment to be lost.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
831c161119 tiny-printf: Reorder code to support %p
With a bit of code reordering we can support %p using the existing code
for ulong.

Move the %p code up and adjust the logic accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:51 -06:00
Simon Glass
dee74e6cc4 tiny-printf: Add print_grouped_ull()
This function is used in the bootstage report which may be trigged in TPL
or TPL. Add a very basic implication of this function so that it builds.
There is no attempt to get the formatting right, since this would add too
much code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-10-27 10:56:51 -06:00
Simon Glass
1c1c8a3a99 tiny-printf: Reduce size by removing ctype
The ctype array is brought into the image, adding 256 bytes, when it is
unlikely to be needed. The extra code for %p is only present when DEBUG
is defined, so let's drop ctype as well unless DEBUG is defined.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-27 10:56:41 -06:00
Jean-Jacques Hiblot
2333dc47b8 test: regmap: check the values read from the regmap
The test did reads after writes but didn't check the value.
It probably was because the sandbox didn't implement the writeX/readX
functions.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Updated to use sandbox_set_enable_memio():
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-27 10:56:41 -06:00
Simon Glass
5ca5ec1e32 dm: regmap: Fix mask in regmap_update_bits()
This function assumes that the 'val' parameter has no masked bits set.
This is not defined by the function prototype though. Fix the function to
mask the value and update the documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-27 10:56:41 -06:00
Simon Glass
619025b8d6 sandbox: test: Add a prototype for sandbox_set_enable_memio()
This function needs a prototype so that tests can use it. Add one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-27 10:56:41 -06:00
Simon Glass
8417385dc9 sandbox: Drop 'const' from sandbox_write()
This function writes to its address so the address should not be declared
as const. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-27 10:56:41 -06:00
Simon Glass
91a8c95623 sandbox: test: Show hex values on failure
Quite a few tests use addresses or hex values for comparisons. Add hex
output for test failures, e.g.:

   0x55ca22fa == reg: Expected 0x55ca22fa (1439310586),
	got 0x55ea22fb (1441407739)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-27 10:56:41 -06:00
Tom Rini
ffc379b42c - bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
 - mtmips: add new drivers for clock, reset-controller and pinctrl
 - mtmips: add support for high speed UART
 - mtmips: update/enhance drivers for SPI and ethernet
 - mtmips: add support for MMC
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Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips

- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
2019-10-25 20:07:24 -04:00
Tom Rini
15147dc6a9 Merge branch '2019-10-24-ti-imports'
- Enable DFU on dra7xx boards
- Further Keystone 3 platform improvements
2019-10-25 17:33:28 -04:00
Suman Anna
d0e134b909 arm: dts: k3-am65: Add R5F ranges in interconnect nodes
Add the address spaces for the R5F cores in MCU domain to the ranges
property of the cbass_mcu interconnect node so that the addresses
within the R5F nodes can be translated properly by the relevant OF
address API.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
22b548044b armv7R: K3: j721e: Add support for triggering ddr init from SPL
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
ec2fa9f76e arm: dts: k3-j721e: Add ddr node
Use the 3733MTs DDR configuration that is auto generated from
DDR_Regconfig tool.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2019-10-25 17:33:21 -04:00
Kevin Scholz
3bb3f266ee ram: k3-j721e: Add support for J721E DDR controller
The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper
logic to integrate these blocks in the device. The DDR subsystem is
used to provide an interface to external SDRAM devices which can be
utilized for storing program or data. Introduce support for the
DDR controller and DDR phy within the DDR subsystem.

Signed-off-by: Kevin Scholz <k-scholz@ti.com
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
ffb6b8e540 dt-bindings: memory-controller: Introduce J721E DDRSS bindings
Add DT binding documentation for DDR sub system present on J721E device.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
James Doublesin
34f27b2e86 ram: k3-am654: Do not rely on default values for certain DDR register
Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.

Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that same register). Also update the dts files in the same
patch to maintain git bisectability.

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
James Doublesin
c78ac7a0c9 ram: k3-am654: add support for LPDDR4 and DDR3L DDRs
Added training support for LPDDR4 and DDR3L DDRs.  Also added/changed
some register configuration to support all 3 DDR types

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
James Doublesin
d5e08fd204 armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename
The current configuration of DDR on AM654 base board is for 1600MTs but
the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
Since 1600MHz is misleading, rename it to
k3-am654-base-board-ddr4-1600MTs.dtsi

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
e938b22521 arm: K3: Clean and invalidate Linux Image before jumping to Linux
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
by set/way in cleanup_before_linux(). Additionally there is a custom
hook provided to clean and invalidate L3 cache.

Unfortunately on K3 devices(having a coherent architecture), there is no
easy way to quickly clean all the cache lines for L3. The entire address
range needs to be cleaned and invalidated by Virtual Address. This can
be implemented using the L3 custom hook but it take lot of time to clean
the entire address range. In the interest of boot time this might not be
a viable solution.

The best hit is to make sure the loaded Linux image is flushed so that
the entire image is written to DDR from L3. When Linux starts running with
caches disabled the full image is available from DDR.

Reported-by: Andrew F. Davis <afd@ti.com>
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
683cdd6837 cmd: booti: Store OS start and end info in images structure
Store the start and end of the OS image that is loaded in images
structure.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
899a9de3e4 boot: arm: Enable support for custom board_prep_linux
Once the arch specific boot_prepare_linux completes, boards wants to
have a custom preparation for linux. Add support for a custom
board_prep_linux.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Faiz Abbas
18df182b63 configs: dra7xx_evm: Increase the size of SPL_MULTI_DTB_FIT
Expand SPL_MULTI_DTB_FIT to accommodate usb peripheral nodes being
added to support SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-25 17:33:21 -04:00