Commit graph

91178 commits

Author SHA1 Message Date
Marek Vasut
a80e0e7711 ARM: imx: Enable kaslrseed command on DH i.MX8M Plus DHCOM
Linux 6.6.y with KASLR enabled would print the following message on boot:
"
KASLR disabled due to lack of seed
"
Enable the 'kaslrseed' command so a random number seed can be pulled
from CAAM and inserted into the /chosen node 'kaslr-seed' property of
Linux kernel DT before boot, thus letting KASLR work properly.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2024-01-22 08:40:02 -03:00
Fabio Estevam
0912368af3 pico-dwarf/hobbit-imx6ul: Convert to CONFIG_DM_SERIAL
The conversion to CONFIG_DM_SERIAL is mandatory, so select
this option.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2024-01-22 08:39:41 -03:00
Fabio Estevam
b06bfd65b6 wandboard: Convert to watchdog driver model
Commit 68dcbdd594 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.

Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2024-01-22 08:39:27 -03:00
Marek Vasut
67de291400 ARM: imx: Configure GIC clock parent on Data Modul i.MX8M Plus eDM SBC
The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT
and fill in the GIC clock configuration code.

Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2024-01-22 08:39:08 -03:00
Marek Vasut
4dd80cb09e ARM: imx: Enable SPL_BOARD_INIT on DH i.MX8M Plus DHCOM
The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT .

Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2024-01-22 08:38:48 -03:00
Fabio Estevam
f8cebb4f78 imx8m: Enable LTO by default
In an attempt to select ARMV8_SPL_EXCEPTION_VECTORS, the SPL size
could not fit into the internal SRAM of some imx8m targets:

   aarch64:  +   imx8mm_phg
+aarch64-linux-ld.bfd: u-boot-spl section `__u_boot_list' will not fit in region `.sram'
+aarch64-linux-ld.bfd: region `.sram' overflowed by 1824 bytes

Select LTO to prevent that.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2024-01-22 08:38:32 -03:00
Dinesh Maniyam
3c9bb8fbdc arm: dts: agilex: Increase reserved memory size to 32MB
The reserved space is extended to 32MB in Linux kernel because
additional space is needed for authorization execution of JIC/RBF file.
U-Boot required to align with Linux.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2024-01-22 16:51:29 +08:00
Dinesh Maniyam
9d8f814beb clk: altera: n5x: Fix MEMCLKMGR_EXTCNTRST_C0CNTRST to bit(0)
MEMCLKMGR_EXTCNTRST_C0CNTRST register defined as BIT[0] in documentation
but it is wrongly defined as BIT[7] in u-boot code. This register is used
to hold associated pingpong counter in reset
while PLL and 5:1 mux configuration is changed.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2024-01-22 16:51:17 +08:00
Dinesh Maniyam
158d648d9f arm: socfpga: stratix10: SPI clock support
This patch is to add SPI clock support for stratix10. Get clock rate
function always returning 0 because the DW-SPI driver get the rate
from clock node in dts but Stratix10 does not support device tree
clock node.To overcome this spi will get the clock_rate directly
from spi clock controller override the weaker function.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2024-01-22 16:50:55 +08:00
Tom Rini
22aeab2d96 Pull request efi-2024-04-rc1-3
Documentation:
 
 * correct documentation of part_get_bootable()
 * remove duplicate word "has" in UEFI documentation
 
 UEFI:
 
 * rename check_disk_has_default_file function
 * auto-generate boot option for each blkio device
 * auto-generate removable media boot option first
 * avoid pointer access after calling efi_delete_handle
 * create common function to free struct efi_disk_obj
 * return immediately in UCLASS_EFI_LOADER removal
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Merge tag 'efi-2024-04-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2024-04-rc1-3

Documentation:

* correct documentation of part_get_bootable()
* remove duplicate word "has" in UEFI documentation

UEFI:

* rename check_disk_has_default_file function
* auto-generate boot option for each blkio device
* auto-generate removable media boot option first
* avoid pointer access after calling efi_delete_handle
* create common function to free struct efi_disk_obj
* return immediately in UCLASS_EFI_LOADER removal
2024-01-21 09:11:33 -05:00
Masahisa Kojima
2c98f7435c efi_loader: return immediately in UCLASS_EFI_LOADER removal
In case of UCLASS_EFI_LOADER, EFI handles are managed by
EFI application/driver, we must not delete EFI handles.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-01-21 11:24:24 +01:00
Masahisa Kojima
0351b659dd efi_loader: create common function to free struct efi_disk_obj
Current error handling of creating raw disk/partition has
following issues.
 - duplicate free for EFI handle, EFI handle is already freed
   in efi_delete_handle()
 - missing free for struct efi_device_path and
   struct efi_simple_file_system_protocol in some error paths

To address those issues, this commit creates the common function
to free the struct efi_disk_obj resources and calls it in case
of error.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-01-21 11:24:24 +01:00
Masahisa Kojima
f674a2f9a9 efi_loader: avoid pointer access after calling efi_delete_handle
efi_delete_handle() calls efi_purge_handle(), then it finally
frees the EFI handle.
Both diskobj and handle variables in efi_disk_remove() have
the same pointer, we can not access diskobj->dp after calling
efi_delete_handle().

This commit saves the struct efi_device_path pointer before
calling efi_delete_handle(). This commit also fixes the
missing free for volume member in struct efi_disk_obj.

This commit also removes the container_of() calls, and
adds the TODO comment of missing efi_close_protocol() call
for the parent EFI_BLOCK_IO_PROTOCOL.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-01-21 11:24:24 +01:00
Masahisa Kojima
3f7822bf9f efi_loader: auto-generate removable media boot option first
This commit auto-generates the boot option for removable
block io devices followed by fixed block io devices.
This is what EDK II reference implementation does.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-01-21 11:24:24 +01:00
Masahisa Kojima
f86fba8adb efi_loader: auto-generate boot option for each blkio device
Current efibootmgr auto-generates the boot option for all
disks and partitions installing EFI_SIMPLE_FILE_SYSTEM_PROTOCOL,
while EDK II reference implementation auto-generates the boot option
for all devices installing  EFI_BLOCK_IO_PROTOCOL with
eliminating logical partitions.

This commit modifies the efibootmgr to get aligned to EDK II.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-01-21 11:24:24 +01:00
Masahisa Kojima
eb2f0867a1 efi_loader: rename check_disk_has_default_file function
check_disk_has_default_file() function checks if the
architecture-specific default file exists on the block
device, and fills the default file device path if it exists.

Rename the function name to fill_default_file_path().

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-01-21 11:24:24 +01:00
Heinrich Schuchardt
e75e4cf5d9 part: correct documentation of part_get_bootable()
We have to use 'Return:' to render the description of the return value in
the HTML documentation.

Fixes: f55aa4454a ("part: Add a fallback for part_get_bootable()")
Fixes: dcffa4428d ("part: Add a function to find the first bootable partition")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-01-21 11:24:24 +01:00
Wei Ming Chen
0d7634ebc1 doc: uefi: remove duplicate word "has"
There should be only one "has" instead of "has has"

Signed-off-by: Wei Ming Chen <jj251510319013@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-01-21 11:24:18 +01:00
Tom Rini
3c04fcf313 Merge patch series "k3-j721e: beagleboneai: Fix USB"
Roger Quadros <rogerq@kernel.org> says:

Hi,

This series fixes USB operation on k3-j721e based boards.
2024-01-20 11:39:13 -05:00
Roger Quadros
172c846f39 configs/j721e_beagleboneai64_a72_defconfig: Enable Sierra PHY
This is required for USB Super-Speed operation.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-01-20 11:38:18 -05:00
Roger Quadros
17d3cb7610 arm: dts: k3-j721e-beagleboneai64: Fix USB operation
Without correct SERDES MUX and Lane control settings
USB0 will be broken. Set the MUX and Lane control devices
to be auto probed so they are configured correctly.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-01-20 11:38:18 -05:00
Roger Quadros
7d5a12018e arm: dts: k3-j721e: Fix USB0 operation
Without correct SERDES MUX and Lane control settings
USB0 will be broken. Set the MUX and Lane control devices
to be auto probed so they are configured correctly.

Fixes: 69b19ca67b ("arm: dts: k3-j721e: Sync with v6.6-rc1")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-01-20 11:38:18 -05:00
Roger Quadros
cd295286c7 usb: cdns3: avoid error messages if phys don't exist
The phys property is optional so don't complain
if it doesn't exist in device tree.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-01-20 11:38:18 -05:00
Roger Quadros
434f84b749 board: ti: j721e: Drop SERDES PHY init from board file
Since commit 69b19ca67b ("arm: dts: k3-j721e: Sync with v6.6-rc1"),
the following error message is seen at u-boot
	"Sierra init failed:-19"

Probing and initializing the SERDES PHY from
board file is not a clean solution so drop it.

Proper use case should be via PHY_UCLASS APIs.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-01-20 11:38:18 -05:00
Shantur Rathore
fea3efb757 Kconfig: boot: Imply BOOTSTD_DEFAULT when BOOTSTD_FULL=y
We need BOOTSTD_DEFAULT when BOOTSTD_FULL is selected.

Signed-off-by: Shantur Rathore <i@shantur.com>
2024-01-19 18:30:08 -05:00
Tom Rini
83a8424722 Add CMDLINE dependecy for CMD_STM32KEY
STM32MP1:
 ---------
 Set stdio to serial on DH STM32MP15xx DHSOM
 Fix reset for usart1 in scmi configuration
 
 STM32MP2:
 ---------
 Add BSEC and OTP support for STM32MP25
 Fix CONFIG_STM32MP25X flag usage
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Merge tag 'u-boot-stm32-20240119' of https://source.denx.de/u-boot/custodians/u-boot-stm

Add CMDLINE dependecy for CMD_STM32KEY

STM32MP1:
---------
Set stdio to serial on DH STM32MP15xx DHSOM
Fix reset for usart1 in scmi configuration

STM32MP2:
---------
Add BSEC and OTP support for STM32MP25
Fix CONFIG_STM32MP25X flag usage
2024-01-19 11:59:28 -05:00
Patrice Chotard
8a4d098bb0 stm32mp2: Fix CONFIG_STM32MP25X flag usage
"#if" was used instead of "#ifdef"

Fixes: 01a701994b ("stm32mp2: initial support")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 15:49:20 +01:00
Patrick Delaunay
c2c2977227 stm32mp: Add dependencies on CMDLINE for command stm32key
We cannot use stm32key commands without CONFIG_CMDLINE so add the
required condition.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2024-01-19 15:10:06 +01:00
Marek Vasut
82f5942e51 ARM: stm32: Set stdio to serial on DH STM32MP15xx DHSOM
In case CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are enabled, the console
stdin, stdout, stderr must be defined in environment. Define the default
settings to fix the following warning on boot:

"
In:    No input devices available!
Out:   No output devices available!
Err:   No error devices available!
"

Sort the default environment as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2024-01-19 15:07:12 +01:00
Tom Rini
f4d5486506 Merge branch '2024-01-18-assorted-fixes'
- A number of OS boot related cleanups, a number of TI platform
  fixes/cleanups, SMBIOS fixes, tweak get_maintainers.pl to report me
  for more places, fix the "clean the build" pytest and add a bootstage
  pytest, fix PKCS11 URI being omitted in some valid cases, make an iommu
  problem easier to debug on new platforms, nvme and pci improvements,
  refactor image-host code a bit, fix a typo in env setting, add a missing
  dependency for CMD_LICENSE, and correct how we call getchar() in some
  places.
2024-01-19 08:46:47 -05:00
Patrick Delaunay
9f1dc110cc arm: Rename STM32MP15x
CONFIG options must not use lower-case letter. Convert this and related
ones to upper case.

Signed-off-by: Simon Glass <sjg@chromium.org
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2024-01-19 14:38:59 +01:00
Patrick Delaunay
49de864a25 arm: Rename STM32MP13x
CONFIG options must not use lower-case letter. Convert this and related
ones to upper case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2024-01-19 14:38:59 +01:00
Patrick Delaunay
eff29f0a60 board: st: stm32mp2: display the board identification
Add the display of the STMicroelectronics board identification saved in OTP
in stm32mp2 checkboard function.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 14:38:59 +01:00
Patrick Delaunay
1067d7e3a0 board: st: stm32mp2: add checkboard
Implement the weak function checkboard to identify the used board with
compatible in device tree for the support of stm32mp2 STMicroelectronics
boards.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 14:38:59 +01:00
Patrick Delaunay
ebf32b2548 stm32mp: activate the command stboard for stm32mp25 boards
Activate the command stboard for stm32mp25 STMicroelectronics boards,
add the default used OTP identifier and the associated board identifier:
- stm32mp25xx-ev1 = MB1936
- stm32mp25xx-dk = MB1605

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2024-01-19 14:38:59 +01:00
Patrick Delaunay
4d58bb32d1 stm32mp: stm32prog: add support of stm32mp25
Change OTP number to 364 for STM32MP25 as it is done in bsec driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2024-01-19 14:38:12 +01:00
Patrick Delaunay
8eb535e3b0 smt32mp: add setup_mac_address for stm32mp25
Add a function setup_mac_address() to update the MAC address from the
default location in OTP for stm32mp2 platform.

The max number of OTP for MAC address is increased to 8 for STM32MP25,
defined with get_eth_nb() and checked in setup_mac_address.

The MAC address FF:FF:FF:FF:FF:FF, the broadcast ethaddr, is a invalid
value used for unused MAC address slot in OTP, for example for board
with STM32MP25x part number allows up to 5 ethernet ports but it is not
supported by the hardware, without switch; the associated variable
"enetaddr%d" is not created.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 14:38:01 +01:00
Patrice Chotard
9c2f5b8ad6 stm32mp: add setup_serial_number for stm32mp25
Add support of serial number for stm32mp25, gets from OTP with BSEC driver.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2024-01-19 14:37:50 +01:00
Patrick Delaunay
1af148da84 stm32mp: add soc.c file
Add a new file soc.c for common functions between stm32mp1 and stm32mp2
family and move print_cpuinfo() in this new file.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2024-01-19 14:37:10 +01:00
Patrick Delaunay
c20e0fc7d6 configs: stm32mp25: add support of fuse command
Add support of the command fuse with CONFIG_CMD_FUSE to allow access
on OTP with command line.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 14:19:43 +01:00
Patrick Delaunay
e508b597f0 stm32mp: bsec: add support of stm32mp25
Add support of BSEC for STM32MP25x family to access OTP.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 14:19:42 +01:00
Patrick Delaunay
0d0266c46c stm32mp: bsec: add driver data
Add driver data in  BSEC driver to test presence of OP-TEE TA,
mandatory for STM32MP13 family and prepare the support of new device
with more OTP than 95.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 14:19:42 +01:00
Yann Gautier
5c76937659 arm: stm32mp: add Rev.B support for STM32MP25
Add chip revision B support for STM32MP25, for displaying it in trace.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 14:19:42 +01:00
Patrick Delaunay
792122baa7 arm64: dts: st: add bsec support to stm32mp25
Add BSEC support to STM32MP25 SoC family with SoC information:
- RPN = Device part number (BSEC_OTP_DATA9)
- PKG = package data register (Bits 2:0 of BSEC_OTP_DATA122)

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-01-19 14:19:42 +01:00
Patrice Chotard
ea5a4d69d8 ARM: dts: stm32: Fix reset for usart1 in scmi configuration
In SCMI configuration, usart1 is secure, so all its resources are secured
(clock and reset) and can't be set/unset by non-secure world but by OP-TEE.

Fixes: 6cccc8d396 ("ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)")

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2024-01-19 14:03:28 +01:00
Tom Rini
cb49375239 Merge tag 'u-boot-rockchip-20240119' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add board: rk3328 FriendlyARM NanoPi R2C Plus, rk3588 Turing RK1 SoM;
- Enable SPI boot for rk3588 and rk3528;
- Set boot device in SPL as common code;
- other misc fixes;
2024-01-19 08:02:58 -05:00
Quentin Schulz
c16c7ac2fe rockchip: rk3128: remove noop file
arch_cpu_init is already returning 0 in its weak definition in
common/board_f.c so let's just remove the file entirely since nothing
else is done in it.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19 10:57:36 +08:00
Quentin Schulz
f66d9dd81f rockchip: remove unused global data ptr
Remove leftover import and global data ptr from files since they aren't
used anymore.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19 10:57:36 +08:00
Quentin Schulz
d57e16c7e7 rockchip: find U-boot proper boot device by inverting the logic that sets it
BOOT_DEVICE_* is set by spl_node_to_boot_device() depending on the block
device number associated with the MMC device the SPL used to load U-Boot
proper from. It is NOT related to the mmc alias in the Device Tree.

For SPI flashes, all SPI flashes will return BOOT_DEVICE_SPI so there's
currently no way to know from which one the SPL loaded U-Boot proper
from. Therefore, let's just find the first valid candidate in
/chosen/u-boot,spl-boot-order that is a SPI flash and return that path.
This is a best effort.

While the original implementation may have worked, using the exact same
mechanism but in inverted fashion makes it less likely to have
surprising corner-cases or side-effects.

A nice side-effect is that all existing and future Rockchip SoCs now
automatically have their /chosen/u-boot,spl-boot-device set.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19 10:57:36 +08:00
Quentin Schulz
948b315e41 rockchip: factor out spl_perform_fixups into common spl-boot-order
All SoCs are susceptible to wanting to know which storage medium was
used to load U-Boot SPL. So instead of reimplementing the same functions
in SoCs over and over again (here just rk3399 and px30 but rk3588 is
coming), let's just put all this in common into spl-boot-order.c
allowing to support a new SoC just by defining the spl_boot_devices
array in the appropriate SoC file.

Note that spl_perform_fixups() now calls spl_image_fdt_addr() to get the
address of the fdt instead of directly reading the
spl_image_info->fdt_addr member, because that member is not guaranteed
to be present (guarded with compile flags). This is essential because we
move the logic away from px30 and rk3399 which had those compile flags
enabled to code run for all Rockchip SoCs.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19 10:57:36 +08:00