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Add CMDLINE dependecy for CMD_STM32KEY

Browse source 
STM32MP1:
 ---------
 Set stdio to serial on DH STM32MP15xx DHSOM
 Fix reset for usart1 in scmi configuration
 
 STM32MP2:
 ---------
 Add BSEC and OTP support for STM32MP25
 Fix CONFIG_STM32MP25X flag usage
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Merge tag 'u-boot-stm32-20240119' of https://source.denx.de/u-boot/custodians/u-boot-stm

Add CMDLINE dependecy for CMD_STM32KEY

STM32MP1:
---------
Set stdio to serial on DH STM32MP15xx DHSOM
Fix reset for usart1 in scmi configuration

STM32MP2:
---------
Add BSEC and OTP support for STM32MP25
Fix CONFIG_STM32MP25X flag usage
This commit is contained in:
Tom Rini 2024-01-19 11:59:28 -05:00
commit 83a8424722
35 changed files with 307 additions and 183 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/arm/dts/Makefile
View file

@ -1363,10 +1363,10 @@ dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
dtb-$(CONFIG_STM32MP13x) += \
dtb-$(CONFIG_STM32MP13X) += \
stm32mp135f-dk.dtb
dtb-$(CONFIG_STM32MP15x) += \
dtb-$(CONFIG_STM32MP15X) += \
stm32mp157a-dk1.dtb \
stm32mp157a-dk1-scmi.dtb \
stm32mp157a-icore-stm32mp1-ctouch2.dtb \

2
arch/arm/dts/stm32mp15-scmi-u-boot.dtsi
View file

@ -135,7 +135,7 @@
};
&usart1 {
resets = <&rcc USART1_R>;
resets = <&scmi_reset RST_SCMI_USART1>;
};
&usart2 {

2
arch/arm/dts/stm32mp15-u-boot.dtsi
View file

@ -206,7 +206,7 @@
resets = <&rcc UART8_R>;
};
#if defined(CONFIG_STM32MP15x_STM32IMAGE)
#if defined(CONFIG_STM32MP15X_STM32IMAGE)
&binman {
u-boot-stm32 {
filename = "u-boot.stm32";

4
arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
View file

@ -22,13 +22,13 @@
st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
config {
u-boot,mmc-env-partition = "ssbl";
};
#endif
#ifdef CONFIG_STM32MP15x_STM32IMAGE
#ifdef CONFIG_STM32MP15X_STM32IMAGE
/* only needed for boot with TF-A, witout FIP support */
firmware {
optee {

4
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
View file

@ -20,13 +20,13 @@
st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
config {
u-boot,mmc-env-partition = "ssbl";
};
#endif
#ifdef CONFIG_STM32MP15x_STM32IMAGE
#ifdef CONFIG_STM32MP15X_STM32IMAGE
/* only needed for boot with TF-A, witout FIP support */
firmware {
optee {

4
arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
View file

@ -28,7 +28,7 @@
#address-cells = <1>;
#size-cells = <1>;
#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
partition@0 {
label = "fsbl1";
reg = <0x00000000 0x00040000>;
@ -82,7 +82,7 @@
#address-cells = <1>;
#size-cells = <1>;
#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
partition@0 {
label = "fsbl";
reg = <0x00000000 0x00200000>;

4
arch/arm/dts/stm32mp25-u-boot.dtsi
View file

@ -37,6 +37,10 @@
};
};
&bsec {
bootph-all;
};
&gpioa {
bootph-all;
};

16
arch/arm/dts/stm32mp251.dtsi
View file

@ -127,6 +127,22 @@
};
};
bsec: efuse@44000000 {
compatible = "st,stm32mp25-bsec";
reg = <0x44000000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
part_number_otp@24 {
reg = <0x24 0x4>;
};
package_otp@1e8 {
reg = <0x1e8 0x1>;
bits = <0 3>;
};
};
syscfg: syscon@44230000 {
compatible = "st,stm32mp25-syscfg", "syscon";
reg = <0x44230000 0x10000>;

9
arch/arm/mach-stm32mp/Kconfig
View file

@ -35,9 +35,9 @@ config ENV_SIZE
choice
prompt "Select STMicroelectronics STM32MPxxx Soc"
default STM32MP15x
default STM32MP15X
config STM32MP13x
config STM32MP13X
bool "Support STMicroelectronics STM32MP13x Soc"
select ARM_SMCCC
select CPU_V7A
@ -55,7 +55,7 @@ config STM32MP13x
support of STMicroelectronics SOC STM32MP13x family
STMicroelectronics MPU with core ARMv7
config STM32MP15x
config STM32MP15X
bool "Support STMicroelectronics STM32MP15x Soc"
select ARCH_SUPPORT_PSCI
select BINMAN
@ -127,7 +127,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
config STM32_ETZPC
bool "STM32 Extended TrustZone Protection"
depends on STM32MP15x || STM32MP13x
depends on STM32MP15X || STM32MP13X
default y
imply BOOTP_SERVERIP
help
@ -144,6 +144,7 @@ config STM32_ECDSA_VERIFY
config CMD_STM32KEY
bool "command stm32key to fuse public key hash"
depends on CMDLINE
help
fuse public key hash in corresponding fuse used to authenticate
binary.

4
arch/arm/mach-stm32mp/Kconfig.13x
View file

@ -1,10 +1,10 @@
if STM32MP13x
if STM32MP13X
choice
prompt "STM32MP13x board select"
optional
config TARGET_ST_STM32MP13x
config TARGET_ST_STM32MP13X
bool "STMicroelectronics STM32MP13x boards"
imply BOOTSTAGE
imply CMD_BOOTSTAGE

6
arch/arm/mach-stm32mp/Kconfig.15x
View file

@ -1,6 +1,6 @@
if STM32MP15x
if STM32MP15X
config STM32MP15x_STM32IMAGE
config STM32MP15X_STM32IMAGE
bool "Support STM32 image for generated U-Boot image"
depends on TFABOOT
help
@ -11,7 +11,7 @@ choice
prompt "STM32MP15x board select"
optional
config TARGET_ST_STM32MP15x
config TARGET_ST_STM32MP15X
bool "STMicroelectronics STM32MP15x boards"
imply BOOTSTAGE
imply CMD_BOOTSTAGE

5
arch/arm/mach-stm32mp/Makefile
View file

@ -6,9 +6,10 @@
obj-y += dram_init.o
obj-y += syscon.o
obj-y += bsec.o
obj-y += soc.o
obj-$(CONFIG_STM32MP15x) += stm32mp1/
obj-$(CONFIG_STM32MP13x) += stm32mp1/
obj-$(CONFIG_STM32MP15X) += stm32mp1/
obj-$(CONFIG_STM32MP13X) += stm32mp1/
obj-$(CONFIG_STM32MP25X) += stm32mp2/
obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o

45
arch/arm/mach-stm32mp/bsec.c
View file

@ -20,7 +20,6 @@
#include <linux/iopoll.h>
#include <linux/printk.h>
#define BSEC_OTP_MAX_VALUE 95
#define BSEC_OTP_UPPER_START 32
#define BSEC_TIMEOUT_US 10000
@ -400,6 +399,11 @@ struct stm32mp_bsec_priv {
struct udevice *tee;
};
struct stm32mp_bsec_drvdata {
int size;
bool ta;
};
static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
{
struct stm32mp_bsec_plat *plat;
@ -609,6 +613,7 @@ static int stm32mp_bsec_read(struct udevice *dev, int offset,
void *buf, int size)
{
struct stm32mp_bsec_priv *priv = dev_get_priv(dev);
struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev);
int ret;
int i;
bool shadow = true, lock = false;
@ -642,7 +647,7 @@ static int stm32mp_bsec_read(struct udevice *dev, int offset,
otp = offs / sizeof(u32);
for (i = otp; i < (otp + nb_otp) && i <= BSEC_OTP_MAX_VALUE; i++) {
for (i = otp; i < (otp + nb_otp) && i < data->size; i++) {
u32 *addr = &((u32 *)buf)[i - otp];
if (lock)
@ -665,6 +670,7 @@ static int stm32mp_bsec_write(struct udevice *dev, int offset,
const void *buf, int size)
{
struct stm32mp_bsec_priv *priv = dev_get_priv(dev);
struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev);
int ret = 0;
int i;
bool shadow = true, lock = false;
@ -698,7 +704,7 @@ static int stm32mp_bsec_write(struct udevice *dev, int offset,
otp = offs / sizeof(u32);
for (i = otp; i < otp + nb_otp && i <= BSEC_OTP_MAX_VALUE; i++) {
for (i = otp; i < otp + nb_otp && i < data->size; i++) {
u32 *val = &((u32 *)buf)[i - otp];
if (lock)
@ -732,6 +738,7 @@ static int stm32mp_bsec_of_to_plat(struct udevice *dev)
static int stm32mp_bsec_probe(struct udevice *dev)
{
struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev);
int otp;
struct stm32mp_bsec_plat *plat;
struct clk_bulk clk_bulk;
@ -745,16 +752,22 @@ static int stm32mp_bsec_probe(struct udevice *dev)
}
if (IS_ENABLED(CONFIG_OPTEE))
bsec_optee_open(dev);
ret = bsec_optee_open(dev);
else
ret = -ENOTSUPP;
/* failed if OP-TEE TA is required */
if (data->ta && !ret)
return ret;
/*
* update unlocked shadow for OTP cleared by the rom code
* only executed in SPL, it is done in TF-A for TFABOOT
*/
if (IS_ENABLED(CONFIG_SPL_BUILD)) {
if (IS_ENABLED(CONFIG_SPL_BUILD) && !data->ta) {
plat = dev_get_plat(dev);
for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
/* here 57 is the value for STM32MP15x ROM code, only MPU with SPL support*/
for (otp = 57; otp < data->size; otp++)
if (!bsec_read_SR_lock(plat->base, otp))
bsec_shadow_register(dev, plat->base, otp);
}
@ -762,9 +775,25 @@ static int stm32mp_bsec_probe(struct udevice *dev)
return 0;
}
static const struct stm32mp_bsec_drvdata stm32mp13_data = {
.size = 96,
.ta = true,
};
static const struct stm32mp_bsec_drvdata stm32mp15_data = {
.size = 96,
.ta = false,
};
static const struct stm32mp_bsec_drvdata stm32mp25_data = {
.size = 368, /* 384 but no access to HWKEY and STM32PRVKEY */
.ta = true,
};
static const struct udevice_id stm32mp_bsec_ids[] = {
{ .compatible = "st,stm32mp13-bsec" },
{ .compatible = "st,stm32mp15-bsec" },
{ .compatible = "st,stm32mp13-bsec", .data = (ulong)&stm32mp13_data},
{ .compatible = "st,stm32mp15-bsec", .data = (ulong)&stm32mp15_data},
{ .compatible = "st,stm32mp25-bsec", .data = (ulong)&stm32mp25_data},
{}
};

20
arch/arm/mach-stm32mp/cmd_stm32key.c
View file

@ -19,8 +19,8 @@
* STM32MP13x: 0b111111 = 0x3F for OTP_SECURED closed device
*/
#define STM32_OTP_CLOSE_ID 0
#define STM32_OTP_STM32MP13x_CLOSE_MASK 0x3F
#define STM32_OTP_STM32MP15x_CLOSE_MASK BIT(6)
#define STM32_OTP_STM32MP13X_CLOSE_MASK 0x3F
#define STM32_OTP_STM32MP15X_CLOSE_MASK BIT(6)
/* PKH is the first element of the key list */
#define STM32KEY_PKH 0
@ -61,29 +61,29 @@ static u8 stm32key_index;
static u8 get_key_nb(void)
{
if (IS_ENABLED(CONFIG_STM32MP13x))
if (IS_ENABLED(CONFIG_STM32MP13X))
return ARRAY_SIZE(stm32mp13_list);
if (IS_ENABLED(CONFIG_STM32MP15x))
if (IS_ENABLED(CONFIG_STM32MP15X))
return ARRAY_SIZE(stm32mp15_list);
}
static const struct stm32key *get_key(u8 index)
{
if (IS_ENABLED(CONFIG_STM32MP13x))
if (IS_ENABLED(CONFIG_STM32MP13X))
return &stm32mp13_list[index];
if (IS_ENABLED(CONFIG_STM32MP15x))
if (IS_ENABLED(CONFIG_STM32MP15X))
return &stm32mp15_list[index];
}
static u32 get_otp_close_mask(void)
{
if (IS_ENABLED(CONFIG_STM32MP13x))
return STM32_OTP_STM32MP13x_CLOSE_MASK;
if (IS_ENABLED(CONFIG_STM32MP13X))
return STM32_OTP_STM32MP13X_CLOSE_MASK;
if (IS_ENABLED(CONFIG_STM32MP15x))
return STM32_OTP_STM32MP15x_CLOSE_MASK;
if (IS_ENABLED(CONFIG_STM32MP15X))
return STM32_OTP_STM32MP15X_CLOSE_MASK;
}
static int get_misc_dev(struct udevice **dev)

12
arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
View file

@ -23,12 +23,20 @@
#define CMD_SIZE 512
/* SMC is only supported in SPMIN for STM32MP15x */
#ifdef CONFIG_STM32MP15x
#ifdef CONFIG_STM32MP15X
#define OTP_SIZE_SMC 1024
#else
#define OTP_SIZE_SMC 0
#endif
#define OTP_SIZE_TA 776
/* size of the OTP struct in NVMEM PTA */
#define _OTP_SIZE_TA(otp) (((otp) * 2 + 2) * 4)
#if defined(CONFIG_STM32MP13X) || defined(CONFIG_STM32MP15X)
/* STM32MP1 with BSEC2 */
#define OTP_SIZE_TA _OTP_SIZE_TA(96)
#else
/* STM32MP2 with BSEC3 */
#define OTP_SIZE_TA _OTP_SIZE_TA(368)
#endif
#define PMIC_SIZE 8
enum stm32prog_target {

24
arch/arm/mach-stm32mp/include/mach/stm32.h
View file

@ -71,11 +71,11 @@ enum forced_boot_mode {
* only address used before device tree parsing
*/
#if defined(CONFIG_STM32MP15x) || defined(CONFIG_STM32MP13x)
#if defined(CONFIG_STM32MP15X) || defined(CONFIG_STM32MP13X)
#define STM32_RCC_BASE 0x50000000
#define STM32_PWR_BASE 0x50001000
#define STM32_SYSCFG_BASE 0x50020000
#ifdef CONFIG_STM32MP15x
#ifdef CONFIG_STM32MP15X
#define STM32_DBGMCU_BASE 0x50081000
#endif
#define STM32_FMC2_BASE 0x58002000
@ -88,11 +88,11 @@ enum forced_boot_mode {
#define STM32_STGEN_BASE 0x5C008000
#define STM32_TAMP_BASE 0x5C00A000
#ifdef CONFIG_STM32MP15x
#ifdef CONFIG_STM32MP15X
#define STM32_USART1_BASE 0x5C000000
#define STM32_USART2_BASE 0x4000E000
#endif
#ifdef CONFIG_STM32MP13x
#ifdef CONFIG_STM32MP13X
#define STM32_USART1_BASE 0x4c000000
#define STM32_USART2_BASE 0x4c001000
#endif
@ -107,7 +107,7 @@ enum forced_boot_mode {
#define STM32_SDMMC2_BASE 0x58007000
#define STM32_SDMMC3_BASE 0x48004000
#ifdef CONFIG_STM32MP15x
#ifdef CONFIG_STM32MP15X
#define STM32_SYSRAM_BASE 0x2FFC0000
#define STM32_SYSRAM_SIZE SZ_256K
#endif
@ -129,7 +129,7 @@ enum forced_boot_mode {
/* TAMP registers */
#define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x)
#ifdef CONFIG_STM32MP15x
#ifdef CONFIG_STM32MP15X
#define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4)
#define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5)
#define TAMP_FWU_BOOT_INFO_REG TAMP_BACKUP_REGISTER(10)
@ -149,7 +149,7 @@ enum forced_boot_mode {
#define TAMP_COPRO_STATE_CRASH 5
#endif
#ifdef CONFIG_STM32MP13x
#ifdef CONFIG_STM32MP13X
#define TAMP_BOOTCOUNT TAMP_BACKUP_REGISTER(31)
#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(30)
#endif
@ -157,7 +157,7 @@ enum forced_boot_mode {
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_STM32MP15X || CONFIG_STM32MP13X */
#if CONFIG_STM32MP25X
#ifdef CONFIG_STM32MP25X
#define STM32_RCC_BASE 0x44200000
#define STM32_TAMP_BASE 0x46010000
@ -181,14 +181,14 @@ enum forced_boot_mode {
#define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4)
/* BSEC OTP index */
#ifdef CONFIG_STM32MP15x
#ifdef CONFIG_STM32MP15X
#define BSEC_OTP_RPN 1
#define BSEC_OTP_SERIAL 13
#define BSEC_OTP_PKG 16
#define BSEC_OTP_MAC 57
#define BSEC_OTP_BOARD 59
#endif
#ifdef CONFIG_STM32MP13x
#ifdef CONFIG_STM32MP13X
#define BSEC_OTP_RPN 1
#define BSEC_OTP_SERIAL 13
#define BSEC_OTP_MAC 57
@ -197,7 +197,9 @@ enum forced_boot_mode {
#ifdef CONFIG_STM32MP25X
#define BSEC_OTP_SERIAL 5
#define BSEC_OTP_RPN 9
#define BSEC_OTP_PKG 246
#define BSEC_OTP_PKG 122
#define BSEC_OTP_BOARD 246
#define BSEC_OTP_MAC 247
#endif
#ifndef __ASSEMBLY__

1
arch/arm/mach-stm32mp/include/mach/sys_proto.h
View file

@ -97,6 +97,7 @@ u32 get_bootauth(void);
int get_eth_nb(void);
int setup_mac_address(void);
int setup_serial_number(void);
/* board power management : configure vddcore according OPP */
void board_vddcore_init(u32 voltage_mv);

118
arch/arm/mach-stm32mp/soc.c Normal file
View file

@ -0,0 +1,118 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
/*
* Copyright (C) 2024, STMicroelectronics - All Rights Reserved
*/
#include <env.h>
#include <misc.h>
#include <net.h>
#include <asm/arch/sys_proto.h>
#include <dm/device.h>
#include <dm/uclass.h>
/* max: 8 OTP for 5 mac address on stm32mp2*/
#define MAX_NB_OTP 8
/* used when CONFIG_DISPLAY_CPUINFO is activated */
int print_cpuinfo(void)
{
char name[SOC_NAME_SIZE];
get_soc_name(name);
printf("CPU: %s\n", name);
return 0;
}
int setup_serial_number(void)
{
char serial_string[25];
u32 otp[3] = {0, 0, 0 };
struct udevice *dev;
int ret;
if (env_get("serial#"))
return 0;
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_SERIAL),
otp, sizeof(otp));
if (ret < 0)
return ret;
sprintf(serial_string, "%08X%08X%08X", otp[0], otp[1], otp[2]);
env_set("serial#", serial_string);
return 0;
}
/*
* If there is no MAC address in the environment, then it will be initialized
* (silently) from the value in the OTP.
*/
__weak int setup_mac_address(void)
{
int ret;
int i;
u32 otp[MAX_NB_OTP];
uchar enetaddr[ARP_HLEN];
struct udevice *dev;
int nb_eth, nb_otp, index;
if (!IS_ENABLED(CONFIG_NET))
return 0;
nb_eth = get_eth_nb();
if (!nb_eth)
return 0;
/* 6 bytes for each MAC addr and 4 bytes for each OTP */
nb_otp = DIV_ROUND_UP(ARP_HLEN * nb_eth, 4);
if (nb_otp > MAX_NB_OTP) {
log_err("invalid number of OTP = %d, max = %d\n", nb_otp, MAX_NB_OTP);
return -EINVAL;
}
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), otp, 4 * nb_otp);
if (ret < 0)
return ret;
for (index = 0; index < nb_eth; index++) {
/* MAC already in environment */
if (eth_env_get_enetaddr_by_index("eth", index, enetaddr))
continue;
for (i = 0; i < ARP_HLEN; i++)
enetaddr[i] = ((uint8_t *)&otp)[i + ARP_HLEN * index];
/* skip FF:FF:FF:FF:FF:FF */
if (is_broadcast_ethaddr(enetaddr))
continue;
if (!is_valid_ethaddr(enetaddr)) {
log_err("invalid MAC address %d in OTP %pM\n",
index, enetaddr);
return -EINVAL;
}
log_debug("OTP MAC address %d = %pM\n", index, enetaddr);
ret = eth_env_set_enetaddr_by_index("eth", index, enetaddr);
if (ret) {
log_err("Failed to set mac address %pM from OTP: %d\n",
enetaddr, ret);
return ret;
}
}
return 0;
}

4
arch/arm/mach-stm32mp/stm32mp1/Makefile
View file

@ -5,8 +5,8 @@
obj-y += cpu.o
obj-$(CONFIG_STM32MP13x) += stm32mp13x.o
obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
obj-$(CONFIG_STM32MP13X) += stm32mp13x.o
obj-$(CONFIG_STM32MP15X) += stm32mp15x.o
obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
ifdef CONFIG_SPL_BUILD

96
arch/arm/mach-stm32mp/stm32mp1/cpu.c
View file

@ -14,8 +14,8 @@
#include <log.h>
#include <lmb.h>
#include <misc.h>
#include <net.h>
#include <spl.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/arch/stm32.h>
#include <asm/arch/sys_proto.h>
@ -158,17 +158,6 @@ void enable_caches(void)
dcache_enable();
}
/* used when CONFIG_DISPLAY_CPUINFO is activated */
int print_cpuinfo(void)
{
char name[SOC_NAME_SIZE];
get_soc_name(name);
printf("CPU: %s\n", name);
return 0;
}
static void setup_boot_mode(void)
{
const u32 serial_addr[] = {
@ -291,89 +280,6 @@ static void setup_boot_mode(void)
clrsetbits_le32(TAMP_BOOT_CONTEXT, TAMP_BOOT_FORCED_MASK, BOOT_NORMAL);
}
/*
* If there is no MAC address in the environment, then it will be initialized
* (silently) from the value in the OTP.
*/
__weak int setup_mac_address(void)
{
int ret;
int i;
u32 otp[3];
uchar enetaddr[6];
struct udevice *dev;
int nb_eth, nb_otp, index;
if (!IS_ENABLED(CONFIG_NET))
return 0;
nb_eth = get_eth_nb();
/* 6 bytes for each MAC addr and 4 bytes for each OTP */
nb_otp = DIV_ROUND_UP(6 * nb_eth, 4);
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), otp, 4 * nb_otp);
if (ret < 0)
return ret;
for (index = 0; index < nb_eth; index++) {
/* MAC already in environment */
if (eth_env_get_enetaddr_by_index("eth", index, enetaddr))
continue;
for (i = 0; i < 6; i++)
enetaddr[i] = ((uint8_t *)&otp)[i + 6 * index];
if (!is_valid_ethaddr(enetaddr)) {
log_err("invalid MAC address %d in OTP %pM\n",
index, enetaddr);
return -EINVAL;
}
log_debug("OTP MAC address %d = %pM\n", index, enetaddr);
ret = eth_env_set_enetaddr_by_index("eth", index, enetaddr);
if (ret) {
log_err("Failed to set mac address %pM from OTP: %d\n",
enetaddr, ret);
return ret;
}
}
return 0;
}
static int setup_serial_number(void)
{
char serial_string[25];
u32 otp[3] = {0, 0, 0 };
struct udevice *dev;
int ret;
if (env_get("serial#"))
return 0;
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_SERIAL),
otp, sizeof(otp));
if (ret < 0)
return ret;
sprintf(serial_string, "%08X%08X%08X", otp[0], otp[1], otp[2]);
env_set("serial#", serial_string);
return 0;
}
__weak void stm32mp_misc_init(void)
{
}

10
arch/arm/mach-stm32mp/stm32mp1/fdt.c
View file

@ -270,12 +270,12 @@ static int stm32_fdt_fixup_etzpc(void *fdt, int soc_node)
int offset, shift;
u32 addr, status, decprot[ETZPC_DECPROT_NB];
if (IS_ENABLED(CONFIG_STM32MP13x)) {
if (IS_ENABLED(CONFIG_STM32MP13X)) {
array = stm32mp13_ip_addr;
array_size = ARRAY_SIZE(stm32mp13_ip_addr);
}
if (IS_ENABLED(CONFIG_STM32MP15x)) {
if (IS_ENABLED(CONFIG_STM32MP15X)) {
array = stm32mp15_ip_addr;
array_size = ARRAY_SIZE(stm32mp15_ip_addr);
}
@ -491,10 +491,10 @@ int ft_system_setup(void *blob, struct bd_info *bd)
cpu = get_cpu_type();
get_soc_name(name);
if (IS_ENABLED(CONFIG_STM32MP13x))
if (IS_ENABLED(CONFIG_STM32MP13X))
stm32mp13_fdt_fixup(blob, soc, cpu, name);
if (IS_ENABLED(CONFIG_STM32MP15x)) {
if (IS_ENABLED(CONFIG_STM32MP15X)) {
stm32mp15_fdt_fixup(blob, soc, cpu, name);
/*
@ -505,7 +505,7 @@ int ft_system_setup(void *blob, struct bd_info *bd)
* under CONFIG_STM32MP15x_STM32IMAGE only for compatibility
* when FIP is not used by TF-A
*/
if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE) &&
if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE) &&
!tee_find_device(NULL, NULL, NULL, NULL))
stm32_fdt_disable_optee(blob);
}

14
arch/arm/mach-stm32mp/stm32mp2/cpu.c
View file

@ -67,19 +67,11 @@ void enable_caches(void)
dcache_enable();
}
/* used when CONFIG_DISPLAY_CPUINFO is activated */
int print_cpuinfo(void)
{
char name[SOC_NAME_SIZE];
get_soc_name(name);
printf("CPU: %s\n", name);
return 0;
}
int arch_misc_init(void)
{
setup_serial_number();
setup_mac_address();
return 0;
}

3
arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
View file

@ -167,6 +167,9 @@ void get_soc_name(char name[SOC_NAME_SIZE])
case CPU_REV1:
cpu_r = "A";
break;
case CPU_REV2:
cpu_r = "B";
break;
default:
break;
}

2
board/st/common/Kconfig
View file

@ -1,7 +1,7 @@
config CMD_STBOARD
bool "stboard - command for OTP board information"
depends on ARCH_STM32MP
default y if TARGET_ST_STM32MP15x || TARGET_ST_STM32MP13x
default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15X || TARGET_ST_STM32MP13X
help
This compile the stboard command to
read and write the board in the OTP.

2
board/st/common/cmd_stboard.c
View file

@ -49,7 +49,9 @@ static bool check_stboard(u16 board)
0x1298,
0x1341,
0x1497,
0x1605, /* stm32mp25xx-dk */
0x1635,
0x1936, /* stm32mp25xx-ev1 */
};
for (i = 0; i < ARRAY_SIZE(st_board_id); i++)

4
board/st/stm32mp1/Kconfig
View file

@ -1,4 +1,4 @@
if TARGET_ST_STM32MP15x
if TARGET_ST_STM32MP15X
config SYS_BOARD
default "stm32mp1"
@ -12,7 +12,7 @@ config SYS_CONFIG_NAME
source "board/st/common/Kconfig"
endif
if TARGET_ST_STM32MP13x
if TARGET_ST_STM32MP13X
config SYS_BOARD
default "stm32mp1"

6
board/st/stm32mp1/stm32mp1.c
View file

@ -114,7 +114,7 @@ int checkboard(void)
int fdt_compat_len;
if (IS_ENABLED(CONFIG_TFABOOT)) {
if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE))
if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE))
mode = "trusted - stm32image";
else
mode = "trusted";
@ -616,7 +616,7 @@ error:
static bool board_is_stm32mp15x_dk2(void)
{
if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) &&
of_machine_is_compatible("st,stm32mp157c-dk2"))
return true;
@ -625,7 +625,7 @@ static bool board_is_stm32mp15x_dk2(void)
static bool board_is_stm32mp15x_ev1(void)
{
if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) &&
(of_machine_is_compatible("st,stm32mp157a-ev1") ||
of_machine_is_compatible("st,stm32mp157c-ev1") ||
of_machine_is_compatible("st,stm32mp157d-ev1") ||

37
board/st/stm32mp2/stm32mp2.c
View file

@ -8,14 +8,51 @@
#include <config.h>
#include <env.h>
#include <fdt_support.h>
#include <log.h>
#include <misc.h>
#include <asm/global_data.h>
#include <asm/arch/sys_proto.h>
#include <dm/device.h>
#include <dm/ofnode.h>
#include <dm/uclass.h>
/*
* Get a global data pointer
*/
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
int ret;
u32 otp;
struct udevice *dev;
const char *fdt_compat;
int fdt_compat_len;
fdt_compat = ofnode_get_property(ofnode_root(), "compatible", &fdt_compat_len);
log_info("Board: stm32mp2 (%s)\n", fdt_compat && fdt_compat_len ? fdt_compat : "");
/* display the STMicroelectronics board identification */
if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(stm32mp_bsec),
&dev);
if (!ret)
ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
&otp, sizeof(otp));
if (ret > 0 && otp)
log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
otp >> 16,
(otp >> 12) & 0xF,
(otp >> 4) & 0xF,
((otp >> 8) & 0xF) - 1 + 'A',
otp & 0xF);
}
return 0;
}
/* board dependent setup after realloc */
int board_init(void)
{

4
configs/stm32mp13_defconfig
View file

@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x180000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000
CONFIG_ENV_OFFSET=0x900000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk"
CONFIG_STM32MP13x=y
CONFIG_STM32MP13X=y
CONFIG_DDR_CACHEABLE_SIZE=0x8000000
CONFIG_CMD_STM32KEY=y
CONFIG_TARGET_ST_STM32MP13x=y
CONFIG_TARGET_ST_STM32MP13X=y
CONFIG_ENV_OFFSET_REDUND=0x940000
CONFIG_CMD_STM32PROG=y
# CONFIG_ARMV7_NONSEC is not set

2
configs/stm32mp15_basic_defconfig
View file

@ -13,7 +13,7 @@ CONFIG_SPL_STACK=0x30000000
CONFIG_SPL=y
CONFIG_CMD_STM32KEY=y
CONFIG_TYPEC_STUSB160X=y
CONFIG_TARGET_ST_STM32MP15x=y
CONFIG_TARGET_ST_STM32MP15X=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
CONFIG_CMD_STM32PROG=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y

2
configs/stm32mp15_defconfig
View file

@ -9,7 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_DDR_CACHEABLE_SIZE=0x8000000
CONFIG_CMD_STM32KEY=y
CONFIG_TYPEC_STUSB160X=y
CONFIG_TARGET_ST_STM32MP15x=y
CONFIG_TARGET_ST_STM32MP15X=y
CONFIG_ENV_OFFSET_REDUND=0x940000
CONFIG_CMD_STM32PROG=y
# CONFIG_ARMV7_NONSEC is not set

4
configs/stm32mp15_trusted_defconfig
View file

@ -9,8 +9,8 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_DDR_CACHEABLE_SIZE=0x10000000
CONFIG_CMD_STM32KEY=y
CONFIG_TYPEC_STUSB160X=y
CONFIG_STM32MP15x_STM32IMAGE=y
CONFIG_TARGET_ST_STM32MP15x=y
CONFIG_STM32MP15X_STM32IMAGE=y
CONFIG_TARGET_ST_STM32MP15X=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
CONFIG_CMD_STM32PROG=y
# CONFIG_ARMV7_NONSEC is not set

1
configs/stm32mp25_defconfig
View file

@ -21,6 +21,7 @@ CONFIG_CMD_ADTIMG=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_CACHE=y

4
drivers/clk/stm32/Kconfig
View file

@ -23,7 +23,7 @@ config CLK_STM32_CORE
config CLK_STM32MP1
bool "Enable RCC clock driver for STM32MP15"
depends on ARCH_STM32MP && CLK
default y if STM32MP15x
default y if STM32MP15X
help
Enable the STM32 clock (RCC) driver. Enable support for
manipulating STM32MP15's on-SoC clocks.
@ -31,7 +31,7 @@ config CLK_STM32MP1
config CLK_STM32MP13
bool "Enable RCC clock driver for STM32MP13"
depends on ARCH_STM32MP && CLK
default y if STM32MP13x
default y if STM32MP13X
select CLK_STM32_CORE
help
Enable the STM32 clock (RCC) driver. Enable support for

11
include/configs/stm32mp15_dh_dhsom.h
View file

@ -12,14 +12,13 @@
#define PHY_ANEG_TIMEOUT 20000
#ifdef CONFIG_SPL_BUILD
#define CFG_EXTRA_ENV_SETTINGS \
#define CFG_EXTRA_ENV_SETTINGS \
"dfu_alt_info_ram=u-boot.itb ram " \
__stringify(CONFIG_SPL_LOAD_FIT_ADDRESS) \
" 0x800000\0"
#endif
#define STM32MP_BOARD_EXTRA_ENV \
"usb_pgood_delay=1000\0" \
#define STM32MP_BOARD_EXTRA_ENV \
"dh_update_sd_to_emmc=" /* Install U-Boot from SD to eMMC */ \
"setexpr loadaddr1 ${loadaddr} + 0x1000000 && " \
"load mmc 0:4 ${loadaddr1} boot/u-boot-spl.stm32 && " \
@ -49,7 +48,11 @@
"sf update ${loadaddr1} 0x40000 ${filesize1} && " \
"sf update ${loadaddr} 0x80000 ${filesize} && " \
"env set filesize1 && env set loadaddr1\0" \
"update_sf=run dh_update_sd_to_sf\0"
"stdin=serial\0" \
"stdout=serial\0" \
"stderr=serial\0" \
"update_sf=run dh_update_sd_to_sf\0" \
"usb_pgood_delay=1000\0"
#include <configs/stm32mp15_common.h>