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ARM: imx: Configure GIC clock parent on Data Modul i.MX8M Plus eDM SBC
The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init() during the SPL start up. On this particular system, spl_board_init() is used to reconfigure GIC clock parent to PLL2 500M, which is the configuration expected by the Linux kernel. Enable SPL_BOARD_INIT and fill in the GIC clock configuration code. Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not allow to change it. Should set the clock after PMIC setting done. Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for ND VDD_SOC. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
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2 changed files with 14 additions and 0 deletions
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@ -80,6 +80,19 @@ int data_modul_imx_edm_sbc_board_power_init(void)
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return 0;
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}
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void spl_board_init(void)
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{
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/*
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* Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
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* allow to change it. Should set the clock after PMIC setting done.
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* Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
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* ND VDD_SOC.
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*/
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clock_enable(CCGR_GIC, 0);
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clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));
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clock_enable(CCGR_GIC, 1);
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}
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int spl_board_boot_device(enum boot_device boot_dev_spl)
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{
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if (boot_dev_spl == SPI_NOR_BOOT) /* SPI NOR */
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@ -59,6 +59,7 @@ CONFIG_SPL_MAX_SIZE=0x25000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x96fc00
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CONFIG_SPL_BSS_MAX_SIZE=0x400
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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