Add Support for UFS Host Controller Interface (UFSHCI) for communicating
with Universal Flash Storage (UFS) devices. The steps to initialize the
host controller interface are the following:
- Initiate the Host Controller Initialization process by writing to the
Host controller enable register.
- Configure the Host Controller base address registers by allocating a
host memory space and related data structures.
- Unipro link startup procedure
- Check for connected device
- Configure UFS host controller to process requests
Also register this host controller as a SCSI host controller.
Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported to
U-boot.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Move android generic config and boot sequence in meson64_android header
and fix size of userdata to use all eMMC on SEI510.
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Fully take over the ARM maintainers entry.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
New firmware header to place firmware specific macro and function
declarations. The patch also moves the macros defining PM operations as
well as some helper macros.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ZynqMP mailbox driver implementing IPI communication with PMU. This would
allow U-Boot SPL to communicate with PMUFW to request privileged
operations.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add simple ZynqMP firmware drive to populate child nodes under
zynqmp_firmware DT node.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This updates MAINTAINERS and git-mailrc to add me as maintainer for
socfpga.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
1. Add myself as Android A/B and AVB maintainer
2. Add Sam Protsenko as Designated reviewer for A/B
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Add MAINTAINERS entry for HI3660 SoC by adding the arch includes.
While doing so, adding myself as the co-maintainer for HISILICON
SoCs since I'm planning to maintain HI3660 SoC separately and considering
doing improvements to the existing HiSilicon SoC architecture.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Change the UEFI documentation to Sphinx style and integrate it into the
rest of the Sphinx generated documentation.
Remove the inaccurate TODO list in doc/uefi/uefi.rst.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since u-boot has added the spi-mem framework and replaced
the spi-nor framework, the mtk_qspi is no longer compatible
with the new spi-nor driver.
Remove this driver along with replacing config item
with new mtk spi-nor driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash related changes and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Commit 32ce6179fb ("optee: Add lib entries for sharing OPTEE code across
ports") adds code into lib/optee but neglects to update MAINTAINERS to make
me buggable for questions and maintenance.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Macpaul have left Andestech for a while, and this mail address
macpaul@andestech.com can not received mail anymore.
It might encounter account creation problem in this switching
to gitlab about nds32 tree.
So change the nds32 maintainer as Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
include/net.h currently has no maintainer.
Assign include/net.h to the maintainer of the NET subsystem.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit ad7061ed74 ("doc: Move device tree bindings documentation to
doc/device-tree-bindings") moved all device tree binding documentation
to doc/device-tree-bindings directory.
The current U-Boot project still have two documentation directories:
- doc/
- Documentation/
Move all documentation and sphinx files to doc directory so all content
can be in a common place.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Add myself as an SH maintainer.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
Christophe will not have maintainer activities, so remove its name.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Christophe Kerello <christophe.kerello@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Change my email address, too many mails
gets to my private mail, created specific email
account just for developmement.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
- Add saveenv support for STM32MP1
- Add STM32MP1 Avenger96 board support
- Add SPI driver suport for STM32MP1
- Add watchdog support for STM32MP1
- Update power supply check via USB TYPE-C for STM32MP1 discovery board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJc+TqsAAoJEMrHeC97M/+miKwP/3OouX3slblEfUELRj/9qLlU
ypdUDKDQupGSrTIyhJHFdGbA2ct/ERl4mH/kU8NNeCHVCsdvrrmuw+k4jfVZfIyi
d9gWmU5WanNPzdWwdo0NrVNXjN5LPduxeUCYHdDEggDJuG3YL4LA9pPyrWpL8o8t
tLPr8YMB1u5Ab8Vn/1A9lKvmw98V59LmWVxZh0AtAdOTvWgEZQe1R5Vex+MHacnK
uR/Dm3ry5v7ZlR/kMZ0C+Ip1aw9GU4e+O+LCGlU4Jr0GV2XQOr4ehxWtN02nYubc
sYXbkW7UArR0I0g8YPXPoBI9PToi57bHW/TXKoI8yDIll7vZ9PDjT/FbUJM9rv72
WU6T7+K2DeHflmp4NljiesD2rDnti0XSCbe4o5o/jD+YkzH6YoJbco4nsae7TBSM
R3rgV7/+St7zC1IjFq0TUG+S9qSUmZqA4k66+j5/SS6pLQOW3dYemL0/up2cRX5w
dx00JTQkHyh7Q/GfH8r7yZqIToW9djB9HeT88ovPUCh8rVfDqNn8/WKd2JAfkxda
QiZDs49BMBsnWpK+vPqiq/suoJeSwDB70iMzrGgBg+mTd9eJcD0c5QBURYE0jm2H
GqQ04WNi8sLzULhMqKbBdPZhBMzyNmDXF6MC+y/OcUM5k8z6tY8LDro3wgHXWVpX
DLiFVbkHbLhlUJbeO8dD
=2C9f
-----END PGP SIGNATURE-----
Merge tag 'u-boot-stm32-20190606' of https://github.com/pchotard/u-boot
- Add Ethernet support for STM32MP1
- Add saveenv support for STM32MP1
- Add STM32MP1 Avenger96 board support
- Add SPI driver suport for STM32MP1
- Add watchdog support for STM32MP1
- Update power supply check via USB TYPE-C for STM32MP1 discovery board
Add imx dts files to the MAINTAINERS file list, so that i.MX
devicetree related patches can be properly sent to the i.MX folks.
Reported-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
sp805 is watchdog on some NXP layerscape SoCs, adding
it's driver. Configs CONFIG_WDT_SP805, CONFIG_WDT, CONFIG_CMD_WDT
needs to be enabled to use it.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Assign include/charset.h to EFI PAYLOAD.
The functions defined in this include are used by the UEFI sub-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ocelot
- mt7620: rename arch to more generic name mtmips
- mips: pass initrd addresses via DT as physical addresses
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAlzMa60ACgkQKPlOlyTy
XBg3FBAAl5I1zNoyEQBuSpe+++0fNFkug0vV985keJA3iXdskdxE8vpxPv6wAp+w
IjBX+e04LY7i5iW58E//f/JBjzL1H345nPeuRsflmlDARep1pqgkEAsEUglGiQW+
ZNDq/aoImWhiiX2nQHnU4ykHNyvIhUOTjldrwU5DfIS2N+8M23pjLhODMsgaNmkd
WfwYB91oTXRnnecwG8Nd1MJU/Jpcns5y6eYwok8vQwkCyzcfsIEP052m3r2SAUMz
3hIlz9WKAHc+pYLz2BWbn560KPJHyS0UqfemiT/M0JasIkojJcQwtrWTKj7g7ZOq
z8XJQ1Ny0xOYQbfbUcvQttBwVXzYQTKy0jS6qi4vB9Q0TgpRP+v//n29IAJA0YkS
BE3Nq96cCMgKarSFkMFaXifv9flnb/wZRymB42Frb9fqiwM2wX10zhcn7zW8gUYc
0Mocl+zkUrmtmA3gSspMJr6kkfX629l97RK7wiY0PkTa4OKSqqMR5JxlVQ+vK72N
f/yxWYxTH/90wfVolTHt52J/hNydEapVFuudL8ffnuLo84BWzOHP3bwQwtB927zV
g4nHxotTmVErz5Pr2JrwaZEFVI+Sc+wXPz68Z7hzZxeiO5tBAELhvtDKAsf9e1gt
OFgQwA5cTRWWxLmWxyWY3nEbXVqAIOsdWIDepAUqrIXAI5rmFt8=
=SZ/W
-----END PGP SIGNATURE-----
Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mips
- mscc: small fixes, enhance network support for Serval, Luton and Ocelot
- mt7620: rename arch to more generic name mtmips
- mips: pass initrd addresses via DT as physical addresses
Update the mmc maintainer from Jaehoon to me.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Marek Vasut <marex@denx.de>
This updates MAINTAINERS and git-mailrc to add me as a
co-custodian for rockchip
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Tom Rini <trini@konsulko.com>
Add new defconfig files for the AM65x High Security EVM.
This defconfigs are the same as for the non-secure part, except for:
CONFIG_TI_SECURE_DEVICE option set to 'y'
CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y'
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
K3 HS devices require signed binaries for boot, use the SECDEV tools
to sign the boot artifacts during build.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
