Commit graph

56066 commits

Author SHA1 Message Date
Fabio Estevam
00f43e51c5 mx6sabre: Use PARTUUID to specify the rootfs location
mx6sabre boards can run different kernel versions, such as NXP 4.1 or
mainline.

Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the eMMC
changes depending on the kernel version.

In order to avoid such issue, use UUID method to specify the rootfs
location.

Succesfully tested booting a NXP 4.1 and also a mainline kernel on a
mx6qsabresd and mx6dlsabreauto.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 10:23:37 +02:00
Fabio Estevam
ca62e5d043 mx6sabreauto: Do not enable WEIM by default
WEIM cannot be used when I2C3 is enabled due to pin conflict, so keep
WEIM disabled by default.

I2C3 controls GPIO I2C expander (USB host and OTG have VBUS controlled by
the GPIO I2C expander), magnetometer, accelerometer.

Not disabling WEIM in U-Boot causes I2C3 to behave badly when booting
a NXP 4.1 kernel, which leads to probe failure on several devices,
including the lack of USB:

imx_usb 2184000.usb: Can't register ci_hdrc platform device, err=-517

By keeping WEIM disabled in U-Boot these kernel issues are gone.

Reported-by: Takashi Matsuzawa <tmatsuzawa@xevo.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 10:21:10 +02:00
Stefano Babic
552a848e4f imx: reorganize IMX code as other SOCs
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic <sbabic@denx.de>

CC: Fabio Estevam <fabio.estevam@nxp.com>
CC: Akshay Bhat <akshaybhat@timesys.com>
CC: Ken Lin <Ken.Lin@advantech.com.tw>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Heiko Schocher <hs@denx.de>
CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Patrick Bruenn <p.bruenn@beckhoff.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Nikita Kiryanov <nikita@compulab.co.il>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: "Eric Bénard" <eric@eukrea.com>
CC: Jagan Teki <jagan@amarulasolutions.com>
CC: Ye Li <ye.li@nxp.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Adrian Alonso <adrian.alonso@nxp.com>
CC: Alison Wang <b18965@freescale.com>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Martin Donnelly <martin.donnelly@ge.com>
CC: Marcin Niestroj <m.niestroj@grinn-global.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Adam Ford <aford173@gmail.com>
CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
CC: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Soeren Moch <smoch@web.de>
CC: Richard Hu <richard.hu@technexion.com>
CC: Wig Cheng <wig.cheng@technexion.com>
CC: Vanessa Maegima <vanessa.maegima@nxp.com>
CC: Max Krummenacher <max.krummenacher@toradex.com>
CC: Stefan Agner <stefan.agner@toradex.com>
CC: Markus Niebel <Markus.Niebel@tq-group.com>
CC: Breno Lima <breno.lima@nxp.com>
CC: Francesco Montefoschi <francesco.montefoschi@udoo.org>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Scott Wood <oss@buserror.net>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Simon Glass <sjg@chromium.org>
CC: "Andrew F. Davis" <afd@ti.com>
CC: "Łukasz Majewski" <l.majewski@samsung.com>
CC: Patrice Chotard <patrice.chotard@st.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Hans de Goede <hdegoede@redhat.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stephen Warren <swarren@nvidia.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: "Álvaro Fernández Rojas" <noltari@gmail.com>
CC: York Sun <york.sun@nxp.com>
CC: Xiaoliang Yang <xiaoliang.yang@nxp.com>
CC: Chen-Yu Tsai <wens@csie.org>
CC: George McCollister <george.mccollister@gmail.com>
CC: Sven Ebenfeld <sven.ebenfeld@gmail.com>
CC: Filip Brozovic <fbrozovic@gmail.com>
CC: Petr Kulhavy <brain@jikos.cz>
CC: Eric Nelson <eric@nelint.com>
CC: Bai Ping <ping.bai@nxp.com>
CC: Anson Huang <Anson.Huang@nxp.com>
CC: Sanchayan Maity <maitysanchayan@gmail.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Patrick Delaunay <patrick.delaunay@st.com>
CC: Gary Bisson <gary.bisson@boundarydevices.com>
CC: Alexander Graf <agraf@suse.de>
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12 10:17:44 +02:00
Peng Fan
f34ccce50a mmc: fsl_esdhc: drop CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method
to set I/O to 1.8. To boards that does not support vqmmc-supply,
use vs18_enable in fsl_esdhc_cfg. If regulator is supported,
use fixed 1.8V regulator for vqmmc-supply.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-07-12 09:44:22 +02:00
Peng Fan
4483b7eb88 dm: mmc: fsl_esdhc: handle vqmmc supply
Handle vqmmc supply. Some boards have a fixed I/O voltage
at 1.8V for emmc, so the usdhc also needs to be configured
as 1.8V by setting VSELECT bit. The vs18_enable is the one
that used to checking whether setting VSELECT or not in
the driver. So if vqmmc supply is 1.8V, set vs18_enable,
the driver will set VSELECT.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-12 09:44:22 +02:00
Peng Fan
32a9179f3a mmc: fsl_esdhc: introduce vs18_enable for 1.8V fix I/O
When using eMMC with 1.8V I/O, the VSELECT bit need to be set in
the USDHC controller when init.

This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg
structure and priv data, so each controller can have different
settings.

We could not use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT, it has problem
that it will apply to all USDHC controllers and it only set the 1.8V
at init phase. So if user does not select to the eMMC device,
the voltage on the I/O pins are not correct.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-07-12 09:44:22 +02:00
Peng Fan
15a91651bf mmc: fsl_esdhc: correct type of wp_enable
The type should be int, not u8. cfg->wp_enable will finally be
assigned to priv->wp_enable whose type is int.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-07-12 09:44:22 +02:00
Jagan Teki
ed2d02d4ce imx6_spl: Add u-boot-dtb.img for SPL payload
Add u-boot-dtb.img for SPL_FS_LOAD_PAYLOAD_NAME when
OF_CONTROL used.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-07-12 09:44:22 +02:00
Vanessa Maegima
d7c11502df mx6sabreauto: Update to SPL only mode
As mx6sabreauto supports SPL now, all variants can boot using the same
defconfig.

This patch:
- Removes non-SPL targets.
- Renames target to mx6sabreauto_defconfig.
- Renames folder and board files to mx6sabreauto.
- Updates MAINTAINERS, Makefile and Kconfig accordingly.
- Removes .cfg files.
- Adds a README with instructions to build and flash SPL and u-boot.img.

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-07-12 09:44:22 +02:00
Vanessa Maegima
823dff9d02 mx6qsabreauto: Add SPL support
Add support for mx6q, mx6dl and mx6qp sabreauto boards in SPL.

Retrieved the mx6q DCD table from:
board/freescale/mx6qsabreauto/imximage.cfg

Retrieved the mx6dl DCD table from:
board/freescale/mx6qsabreauto/mx6dl.cfg

Retrieved the mx6qp DCD table from:
board/freescale/mx6qsabreauto/mx6qp.cfg

Flashed SPL and u-boot.img to an SD card and could successfully boot it
on mx6q, mx6qp and mx6dl sabreauto boards.

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-07-12 09:44:22 +02:00
Peter Robinson
ff18156325 mx6cuboxi: Add support for sata
The Cubox-i and Hummingboard series of devices have an option of
SATA on board, and depending on how the fuses are blown even the
option to boot SPL from SATA. So enable support for it so it can
be used to boot the OS from if people desire.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:44:22 +02:00
Gautam Bhat
d8fab10cb4 mx7dsabresd: Set VLD04 output to 2.8V in PMIC initialization.
This change sets the VLDO4 settings output to 2.8V in PMIC
initialization so that the MIPI DSI/CSI input voltage is 2.8V
as per the schematics. The original code provides an output of
3.3V which violates the voltage mentioned in the schematics.

Signed-off-by: Gautam Bhat <mindentropy@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:44:22 +02:00
Fabio Estevam
a1d1fdc920 mx6: soc: Move mxs_dma_init() into the mxs nand driver
Currently the following build error is seen when a board using MMC SPL
is built and the MXS nand driver is also selected:

arch/arm/cpu/armv7/built-in.o: In function `arch_cpu_init':
arch/arm/cpu/armv7/mx6/soc.c:432: undefined reference to 'mxs_dma_init'

On mx6 the only user of mxs_dma_init() is the mxs nand driver, so
move it there.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:44:22 +02:00
Lothar Waßmann
306dd7dabd net: fec_mxc: fix PHY initialization bug with CONFIG_DM_ETH
When CONFIG_DM_ETH is set, the FEC ethernet controller is reset after
the PHY has been set up and initialzed. This breaks the communication
with the PHY and results in an inoperable ethernet interface.

Do the initialization with CONFIG_DM_ETH in the same order as with
legacy ETH support to fix this.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-07-12 09:44:22 +02:00
Jagan Teki
34d45d123a icorem6_rqs: Rename icorem6_rqs config file
imx6qdl_icore_mmc_defconfig => imx6qdl_icore_rqs_defconfig
Since icorem6_rqs support MMC/eMMC boot, so doesn't need
to name it explicitly.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-07-12 09:44:22 +02:00
Florian Fainelli
022b7fb515 dt-bindings: Document the Broadcom STB wake-up timer node
Document the binding for the Broadcom STB SoCs wake-up timer node
allowing the system to generate alarms and exit low power states.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-07-12 09:44:22 +02:00
Jagan Teki
61366b71a8 serial: mxc: Add debug uart support
Add support for the debug UART to assist with early debugging.
Enable it for i.CoreM6 as an example.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-12 09:44:22 +02:00
Jagan Teki
52c14cabda serial: mxc: Code cleanup
- Remove space between #define to macro
- Add tab between macro and value

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-12 09:42:33 +02:00
Jagan Teki
45d97511a9 serial: mxc: Move common baud gen into _mxc_serial_setbrg
Move the common baud generation code into _mxc_serial_setbrg
so-that dm and non-dm can call this func.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-12 09:42:33 +02:00
Jagan Teki
97548d5947 serial: mxc: Move common init into _mxc_serial_init
Move the common initialization code into _mxc_serial_init
so-that dm and non-dm can call this func.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-12 09:42:33 +02:00
Jagan Teki
57d3e98f57 serial: mxc: Move cr1 and cr2 write to mxc_serial_setbrg
Control reg write should be part of setbrg for better
buadrate generation, so move cr1 and cr2 write to
mxc_serial_setbrg

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-12 09:42:33 +02:00
Jagan Teki
62af03ee97 serial: mxc: Use RFDIV in dm-code
Use RFDIV in dm-code instead of numeric value, so-that
it can be common for dm and non-dm.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-12 09:42:33 +02:00
Jagan Teki
ffa8bcd7f1 serial: mxc: Add common mxc_uart reg space
This patch will add common reg space for non-dm and
dm code and non-dm reg space can be accessed using
mxc_base.

This will
- get rid of __REG volatile assignments
- Make common reg_space by removing unneeded macros

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-12 09:42:33 +02:00
Stefan Agner
3fd9579085 imx: mx6ull: fix USB bmode for i.MX 6UL and 6ULL
i.MX 6UL and 6ULL have different boot device capabilities and
use therefor use a different boot device selection table than
other i.MX 6 devices. Particularly, the value which has been
used so far (b0001) is assigned to QSPI boot for these two
devices.

There is no common reserved value for all i.MX 6devices. Use
b0010 for i.MX 6UL and 6ULL via compile time ifdef.

Reported-by: Joël Esponde <joel.esponde@honeywell.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Joël Esponde <joel.esponde@honeywell.com>
2017-07-12 09:42:33 +02:00
Christian Gmeiner
8be70bb4aa ot1200: enable CONFIG_IMX_THERMAL for detailed thermal information
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12 09:42:33 +02:00
Fabio Estevam
258f76fd21 mx6sabresd: Fix guard file symbol
Remove the "Q" from the file guard symbol, so that it matches
the file name.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:42:33 +02:00
Fabio Estevam
b8b9790e23 wandboard: Remove unnecessary delay
There is no need to add a 100us delay after the DDR initialization.

Other imx6 boards do not have such delay either, so simply remove it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:42:33 +02:00
Fabio Estevam
dfa33fbe48 cm_fx6: Remove SPL entry from CONFIG_SYS_EXTRA_OPTIONS
SPL is already selected via CONFIG_SPL=y, so there is no need
to pass it inside CONFIG_SYS_EXTRA_OPTIONS.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:42:33 +02:00
Fabio Estevam
d84a8c5b28 cgtqmx6eval: Remove SPL entry from CONFIG_SYS_EXTRA_OPTIONS
SPL is already selected via CONFIG_SPL=y, so there is no need
to pass it inside CONFIG_SYS_EXTRA_OPTIONS.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:42:33 +02:00
Fabio Estevam
7f27eec72e mx6slevk_spl: Remove SPL entry from CONFIG_SYS_EXTRA_OPTIONS
SPL is already selected via CONFIG_SPL=y, so there is no need
to pass it inside CONFIG_SYS_EXTRA_OPTIONS.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:42:33 +02:00
Fabio Estevam
41857231d5 mx6sabresd: Remove SPL entry from CONFIG_SYS_EXTRA_OPTIONS
SPL is already selected via CONFIG_SPL=y, so there is no need
to pass it inside CONFIG_SYS_EXTRA_OPTIONS.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12 09:42:33 +02:00
Baruch Siach
172b2e0b56 arm: mvebu: clearfog: fix chip name comment
The clearfog uses Armada 388.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:57:55 +02:00
Baruch Siach
db7cd4ed33 tools/kwbimage: fix v1 header verification
The verify_header callback in kwbimage.c only verifies v0 headers checksum.
Running 'mkimage -l' on a v1 image gives the following misleading output:

GP Header: Size ae000000 LoadAddr 34160600

Implement support for v1 headers. For that, factor out the header checksum code
to a separate main_hdr_checksum_ok() routine. This routine relies on the fact
that the checksum field offset is the same in both v0 and v1 headers. With this
patch applied 'mkimage -l' correctly identifies the image:

Image Type:   MVEBU Boot from sdio Image
Image version:1
Data Size:    398904 Bytes = 389.55 KiB = 0.38 MiB
Load Address: 007fffc0
Entry Point:  00800000

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:57:55 +02:00
Baruch Siach
37d108b64f tools/kwbimage.h: make offset marks style consistent
The offset marking in kwbimage.h is inconsistent. main_hdr_v0 uses decimals,
main_hdr_v1 uses hex without '0x' prefix, secure_hdr_v1 uses hex with '0x'
prefix. Make all offset marks hex with '0x' prefix.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:57:55 +02:00
Baruch Siach
ed72741d9f tools/kwbimage: update the list of SoCs using v1 header
Armada 38x also uses image header v1.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:57:55 +02:00
Igal Liberman
b6518b1ea3 arm64: mvebu: use single defconfig for Armada8K development boards
Currently, Marvell Armada8k development board use 3 different
defconfigs:
        mvebu_db-88f7040-nand_defconfig
        mvebu_db-88f7040_defconfig
        mvebu_db-88f8040_defconfig
Having 3 different defconfigs makes maintenance difficult.

This patch removes the defconfigs mentioned above and introduce
a new defconfig which represents the Armada8k family.

NOTE:
In order not to break automatic tools compilation,
a default device-tree is set in the defconfig (armada-8040-db).
However, when compiling u-boot, the user MUST explicitly export
the DEVICE_TREE for the requested board because using A80x0
device-tree on A70x0 might break the device.

For more information, refer to "doc/README.marvell" (intoduced
in this patch).

Change-Id: I98515b6306498358f3722ecf7ac4c87f236ebbd8
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:57:55 +02:00
Marek Behún
b6ee860b87 marvell: armada385: Add the Turris Omnia board
The Turris Omnia is a open-source router created by CZ.NIC.

The code is based on the Marvell/db-88f6820-gp by Stefan Roese
with modifications from Tomas Hlavacek in the CZ.NIC turris-omnia-uboot
repository, which can be found at
https://gitlab.labs.nic.cz/turris/turris-omnia-uboot

By default, the Turris Omnia uses btrfs as the main and only filesystem,
and also loads kernel and device tree from this filesystem. Since U-Boot
does not yet support btrfs, you should not flash your Turris Omnia board
with this unless you know what you are doing.

Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz>
Signed-off-by: Marek Behun <marek.behun@nic.cz>

 create mode 100644 board/CZ.NIC/turris_omnia/Makefile
 create mode 100644 board/CZ.NIC/turris_omnia/kwbimage.cfg
 create mode 100644 board/CZ.NIC/turris_omnia/turris_omnia.c
 create mode 100644 configs/turris_omnia_defconfig
 create mode 100644 include/configs/turris_omnia.h
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:57:38 +02:00
Marek Behún
aa5eb9a3ac drivers/misc: Add basic support for ATSHA204A Crypto module
This module can be found on the Turris Omnia board connected
via the I2C interface.

Among some cryptographic functions, the chip has a 512 bit
One Time Programmable memory, 88 byte configuration memory
and 512 byte general purpose memory.

The Turris Omnia stores serial number and device MAC address in
the OTP memory.

This commit adds basic support for reading the EEPROM and also
exposes the chips Random Number Generator.

The driver is based on code by
  Josh Datko, Cryptotronix, jbd@cryptotronix.com
and also
  Tomas Hlavacek, CZ.NIC, tomas.hlavacek@nic.cz

Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz>
Signed-off-by: Marek Behun <marek.behun@nic.cz>

 create mode 100644 drivers/misc/atsha204a-i2c.c
 create mode 100644 include/atsha204a-i2c.h
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:57:38 +02:00
Marek Behún
8e6eda7cda drivers/i2c/muxes/pca954x: Add pca9547 I2C mux support
This I2C mux is found, for example, on the Turris Omnia board.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:56:48 +02:00
Marek Behún
c2502e7b82 arch/arm/dts: Add Turris Omnia device tree
This device tree is taken from mainline Linux kernel commit
7b7db5ab. Added is also a -u-boot.dtsi file with these additions:

  - aliases for I2C and SPI devices are added, because i2cmux and
    SPI flash doesn't work otherwise
  - spi_flash node has been added so that the new DM API works
  - the ATSHA204A node is added in the i2c@5 node
  - "u-boot,dm-pre-reloc"s are added in needed nodes for SPL
    build to work correctly

Signed-off-by: Marek Behun <marek.behun@nic.cz>

 create mode 100644 arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
 create mode 100644 arch/arm/dts/armada-385-turris-omnia.dts
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:56:48 +02:00
Marek Behún
2ab7704a6d orion_wdt: Support for the Orion Watchdog
The Orion watchdog can be found on some Marvell Armada chips.

This driver is based on the code by Tomas Hlavacek in the CZ.NIC
turris-omnia-uboot repository, which can be found at
https://gitlab.labs.nic.cz/turris/turris-omnia-uboot, and that
one is based on code by Sylver Bruneau. His code is already in
mainline Linux kernel.

The code uses the new driver model API.

Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz>
Signed-off-by: Marek Behun <marek.behun@nic.cz>

 create mode 100644 drivers/watchdog/orion_wdt.c
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:56:48 +02:00
Marek Behún
90bcc3d38d driver/ddr: Add support for setting timing in hws_topology_map
The DDR3 training code for Marvell A38X currently computes 1t timing
when given board topology map of the Turris Omnia, but Omnia needs 2t.

This patch adds support for enforcing the 2t timing in struct
hws_topology_map, through a new enum hws_timing, which can assume
following values:
  HWS_TIM_DEFAULT - default behaviour, compute whether to enable 2t
                    from the number of CSs
  HWS_TIM_1T      - enforce 1t
  HWS_TIM_2T      - enforce 2t

This patch also sets all the board topology maps (db-88f6820-amc,
db-88f6820-gp, controlcenterdc and clearfog) to have timing set to
HWS_TIM_DEFAULT.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:56:48 +02:00
Alexandru Gagniuc
409a81ddd4 am33xx: board: Refactor USB initialization into separate function
The declaration of otg*_plat and otg*_board_data is guarded by
CONFIG_USB_MUSB_*, but their use in arch_misc_init is not. The
ifdef flow goes something like:

if (CONFIG_USB_MUSB_* && other_conditions)
	declare usb_data
if (other_conditions)
	use usb_data

Thus when CONFIG_USB_MUSB_* is not declared, we try to use the
data structures, but these structures aren't defined.

To fix this, move the USB initialization code into the same #ifdef
which guards the declaration of the data structures. Since the DM_USB
vs legacy cases are completely different, use two versions of
arch_misc_init(), for readability.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-11 22:49:39 -04:00
Alexandru Gagniuc
17a21e206a configs: am335x_evm: Enable FASTBOOT based on kconfig
When CONFIG_CMD_FASTBOOT or CONFIG_USB_FUNCTION_FASTBOOT are defined
in am335x_evm.h, a dependency on g_dnl.c is created. This in turn
creates a dependency on having USB gadget enabled.
As a result we can't create configs with USB gadget disabled.

Since these CONFIG_ variables are now part of kconfig, move them to
the board defconfigs, and out of am335x_evm.h. This both preserves
current defaults, and allows creating configs with USB gadget off.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-11 22:49:38 -04:00
Tom Rini
ab86dc7948 ARM: ti816x: Fix enabling GPIO0, enable GPIO1 as well
The TI816x has 2 GPIO banks.  For bank 0 we had been clearing the enable
bit when setting BIT(8).  Correct this by setting it to BIT(1) | BIT(8)
after we set and wait for BIT(1) (aka PRCM_MOD_EN).  Enable GPIO1 as
well so that when CMD_GPIO is enabled it won't crash probing the second
bank.  Enable CMD_GPIO on ti816x_evm.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-11 22:41:56 -04:00
Tom Rini
39b4f6bce3 ti816x: Enable ethernet support
The ti816x SoC revision of the ethernet IP block is handled by the
"davinci_emac" driver, rather than the "cpsw" driver as done by later
members of the family.  Enable the relevant plumbing.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-11 22:41:56 -04:00
Grygorii Strashko
7a9dfe75cf mtd: nand: make nand_info array static
Make make nand_info array static, since all direct users of nand_info array
have been converted to use get_nand_dev_by_index() API.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2017-07-11 22:41:54 -04:00
Grygorii Strashko
8a049dd642 armv8: fsl-layerscape: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2017-07-11 22:41:53 -04:00
Grygorii Strashko
bf264cd0f6 board: toradex: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.

Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2017-07-11 22:41:52 -04:00
Grygorii Strashko
573cc46c65 board: BuR: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by:  Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 22:41:52 -04:00