Commit graph

43 commits

Author SHA1 Message Date
Kumar Gala
3e7b6c1f2d ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.

Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-08 09:10:07 -05:00
Kumar Gala
ec79d33b2c 85xx: Move to a common linker script
There are really no differences between all the 85xx linker scripts so
we can just move to a single common one.  Board code is still able to
override the common one if need be.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:39 -05:00
Kumar Gala
cb151aa2cf pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init.  There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Kumar Gala
fb3143b35e pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init.  There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Peter Tyser
12a440ae6d tqm85xx: Remove board_add_ram_info()
This is in preparation for adding one common 8xxx board_add_ram_info()
function for all 8xxx boards

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:48 -05:00
Wolfgang Denk
dfcd7f2160 Redundant Environment: protect full sector size
Several boards used different ways to specify the size of the
protected area when enabling flash write protection for the sectors
holding the environment variables: some used CONFIG_ENV_SIZE and
CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
a mix of both for the "normal" and the "redundant" areas.

Normally, this makes no difference at all. However, things are
different when you have to deal with boards that can come with
different types of flash chips, which may have different sector
sizes.

Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
biggest sector size, which may include several sectors on boards using
the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
case that only the first of these sectors get protected, while the
following ones aren't.

This is no real problem, but it can be confusing for the user -
especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
"normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
"redundant" area.

To avoid such inconsistencies, I changed all sucn boards that I found
to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
not cause any functional changes to the code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Paul Ruhland
Cc: Pantelis Antoniou <panto@intracom.gr>
Cc: Stefan Roese <sr@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Dave Ellis <DGE@sixnetio.com>
Acked-by: Stefan Roese <sr@denx.de>
2009-06-04 00:16:16 +02:00
Kumar Gala
32049b4048 fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:30 -05:00
Kumar Gala
c8514622e2 fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:29 -05:00
Wolfgang Grandegger
16f2f5a351 Add multi-chip NAND support for the TQM8548 modules
This patches configures the NAND UPM-FSL driver with multi-chip
support for the Micron MT29F8G08FAB NAND flash memory on the
TQM8548 modules.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-03-23 15:53:41 -05:00
Trent Piepho
f62fb99941 Fix all linker script to handle all rodata sections
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
2009-03-20 22:39:12 +01:00
Andy Fleming
e0c4fac79d TQM85xx: Fix a couple warnings in TQM8548 build
The ecm variable in sdram.c was being declared for all 8548, but only
used by specific 8548 boards, so we make that variable require those
specific boards, too

The nand code was using an index "i" into a table, and then re-using "i"
to set addresses for each upm.  However, then it relied on the old value
of i still being there to enable things.  Changed the second "i" to "j"

Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16 18:06:03 -06:00
Wolfgang Grandegger
cf07a5baec MPC85xx: TQM8548: workaround for erratum DDR 19 and 20
This patch adds the workaround for erratum DDR20 according to MPC8548
Device Errata document, Rev. 1: "CKE signal may not function correctly
after assertion of HRESET". Furthermore, the bug DDR19 is fixed in
processor version 2.1 and the work-around must be removed.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16 18:06:02 -06:00
Wolfgang Grandegger
080408fdc7 MPC85xx: TQM8548: use cache for AG and BE variants
This patch makes accesses to the system memory cachable by removing the
caching-inhibited and guarded flags from the relevant TLB entries for
the TQM8548_BE and TQM8548_AG modules. FYI, the Freescale MPC85* boards
are configured similarly.

This results in a big averall performace improvement. TFTP downloads,
NAND Flash accesses, kernel boots, etc. are much faster.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16 18:06:02 -06:00
Wolfgang Grandegger
dc5f55d636 MPC85xx: TQM8548_AG: add 1 GiB DDR2-SDRAM configuration
This patch add support for the 1 GiB DDR2-SDRAM on the TQM8548_AG
module.

Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16 18:06:01 -06:00
Wolfgang Grandegger
88b0e88d18 MPC85xx: TQM8548: fix SDRAM timing for 533 MHz
According to new TQM8548 timing specification:
Refresh Recovery: 34 -> 53 clocks
CKE pulse width:  1 -> 3 cycles
Window for four activities: 13 -> 14 cycles

Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16 18:06:00 -06:00
Wolfgang Grandegger
ad7ee5d43b MPC85xx: TQM8548: add support for the TQM8548_BE module
The TQM8548_BE is a variant of the TQM8548 module with NAND and CAN
interface. With NAND support, the image is significantly larger and
TEXT_BASE is adjusted accordingly. U-Boot can be built for this
module with "$ make TQM8548_BE_config".

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16 18:05:59 -06:00
Wolfgang Grandegger
a318234878 MPC85xx: TQM85xx: make standard PCI/PCI-X configurable
The TQM8548_AG module does not have the standard PCI/PCI-X interface
connected but just the PCI Express interface . So far it was not
possible to disable it without disabling the complete PCI interface
(CONFIG_PCI) including PCI Express.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16 18:05:58 -06:00
Wolfgang Grandegger
31ca9119c3 MPC85xx: TQM85xx: fix flash protection for boot loader
As the reset vector is located at 0xfffffffc, all flash sectors from the
beginning of the U-Boot binary to 0xffffffff must be protected. On the
TQM8548-AG having small sectors at the end of the flash it happened that
the last two sector were not protected and an "erase all" left an
un-bootable system behind:

Bank # 2: CFI conformant FLASH (32 x 16)  Size: 32 MB in 270 Sectors
  AMD Standard command set, Manufacturer ID: 0xEC, Device ID: 0x257E
  Erase timeout: 8192 ms, write timeout: 1 ms

  FFFA0000 E RO   FFFC0000   RO   FFFE0000   RO   FFFE4000   RO   FFFE8000   RO
  FFFEC000   RO   FFFF0000   RO   FFFF4000   RO   FFFF8000 E      FFFFC000

The same bug seems to be in drivers/mtd/cfi_flash.c:flash_init() and many
board BSPs as well.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16 18:05:58 -06:00
Trent Piepho
a5d212a263 mpc8xxx: LCRR[CLKDIV] is sometimes five bits
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-12-19 18:20:25 -06:00
Peter Tyser
9427ccde03 85xx: Add PORDEVSR_PCI1 define
Add define used to determine if PCI1 interface is in PCI or PCIX mode.

Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-12-04 03:15:43 -06:00
Selvamuthukumar
9b827cf172 Align end of bss by 4 bytes
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-18 23:13:16 +01:00
Wolfgang Denk
3cbd823116 Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-02 16:14:22 +01:00
Kumar Gala
2dba0dea98 85xx: Convert all fsl_pci_init users to new APIs
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
2008-10-24 17:35:12 -05:00
Wolfgang Denk
8ed44d91c8 Cleanup: fix "MHz" spelling
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-21 11:25:39 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0e8d158664 rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:06 +02:00
Ben Warren
10efa024b8 Moved initialization of EEPRO100 Ethernet controller to board_eth_init()
Affected boards:
	db64360
	db64460
	katmai
	taihu
	taishan
	yucca
	cpc45
	cpu87
	eXalion
	elppc
	debris
	kvme080
	mpc8315erdb
	integratorap
	ixdp425
	oxc
	pm826
	pm828
	pm854
	pm856
	ppmc7xx
	sc3
	sc520_spunk
	sorcery
	tqm8272
	tqm85xx
	utx8245

Removed initialization of the driver from net/eth.c
Also, wrapped contents of pci_eth_init() by CONFIG_PCI.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:19 -07:00
Stefan Roese
f2302d4430 Fix merge problems
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-06 14:05:38 +02:00
Wolfgang Denk
c8a3b109f0 Cleanup out-or-tree building for some boards (.depend)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:49:18 +02:00
Wolfgang Denk
e093a24762 Coding Style Cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-28 23:34:37 +02:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Kumar Gala
859a86a25c 85xx/86xx: Move to dynamic mgmt of LAWs
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-11 01:52:23 -05:00
Wolfgang Grandegger
e8cc3f04b1 TQM85xx: Change memory map to support Flash memory > 128 MiB
Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash
memory. The current memory map only supports up to 128 MiB Flash.
This patch adds the configuration option CONFIG_TQM_BIGFLASH. If
set, up to 1 GiB flash is supported. To achieve this, the memory
map has to be adjusted in great parts (for example the CCSRBAR is
moved from 0xE0000000 to 0xA0000000).

If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new
memory map also has to be considered in the kernel (changed
CCSRBAR address, changed PCI IO base address, ...). Please use
an appropriate Flat Device Tree blob (tqm8548.dtb).

Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:05:14 -05:00
Wolfgang Grandegger
1c2deff22c TQM85xx: NAND support via local bus UPMB
This patch adds support for NAND FLASH on the TQM8548. It is disabled by
default and can be enabled for the TQM8548 modules. It is now based on
the re-written FSL NAND UPM driver. A patch has been posted earlier today
with the subject:

"NAND FSL UPM: driver re-write using the hwcontrol callback"

Note that the R/B pin is not supported by that module requiring to use
the specified maximum delay time.

Note: With NAND support enabled the size of the U-Boot image exceeds
256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
doubling the image size :-(.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:05:08 -05:00
Wolfgang Grandegger
b9e8078bb3 TQM8548: PCI express support
This patch adds support for PCI express cards. The board support
now uses common FSL PCI init code, for both, PCI and PCIe on all
TQM85xx modules.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:05:01 -05:00
Wolfgang Grandegger
1287e0c55a TQM8548: Basic support for the TQM8548 modules
This patch adds basic support for the TQM8548 module from TQ-Components
(http://www.tqc.de/) including DDR2 SDRAM initialisation and support for
eTSEC 3 and 4

Furthermore Flash buffer write has been enabled to speed up output to
the Flash by approx. a factor of 10.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:01:43 -05:00
Wolfgang Grandegger
2599135320 TQM85xx: Support for Flat Device Tree
This patch adds support for Linux kernels using the Flat Device Tree.
It also re-defines the default environment settings for booting Linux
with the FDT blob.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-11 00:00:45 -05:00
Wolfgang Grandegger
d9ee843d54 TQM85xx: Support for Intel 82527 compatible CAN controller
This patch adds initialization of the UPMC RAM to support up to two
Intel 82527 compatible CAN controller on the TQM85xx modules.

Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 23:59:44 -05:00
Wolfgang Grandegger
518d5cfe72 TQM85xx: Bugfix in the SDRAM initialisation
The CS0_BNDS register is now set according to the detected
memory size.

Signed-off-by Martin Krause <martin.krause@tqs.de>
2008-06-10 23:58:58 -05:00
Wolfgang Grandegger
45dee2e620 TQM85xx: Fix chip select configuration for second FLASH bank
This patch fixes the re-calculation of the automatic chip select
configuration for boards with two populated FLASH banks.

Signed-off-by: Martin Krause <martin.krause@tqs.de>
2008-06-10 23:58:26 -05:00
Wolfgang Grandegger
5d5bd838f7 TQM85xx: Fix CPM port pin configuration
Do not configure port pins PD30/PD31 as SCC1 TxD/RxD except for the TQM8560
board. On the other TQM85xx boards (TQM8541 and TQM8555) SCC1 is not used
as serial interface anyway. Worse, on some board variants configuring the
pins for SCC1 leads to short circuits (for example on the TQM8541-BG).

Signed-off-by: Martin Krause <martin.krause@tqs.de>
2008-06-10 23:53:03 -05:00
Wolfgang Grandegger
b99ba1679e TQM85xx: Various coding style fixes
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 23:52:56 -05:00
Wolfgang Grandegger
4677988c7e TQM: move TQM boards to board/tqc
Move all TQM board directories to the vendor specific directory "tqc"
for modules from TQ-Components GmbH (http://www.tqc.de).

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 18:22:26 -05:00