Commit graph

42279 commits

Author SHA1 Message Date
Andre Przywara
1d4ed26faf video: cfb_console: fix 32-bit display on 64-bit architectures
"unsigned long" is a lousy data type when it comes to match peripheral
hardware registers with a fixed size.
Just do the obvious and match a 32-bit display format with an "u32"
data type for casting.
This fixes the logo display on 64-bit architectures, which produced
a black line on the right side of the logo with non-black backgrounds.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2017-03-07 21:18:23 +01:00
Nathan Rossi
2c2ab8d65f net: zynq_gem: Fix masking of supported phydev features
When the zynq_gem driver initializes the phy it sets the supported
features that the phy can support and advertise. However instead of
masking the supported features such that it limits the available
features it sets the phy to have the exact supported features of the
zynq_gem. This is problematic as it will enable features that a phy does
not have or cannot advertise.

Specifically this appears as an issue when using a phy that is only
capable of 10/100, but the zynq_gem driver will override this and try to
enable and advertise 10/100/1000.

Reported-by: Arno Steffens <star@gmx.li>
Fixes: 80243528ef ("net: gem: Fix gem driver on 1Gbps LAN")
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Tested-by: Arno Steffens <star@gmx.li>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2017-03-07 11:27:33 -06:00
Wenyou Yang
3fd2b3aa19 net: macb: Fix ETH not found when clock not support
For the boards such as smartweb on which the clock driver isn't
supported, the ethernet fail to be found when booting up with
the below log.
---8<---
Net:   No ethernet found.
--->8---

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-03-01 21:28:39 -05:00
Philipp Tomsich
7a70c9985c armv8: spl: Call spl_relocate_stack_gd for ARMv8
As part of the startup process for boards using the SPL, we need to
call spl_relocate_stack_gd. This is needed to set up malloc with its
DRAM buffer.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-01 21:28:34 -05:00
Albert ARIBAUD
6b4e942683 armv5te: make 'ret lr' produce iinterworking 'bx lr'
Current ARM assembler helper for the 'return to caller' pseudo-instruction
turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain
in its current ARM state even when the routine doing the 'ret' was called
from Thumb-1 state, triggering an undefined instruction exception.

This causes early run-time failures in all boards compiled using the Thumb-1
instruction set (for instance the Open-RD family).

ARMv5TE supports 'bx lr' which properly implements interworking and thus
correctly returns to Thumb-1 state from ARM state.

This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2017-03-01 21:28:31 -05:00
Tom Rini
ee6fb217cb Prepare v2017-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-27 17:36:21 -05:00
Andrew F. Davis
4f65ee3813 arm: mach-omap2: Flush cache after FIT post-processing image
After we authenticate/decrypt an image we need to flush the caches
as they may still contain bits of the encrypted image. This will
cause failures if we attempt to jump to this image.

Reported-by: Yogesh Siraswar<yogeshs@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-27 12:14:59 -05:00
Tom Rini
7131d2d06b drivers/net/Kconfig: Correct use of apostrophe
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-27 12:14:58 -05:00
Tom Rini
34a93bfb26 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-02-27 12:10:05 -05:00
Nickey Yang Nickey Yang
94412745cd rockchip: video: fix 83500000 clock mistake in rockchip HDMI
There is one "0" too many in 83500000 mpixelclock in rockchip_mpll_cfg[].
fix it.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2017-02-27 16:10:45 +01:00
Jonathan Golder
3cc6e7070d splash: Prevent splash_load_fs from writing to 0x0
Passing NULL to fs_read() for actread value results in hanging U-Boot
at least on our ARM plattform (TI AM335x). Since fs_read() and
following functions do not catch nullpointers, writing to 0x0 occurs.

Passing a local dummy var instead of NULL solves this issue.

Signed-off-by: Jonathan Golder <jonathan.golder@kurz-elektronik.de>
Cc: Anatolij Gustschin <agust@denx.de>
2017-02-27 16:08:06 +01:00
Tom Rini
a0f3e3df4a travis-ci: Temporarily disable using a newer device tree compiler
For a long while dtc has warned about various constructs.  This is now
leading to log file size being exceeded in travis, and as the majority
of these errors need to be fixed in the kernel, switch to using the
stock device-tree-compiler package.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-26 15:25:30 -05:00
Tom Rini
87fcdca6be Merge branch 'master' of git://git.denx.de/u-boot-usb 2017-02-26 11:56:54 -05:00
Felipe Balbi
9bf9e81358 usb: gadget: f_dfu: set serial number if serial# is valid
With this patch, USB Command Verifier is happy with our DFU
implementation on Chapter 9 tests.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-02-26 13:24:30 +01:00
Felipe Balbi
949bf79e73 usb: gadget: g_dnl: fix g_dnl_set_serialnumber()
instead of only copying if strlen(s) is less than 32 characters, let's
just copy at most 31 characters regardless of the size of
serial#. This will guarantee that we always have a serial number if
serial# environment variable is set to anything.

Note that without a proper serial number, USB Command Verifier fails
our test of Device Descriptor since we will claim to have a serial
number without really providing one when requested.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-02-26 13:24:30 +01:00
Felipe Balbi
00e9d69629 usb: gadget: f_dfu: write req->actual bytes
If last packet is short, we shouldn't write req->length bytes to
non-volatile media, we should write only what's available to us, which
is held in req->actual.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-26 13:24:30 +01:00
Patrick Delaunay
d428776657 usb: gadget: dfu: add result for handle_getstatus()
harmonize result with other handle_XXX() functions: return int for size
remove the define RET_STAT_LEN : no more necessary

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2017-02-26 13:24:30 +01:00
Patrick Delaunay
f11bb25245 usb: gadget: dfu: correct size for USB_REQ_DFU_GETSTATE result
return the correct size for DFU_GETSTATE result (1 byte in DFU 1.1 spec)
to avoid issue in USB protocol and the variable "value" is propagated
to req->lenght as all the in the other request with answer
- DFU_GETSTATUS
- DFU_DNLOAD
- DFU_UPLOAD
Then the buffer is correctly treated in USB driver

NB: it was the only request witch directly change "req->actual"

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2017-02-26 13:24:30 +01:00
Patrick Delaunay
8987012fe5 usb: gadget: dfu: add functional descriptor in descriptor set
The "DFU descriptor set" must contain the "DFU functional descriptor"
but it is missing today in U-Boot code
(cf: DFU spec 1.1, chapter 4.2 DFU Mode Descriptor Set)
This patch only allocate buffer and copy DFU functional descriptor
after interfaces.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2017-02-26 13:24:30 +01:00
Vincent Tinelli
282b72082f usb: dwc3: gadget: Remove unused header inclusion
Remove sys_proto.h inclusion which is not used by the driver.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-26 13:24:30 +01:00
Tom Rini
d38de7cb03 Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Fix regressions caused by the previous reworks
  - Add pin configuration support
  - Re-work SPL code
  - Update DRAM and PLL setup code
  - Enable needed configs, disable unneeded configs
2017-02-23 10:12:41 -05:00
Masahiro Yamada
bc64795804 ARM: uniphier: set up charge pump current for MPLL of LD11 SoC
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 09:00:16 +09:00
Masahiro Yamada
9d35873161 ARM: uniphier: add simple eMMC load APIs instead of ROM API
Re-use of routines embedded in the Boot ROM requires a function
pointer table for each SoC.  This is not nice in terms of the
maintainability in a long run.

Implement simple eMMC load APIs that are commonly used for LD11,
LD20, and hopefully future SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 09:00:16 +09:00
Masahiro Yamada
2af94aafa5 ARM: uniphier: enable CONFIG_CMD_CONFIG
This command is useful to see which config options are enabled on
the running U-Boot image.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:39:48 +09:00
Masahiro Yamada
c05a59d294 ARM: uniphier: enable CONFIG_CMD_GPT
Enable CONFIG_CMD_GPT, keeping CONFIG_SPL_EFI_PARTITION because the
SPL for UniPhier platform does not recognize any partitions.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
6012c3b659 ARM: uniphier: disable CONFIG_SPL_DOS_PARTITION
The SPL for UniPhier platform does not recognize any partitions.
Do not compile unneeded features.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
c21f58548c ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20
For LD11 and LD20 SoCs, the RST_n pin is asserted by default.  If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.

Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now.  This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Kotaro Hayashi
04f3da3936 ARM: uniphier: add DRAM PHY clock duty adjustment for LD20 SoC
If the DRAM clock duty does not meet the allowable tolerance,
it is marked in an efuse register.  If the register is fused,
the boot code should compensate for the DRAM clock duty error.

Signed-off-by: Kotaro Hayashi <hayashi.kotaro@socionext.com>
[masahiro: simplify code, add git-log]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
dd38374d2f ARM: uniphier: remove dram_nr_ch from board parameters
This parameter is redundant because we can know the number of
channels by checking if dram_ch[2].size is zero.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
784548efb2 ARM: uniphier: rework spl_boot_device() and related code
The current implementation has ugly switch statements here and there,
and duplicates similar code.  Rework it using table lookups for SoC
data and reduce code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
81c847bf38 ARM: uniphier: move spl_boot_mode() to a separate file
The spl_boot_mode() is unrelated to the other code in this file.
Besides, this function is only called from common/spl/spl_mmc.c,
so it is reasonable to guard with CONFIG_SPL_MMC_SUPPORT.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
e5957e8d69 ARM: uniphier: move MMC code to a separate file
Currently, arch/arm/mach-uniphier/boot-mode/boot-mode.c is messed up
with unrelated code; there is no reason why the "mmcsetn" command
must be placed in this file.

Split out the MMC code into arch/arm/mach-uniphier/mmc-first-dev.c.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
5c8c6da132 ARM: uniphier: disable CONFIG_MTD_NOR_FLASH
This feature is seldom used these days on UniPhier boards.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
c276953885 ARM: dts: uniphier: drop u-boot, dm-pre-reloc from system-bus pinctrl node
Since commit 26b09c022a ("ARM: uniphier: move SBC and Support Card
init code to U-Boot proper"), SPL does not need pin-mux settings for
the System Bus.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
7728f0c68d ARM: uniphier: rename second stage loader name
For the memory footprint reason, the Boot ROM can not load the ARM
Trusted Firmware BL1 directly when Trusted Board Boot is enabled.
The second stage loader is Socionext's own firmware, so rename it
for clarification.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
6a6b9d5dfd pinctrl: uniphier: support pin configuration
Support the following DT properties:
  "bias-disable"
  "bias-pull-up"
  "bias-pull-down"
  "bias-pull-pin-default"
  "input-enable"
  "input-disable"

My main motivation is to support pull up/down biasing.  For Pro5 and
later SoCs, the pupdctrl register number is the same as the pinmux
number, so this feature can be supported without having big pin
tables.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
1b280978c0 ARM: uniphier: enable generic EHCI driver for uniphier_v8_defconfig
The LD11 SoC is equipped with USB EHCI controllers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
04cd4e7215 ARM: uniphier: remove DRAM base address from board parameters
The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding.  What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
cf3175bcd8 ARM: uniphier: update README.uniphier for latest build instruction
Since commit c0efc3140e ("ARM: uniphier: change CONFIG_SPL_PAD_TO
to 128KB"), the u-boot.bin should be burned at the offset 0x20000.
I missed to update README.uniphier in that commit.  Now updating.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
6fc849148a ARM: uniphier: print Support Card info very late
Since commit 26b09c022a ("ARM: uniphier: move SBC and Support Card
init code to U-Boot proper"), the System Bus is initialized by
board_init().  The show_board_info() is called from board_init_f()
by default, so the revision register of the Micro Support Card may
not be accessed at this point.  Show its revision after the System
Bus is initialized.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
87c3308cbf ARM: uniphier: skip memreserve of unused DRAM bank of LD20
Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.

Fixes: c995f3a3c5 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
0f5bf09cf1 ARM: uniphier: correct spelling of "invalid"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
bed1624d0d ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is set
If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
14bb7a4e37 ARM: uniphier: revive accidentally removed dcache_disable()
Commit a8e6300d48 ("ARM: uniphier: refactor spl_init_board()")
accidentally dropped dcache_disable() call.  Since then, the SPL of
LD11 and LD20 failed to load U-Boot proper.

Fixes: a8e6300d48 ("ARM: uniphier: refactor spl_init_board()")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Fabio Estevam
b24cf8540a video: mxsfb: Fix reset hang when videomode variable is not present
Currently the system hangs when the 'videomode' variable is not present
and a reset command is issued:

=> setenv videomode
=> saveenv
=> reset

(Board hangs)

lcdif_power_down() assumes that the LCDIF controller has been properly
configured and enabled, which may not be true.

To fix this issue check whether panel.frameAdrs has been initialized and
in case it has not been initialized, do not continue with the LCDIF
powerdown sequence.

Tested on a imx7dsabresd board.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
2017-02-22 21:47:59 +01:00
Tom Rini
4d6f9e0d21 Merge git://git.denx.de/u-boot-x86 2017-02-22 10:27:37 -05:00
Andy Shevchenko
308c75e08d x86: Intel MID platforms has no microcode update
There is no microcode update available for SoCs used on Intel MID
platforms.

Use conditional to bypass it.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:56 +08:00
Vincent Tinelli
20bfac0599 x86: zImage: add Intel MID platforms support
Intel MID platform boards have special treatment, such as boot parameter
setting.

Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:50 +08:00
Andy Shevchenko
7a96fd8ef0 x86: Introduce INTEL_MID quirk option
Intel Mobile Internet Device (MID) platforms have special treatment in
some cases, such as CPU enumeration or boot parameters configuration.

Besides that several drivers are specifically developed for the IP
blocks found on Intel MID platforms. Those drivers will be dependent to
this option.

Here we introduce specific quirk option for such cases.

It is supposed to be selected by Intel MID platform boards, for example,
Intel Edison.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:46 +08:00
J. Tang
3c03f4928e x86: Force 32-bit jumps in interrupt handlers
Depending upon the compiler used, IRQ entries could vary in sizes. With
GCC 5.x, the code generator will use short jumps for some IRQ entries
but near jumps for others. For example, GCC 5.4.0 generates the
following:

$ objdump -d interrupt.o
<snip>
00000207 <irq_18>:
207:   6a 12                   push   $0x12
209:   eb 85                   jmp    190 <irq_common_entry>

0000020b <irq_19>:
20b:   6a 13                   push   $0x13
20d:   eb 81                   jmp    190 <irq_common_entry>

0000020f <irq_20>:
20f:   6a 14                   push   $0x14
211:   e9 7a ff ff ff          jmp    190 <irq_common_entry>

00000216 <irq_21>:
216:   6a 15                   push   $0x15
218:   e9 73 ff ff ff          jmp    190 <irq_common_entry>

This causes a problem in cpu_init_interrupts(), because the IDT setup
assumed same sizes for all IRQ entries. GCC 4.x always generated 32-bit
jumps, so this previously was not a problem.

The fix is to force 32-bit near jumps for all entries within the
inline assembly. This works for GCC 5.x, and 4.x was already using
that form of jumping.

Signed-off-by: Jason Tang <tang@jtang.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-21 14:53:29 +08:00