Commit graph

65582 commits

Author SHA1 Message Date
Jagan Teki
1831191b18 roc-rk3399-pc: Add SPI boot
U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530)
Trying to boot from MMC1
NOTICE:  BL31: v2.2(release):
NOTICE:  BL31: Built : 15:05:37, May 12 2020

U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530)

SoC: Rockchip rk3399
Reset cause: POR
Model: Firefly ROC-RK3399-PC Board
DRAM:  3.9 GiB
PMIC:  RK808
MMC:   mmc@fe320000: 1, sdhci@fe330000: 0
Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Model: Firefly ROC-RK3399-PC Board

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Jagan Teki
e88485923b roc-rk3399-pc: Mark default env from SPI
Mark the default U-Boot environment as SPI flash since
this is an on board flash device.

Updated env offset, size in contrast with default since
the U-Boot proper has to start from 384K.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Jagan Teki
f6f9affdce Makefile: Drop to handle rkspi image type
On rockchip platforms, SPI boot image creation is not
straightforward like MMC boot image creation where former
requires to specify tpl, spl in multimage format in mkimage,
and later simply do a concatenate mkimaged-tpl with spl.

On this note, let drop rkspi image type creation via kbuild
and let inform via rockchip.rst

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Kever Yang
3d82b1b3d3 rockchip: rk3399-evb: add stdout-path for the board
The 'stdout-path' is missing after dts sync.
Fixes: 167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
b.l.huang
d9c3417b52 rockchip: rk3328: add rock-pi-e-rk3328_defconfig file
This commit add the default configuration file and relevant description
for rock-pi-e board

Signed-off-by: Banglang Huang <banglang.huang@foxmail.com>
2020-06-07 18:57:16 +08:00
b.l.huang
5764911e67 rockchip: rk3328: add rock-pi-e dts file
The ROCK-PI-E is a credit card size SBC based on Rockchip RK3328
Quad-Core ARM Cortex A53.

    Net - Dual ethernet port, 1 X Gbe, 1 X 100M
    USB - USB 3.0
    DC  - USB-Type C, 5V 2A
    Storage - TF card, eMMC

Just build idbloader.img and u-boot.itb for Rockpi E board and
follow the blow steps to replace the relevant partition.

    dd if=idbloader.img of=/dev/sdcard seek=64 conv=notrunc
    dd if=u-boot.itb of=/dev/sdcard seek=16384 conv=notrunc

Signed-off-by: Banglang Huang <banglang.huang@foxmail.com>
2020-06-07 18:57:16 +08:00
Mark Kettenis
f85cb3d978 rockchip: Enable PCIe and NVMe on ROCKPro64
Enable CONFIG_PCI and CONFIG_NVME and related configs for the
ROCKPro64 board.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Mark Kettenis
f808d75723 rockchip: Enable PCIe/M.2 and NVMe on Firefly RK3399
Enable CONFIG_PCI and CONFIG_NVME and related configs for the
Firefly RK3399 board.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Tom Rini
88bd5b1793 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 19:29:09 -04:00
Tom Rini
6bca655bcb Merge branch '2020-06-04-misc-bugfixes'
- Resync checkpatch.pl (largely) with v5.7 and introduce U-Boot specific
  checks in a localized area, so they aren't lost in the future.
- Complete / re-migrate some options from config headers to defconfigs
- Add dependencies to the various debug uart drivers
2020-06-04 18:12:57 -04:00
Tom Rini
f3e2ebede3 checkpatch.pl: Add check for defining CONFIG_CMD_xxx via config files
All of our cmds have a Kconfig entry.  Making enabling a CMD via the
config file an error to checkpatch.pl.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 18:10:02 -04:00
Simon Glass
dd5b0fad8f checkpatch.pl: Request if() instead #ifdef
There is a lot of use of #ifdefs in U-Boot. In an effort reduce this,
suggest using the compile-time construct.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04 18:10:02 -04:00
Simon Glass
58978114d9 checkpatch.pl: Request a test when a new command is added
This request is made with nearly every new command. Point to some docs
on how to do it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04 18:10:02 -04:00
Simon Glass
7fc7d24116 checkpatch.pl: Warn if the flattree API is used
We want people to use the livetree API, so request it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04 18:10:02 -04:00
Simon Glass
281236c728 checkpatch.pl: Add a check for tests needed for uclasses
A common problem when submitting a new uclass is to forget to add sandbox
tests. Add a warning for this.

Of course tests should always be added for new code, but this one seems to
be missed by nearly every new contributor.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04 18:10:02 -04:00
Simon Glass
b77df5980c checkpatch.pl: Add a U-Boot option
Add an option to indicate that U-Boot-specific checks should be enabled.
Add a function to house the code that will be added.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04 18:10:02 -04:00
Simon Glass
048a648298 checkpatch.pl: Update to v5.7
Keep the U-Boot changes to $logFunctions

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync with v5.7 release which changed the default max line
 length, update commit to reflect]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 18:10:02 -04:00
Tom Rini
68ff234331 Convert CONFIG_BOARD_LATE_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_LATE_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 18:10:02 -04:00
Tom Rini
e985eb14ac Convert CONFIG_CMD_ASKENV et al to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_ASKENV
   CONFIG_CMD_BMP
   CONFIG_CMD_BOOTD
   CONFIG_CMD_CACHE
   CONFIG_CMD_CRC32
   CONFIG_CMD_DHCP
   CONFIG_CMD_ENV
   CONFIG_CMD_EXPORTENV
   CONFIG_CMD_EXT2
   CONFIG_CMD_EXT4
   CONFIG_CMD_FLASH
   CONFIG_CMD_FS_GENERIC
   CONFIG_CMD_FUSE
   CONFIG_CMD_GPIO
   CONFIG_CMD_GPT
   CONFIG_CMD_GREPENV
   CONFIG_CMD_I2C
   CONFIG_CMD_IMLS
   CONFIG_CMD_IMPORTENV
   CONFIG_CMD_LOADB
   CONFIG_CMD_LOADS
   CONFIG_CMD_MEMINFO
   CONFIG_CMD_MII
   CONFIG_CMD_MTDPARTS
   CONFIG_CMD_NAND
   CONFIG_CMD_NAND_TRIMFFS
   CONFIG_CMD_NFS
   CONFIG_CMD_PCA953X
   CONFIG_CMD_PCA953X_INFO
   CONFIG_CMD_PCI
   CONFIG_CMD_PING
   CONFIG_CMD_READ
   CONFIG_CMD_SF
   CONFIG_CMD_SPI
   CONFIG_CMD_SPL
   CONFIG_CMD_SPL_WRITE_SIZE
   CONFIG_CMD_TIME
   CONFIG_CMD_TRACE
   CONFIG_CMD_UBI
   CONFIG_CMD_UBIFS
   CONFIG_CMD_UNZIP
   CONFIG_FS_EXT4

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 18:10:02 -04:00
Tom Rini
d16c9d0b37 Convert CONFIG_BZIP2 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BZIP2
   CONFIG_GZIP
   CONFIG_LZO
   CONFIG_ZLIB
   CONFIG_LZMA
   CONFIG_LZO

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 18:10:02 -04:00
Tom Rini
f03af6e299 topic_miami: Disable GPIO
Per the boards config header file, there is no useful GPIO on these
boards.  Remove CONFIG_CMD_GPIO from the defconfigs.

Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 18:10:02 -04:00
Tom Rini
31f39b2f46 ARM: rmobile: blanche: Disable CONFIG_CMD_SF / CONFIG_CMD_SPI
The config header for this platform disables both CMD_SF and CMD_SPI and
the defconfig leaves them enabled.  Disable them from the defconfig and
enable them in the header.

Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 18:10:02 -04:00
Tom Rini
559c99f628 bcmstb: Migrate CONFIG_CMD_EXT[24]
The common config header for bcm7260 and bcm7445 enable
CONFIG_CMD_EXT2/EXT4 but the defconfigs do not.  This results in the
commands being disabled.  Enable them via the defconfig.

Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 15:05:45 -04:00
Tom Rini
a4c67b0eb3 mx6memcal: Finish migration to defconfig options
The config header for this platform uses '#undef' in a number of cases.
All of the MMC related ones were already handled correctly in the
defconfig file.  In the case of CONFIG_CMD_FUSE, the command was being
built and enabled via defconfig.  Disable it in the defconfig, cleanup
the header.

Reviewed-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 15:05:45 -04:00
Tom Rini
049756c2fe pfla02: Rework excluding NAND from SPL
Rather than only enable CONFIG_CMD_NAND for non-SPL builds, move the CMD
options to defconfig and rework the guards to not try and call the
function in SPL builds.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2020-06-04 15:05:45 -04:00
Michal Simek
4cc24aeaf4 serial: Add missing Kconfig dependencies for debug consoles
Debug console is the part of serial driver in the same file. It means to be
able to enable debug console you also need to enable driver itself.
That's why add all dependecies and list only debug consoles which are
enabled based on driver selection to avoid compilation error when user
asks for certain debug console but driver is not enable for it.

Error:
aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `putc':
/home/monstr/data/disk/u-boot/common/console.c:513: undefined reference to `printch'
aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `puts':
/home/monstr/data/disk/u-boot/common/console.c:563: undefined reference to `printch'

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Fix ns16550 dependency, add ZYNQ_SERIAL, change S5P]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 15:05:45 -04:00
Tom Rini
c2a38411d1 serial: Convert ARM_DCC to Kconfig
The symbol "CONFIG_ARM_DCC" is used to control building
drivers/serial/arm_dcc.c.  Provide a simple Kconfig entry for this.

Cc: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tom McLeod <tom.mcleod@opalkelly.com>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-04 15:04:11 -04:00
Tom Rini
07d90d8bd4 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fixes 7e249bc13a: ("riscv: Move all SMP related SBI calls to
  SBI_v01") Move sbi_probe_extension() out of CONFIG_SBI_V01.
- SiFive FU540 support SPL.
2020-06-04 13:50:39 -04:00
Tom Rini
c27178ba36 First set of u-boot-atmel fixes for 2020.07 cycle
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Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel fixes for 2020.07 cycle

This set includes just two small commits that fix a build warning and
add a missing serial node.
2020-06-04 10:21:51 -04:00
Bin Meng
0a94007e82 riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01
sbi_probe_extension() is an API defined in SBI v0.2, not v0.1.

Fixes 7e249bc13a: ("riscv: Move all SMP related SBI calls to SBI_v01")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-06-04 09:44:21 +08:00
Bin Meng
fe94355716 riscv: sbi: Remove sbi_spec_version
U-Boot defaults to use SBI v0.2. Howerver there is a global variable
sbi_spec_version that stills refers to v0.1. Since it is not used
anywhere, let's remove it.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-06-04 09:44:21 +08:00
Pragnesh Patel
c1416429ba doc: sifive: fu540: Add description for OpenSBI generic platform
OpenSBI generic platform support provides platform specific
functionality based on the FDT passed by previous booting stage.

Depends on OpenSBI commit:
platform: Add generic FDT based platform support
(sha1: f1aa9e54e00006ae70aeac638d5b75093520f65d)

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:09 +08:00
Pragnesh Patel
7649e59878 configs: fu540: Add config options for U-Boot SPL
With sifive_fu540_defconfig:

User can use FSBL or u-boot-spl.bin anyone at a time.

For FSBL,
fsbl->fw_payload.bin (opensbi + U-Boot)

For u-boot-spl.bin,
u-boot-spl.bin->FIT image (opensbi + U-Boot proper + dtb)

U-Boot SPL will be loaded by ZSBL from SD card (replace fsbl.bin with
u-boot-spl.bin) and runs in L2 LIM in machine mode and then load FIT
image u-boot.itb from SD card into RAM.

U-Boot SPL expects u-boot.itb FIT image at the starting of SD card sector
number (0x822) of GUID type "2E54B353-1271-4842-806F-E436D6AF6985"

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04 09:44:09 +08:00
Jagan Teki
819da86d52 sifive: fu540: Add U-Boot proper sector start
Add U-Boot proper sector start offset for SiFive FU540.
This value is based on the partition layout supported
by SiFive FU540.

u-boot.itb need to write on this specific offset so-that
the SPL will retrieve it from here and load.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-06-04 09:44:09 +08:00
Jagan Teki
085cb1d5d0 sifive: fu540: Add sample SD gpt partition layout
This is a sample GPT partition layout for SD card,
right now three important partitions are added to
make the system bootable.

partition layout:

Part    Start LBA       End LBA         Name
        Attributes
        Type GUID
        Partition GUID
  1     0x00000022      0x00000821      "loader1"
        attrs:  0x0000000000000000
        type:   5b193300-fc78-40cd-8002-e86c45580b47
        guid:   cbcbef44-e627-42bc-b134-93b6f3784b8c
  2     0x00000822      0x00002821      "loader2"
        attrs:  0x0000000000000000
        type:   2e54b353-1271-4842-806f-e436d6af6985
        guid:   f54eba28-d8de-4852-978d-1a673777e2ae
  3     0x00002822      0x00020821      "rootfs"
        attrs:  0x0000000000000004
        type:   0fc63daf-8483-4772-8e79-3d69d8477de4
        type:   linux
        guid:   9561df46-8d55-4799-a83b-cfee9ef6ff93

Note:
- loader1 would be fsbl or spl
- loader2 would be U-Boot or U-Boot proper

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-06-04 09:44:09 +08:00
Pragnesh Patel
01cdef22ee riscv: sifive: fu540: add SPL configuration
Add a support for SPL which will boot from L2 LIM (0x0800_0000) and
then SPL will boot U-Boot FIT image (OpenSBI FW_DYNAMIC + u-boot.bin)
from MMC boot devices.

SPL related code is leveraged from FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:09 +08:00
Pragnesh Patel
7c45fc9870 riscv: cpu: fu540: Add support for cpu fu540
Add SiFive fu540 cpu to support RISC-V arch

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:09 +08:00
Pragnesh Patel
25d0853fcb riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
This sync has changes required to use GPIO in U-Boot and
U-Boot SPL.

Sync dts from linux v5.7-rc2 commit:
"riscv: dts: Add GPIO reboot method to HiFive Unleashed DTS file"
(sha1: 0a91330b2af9f71ceeeed483f92774182b58f6d9)

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:09 +08:00
Pragnesh Patel
329e023868 riscv: sifive: dts: fu540: set ethernet clock rate
Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps,
Earlier this is done by FSBL. With this change We can remove the
ethernet clock rate code from FSBL.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04 09:44:09 +08:00
Pragnesh Patel
1ba43d29eb clk: sifive: fu540-prci: Release ethernet clock reset
U-Boot ethernet works with FSBL flow where releasing ethernet clock
reset is part of FSBL itself but with the SPL, We need to release
ethernet clock reset explicitly for U-Boot proper. With this change
Release ethernet clock reset code in FSBL might not be needed or
unaffected.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04 09:44:09 +08:00
Pragnesh Patel
378c7094af clk: sifive: fu540-prci: Add ddr clock initialization
Release ddr clock reset once clock is initialized

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
79e49b081f clk: sifive: fu540-prci: Add clock enable and disable ops
Added clock enable and disable functions in prci ops

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
fdf5dba1fc riscv: sifive: dts: fu540: add U-Boot dmc node
Add dmc node to enable ddr driver. dmc is used to
initialize the memory controller.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
8a3fd8440f sifive: dts: fu540: Add DDR controller and phy register settings
Add DDR controller and phy register settings, taken from fsbl
(https://github.com/sifive/freedom-u540-c000-bootloader.git)

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
c514a94abf sifive: fu540: add ddr driver
Add driver for fu540 to support ddr initialization in SPL.
This driver is based on FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
0eed87ed90 riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
Devicetree files in FU540 platform is synced from Linux, like other
platforms does. Apart from these U-Boot in FU540 would also require
some U-Boot specific node like clint.

So, create board specific -u-boot.dtsi files. This would help of
maintain U-Boot specific changes separately without touching Linux
dts(i) files which indeed easy for syncing from Linux between
releases.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
108604706d lib: Makefile: build crc7.c when CONFIG_MMC_SPI
When build U-Boot SPL, meet an issue of undefined reference to
'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when
CONFIG_MMC_SPI selected.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
bbb94af981 riscv: Add _image_binary_end for SPL
For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
88eec6159a riscv: sifive: fu540: Use OTP DM driver for serial environment variable
Use the OTP DM driver to set the serial environment variable.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
05307213c6 misc: add driver for the SiFive otp controller
Added a misc driver to handle OTP memory in SiFive SoCs.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00