Commit graph

816 commits

Author SHA1 Message Date
Tom Rini
6d7dacf726 Xilinx changes for v2020.07-rc2
mmc:
 - Fix dt property handling via generic function
 
 clk:
 - Fix versal watchdog clock setting
 
 nand:
 - Fix zynq nand command comparison
 
 xilinx:
 - Enable ubifs
 - Sync board_late_init configurations with initrd_high setup
 - Make custom distro boot more verbose
 
 zynq:
 - Kconfig alignments
 - Fix nand cse configuration
 
 zynqmp:
 - Fix zcu104 low level qspi configuration
 - Small DT updates
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Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2020.07-rc2

mmc:
- Fix dt property handling via generic function

clk:
- Fix versal watchdog clock setting

nand:
- Fix zynq nand command comparison

xilinx:
- Enable ubifs
- Sync board_late_init configurations with initrd_high setup
- Make custom distro boot more verbose

zynq:
- Kconfig alignments
- Fix nand cse configuration

zynqmp:
- Fix zcu104 low level qspi configuration
- Small DT updates

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-30 11:34:01 -04:00
Álvaro Fernández Rojas
b9ec102bc4 nand: brcmnand: return without disabling clock
Linux Broadcom NAND driver only disabled clock if no childs are initialized.
This section of the code seems to have been accidentally dropped when it was
imported in U-Boot.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Patrick van Gelder
27d706937a ARM: zynq: Fix invalid check on NAND_CMD_NONE.
The end_cmd field in the variables cmd_phase_addr and data_phase_addr
contains the value 0xFF when the end_cmd equals NAND_CMD_NONE. This
should be 0x00.

This is caused by comparing NAND_CMD_NONE (int) with end_cmd (u8).
end_cmd will be promoted by the int value -1 and therefore is not equal
to 0xFF. Solved by casting NAND_CMD_NONE to u8 which will avoid int
promotion.

Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com>
Reviewed-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 14:21:18 +02:00
Baruch Siach
593f3976be mtd: nand: pxa3xx: fix raw read when last_chunk_size == 0
Commit 6293b0361d ("mtd: nand: pxa3xx: add raw read support") added the
local data_len variable in handle_data_pio() to track read size, but
forgot to update the condition of drain_fifo() call. That happens to
work when the layout last_chunk_size != 0. But when last_chunk_size ==
0, drain_fifo() is not called to read the last chunk, which leads to
"Wait timeout!!!" error. Fix this.

Fixes: 6293b0361d ("mtd: nand: pxa3xx: add raw read support")
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-04-24 15:17:14 -04:00
Michal Simek
3811746ed9 nand: raw: zynq: Do not try to probe driver if nand flash is disabled
There is no reason to continue when DT status property indicates that NAND
flash is disabled. But that means that NOR flash should be present that's
why try it find it out.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-06 12:52:15 +02:00
Michal Simek
36f1f3b640 nand: raw: Do not free xnand structure
xnand structure is private data structure and it is handled by core and
probe shouldn't touch it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-06 12:52:05 +02:00
T Karthik Reddy
4c2c28a465 mtd: nand: Fix on-die ecc issues in arasan_nfc driver
Fixed wrong enumeration of nand_config structure. Added chip select
function before reading the nand chip for maf/dev id's, without this
unable to access id's from some of the micron chips. Also added a
print statement to identify if a nand flash is using on-die ecc.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28 12:04:10 +01:00
Masahiro Yamada
9d86b89c59 dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>
The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.

Factor them out to <linux/dma-mapping.h>, and make all drivers to
include <linux/dma-mapping.h> instead of <asm/dma-mapping.h>.

If we need to differentiate them for some architectures, we can
move the generic definitions to <asm-generic/dma-mapping.h>.

Add some comments to the helpers. The concept is quite similar to
the DMA-API of Linux kernel. Drivers are agnostic about what is
going on behind the scene. Just call dma_map_single() before the
DMA, and dma_unmap_single() after it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19 21:27:30 +08:00
Masahiro Yamada
950c596867 dma-mapping: fix the prototype of dma_unmap_single()
dma_unmap_single() takes the dma address, not virtual address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19 21:27:30 +08:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Simon Glass
8d38a8459b mtd: Rename free() to rfree()
This function name conflicts with our desire to #define free() to
something else on sandbox. Since it deals with resources, rename it to
rfree().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Masahiro Yamada
407b01b3b3 mtd: rawnand: denali_dt: use UCLASS_MTD instead of UCLASS_MISC
UCLASS_MTD is a better fit for NAND drivers.

Make NAND_DENALI_DT depend on DM_MTD, which is needed to compile
drivers/mtd/mtd-uclass.c

Also, make ARCH_UNIPHIER select DM_MTD because all the defconfig
of this platform enables NAND_DENALI_DT.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-02-01 01:14:32 +09:00
Masahiro Yamada
80924cc164 mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES based on DT compatible
Currently, the denali NAND driver in U-Boot configures the
SPARE_AREA_SKIP_BYTES based on the CONFIG option.

Recently, Linux kernel merged a patch that associates the proper
value for this register with the DT compatible string.

Do likewise in U-Boot too.

The denali_spl.c still uses CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01 01:14:32 +09:00
Masahiro Yamada
21d4a3ca54 mtd: rawnand: denali_dt: insert udelay() after reset deassert
When the reset signal is de-asserted, the HW-controlled bootstrap
starts running unless it is disabled in the SoC integration.
It issues some commands to detect a NAND chip, and sets up registers
automatically. Until this process finishes, software should avoid
any register access.

Without this delay function, some of UniPhier boards hangs up while
executing nand_scan_ident(). (denali_read_byte() is blocked)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01 01:14:32 +09:00
Marek Vasut
9925df051a mtd: rawnand: denali: Do not reset the block before booting the kernel
The Denali NAND driver in mainline Linux currently cannot deassert the
reset. The upcoming Linux 5.6 will support the reset controlling, and
also set up SPARE_AREA_SKIP_BYTES correctly. So, the Denali driver in
the future kernel will work without relying on any bootloader or firmware.
However, we still need to take care of stable kernel versions for a while.
U-boot should not assert the reset of this controller.

Fixes: ed784ac382 ("mtd: rawnand: denali: add reset handling")
Signed-off-by: Marek Vasut <marex@denx.de>
[yamada.masahiro: reword the commit description]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01 01:14:32 +09:00
Masahiro Yamada
11bcc5841a mtd: rawnand: denali_dt: make the core clock optional
The "nand_x" and "ecc" clocks are currently optional. Make the core
clock optional in the same way. This will allow platforms with no clock
driver support to use this driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Marek Vasut <marex@denx.de> # On SoCFPGA Arria V
2020-02-01 01:14:32 +09:00
Marek Vasut
33672c970b mtd: rawnand: denali-spl: Add missing hardware init on SoCFPGA
On Altera SoCFPGA, upon either cold-boot or power-on reset, the
Denali NAND IP is initialized by the BootROM ; upon warm-reset,
the Denali NAND IP is NOT initialized by BootROM. In fact, upon
warm-reset, the SoCFPGA BootROM checks whether the SPL image in
on-chip RAM is valid and if so, completely skips re-loading the
SPL from the boot media.

This does sometimes lead to problems where the software left
the boot media in inconsistent state before warm-reset, and
because the BootROM does not reset the boot media, the boot
media is left in this inconsistent state, often until another
component attempts to access the boot media and fails with an
difficult to debug failure. To mitigate this problem, the SPL
on Altera SoCFPGA always resets all the IPs on the SoC early
on boot.

This results in a couple of register values, pre-programmed by
the BootROM, to be lost during this reset. To restore correct
operation of the IP on SoCFPGA, these values must be programmed
back into the controller by the driver. Note that on other SoCs
which do not use the HW-controlled bootstrap, more registers
may have to be programmed.

This also aligns the SPL behavior with the full Denali NAND
driver, which sets these values in denali_hw_init().

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01 01:14:32 +09:00
Robert Marko
370d33bc8c mtd: spinand: winbond: Add support for W25N01GV
Linux has supported W25N01GV for a long time, so lets import it.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27 22:27:22 +05:30
Vignesh Raghavendra
6fff562baf mtd: denali: Drop custom dma mapping functions
Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-25 12:04:36 -05:00
Philippe Reynes
1453301122 nand: brcmnand: add bcm68360 support
This adds the nand support for chipset bcm68360.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-23 07:29:58 -05:00
Simon Glass
db41d65a97 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17 17:53:40 -05:00
Ashok Reddy Soma
2507ecf18b zynq: mtd: nand: Remove hardcoded base addresses
Remove hardcoded base addresses of smc controller and nand controller.
Get those addresses from dt and replace wherever they are used.
Remove smc and nand base address from header file too.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Ashok Reddy Soma
45397a6ea3 zynq: mtd: nand: Move zynq nand driver to driver model
Move the zynq nand driver to driver model. Select DM_MTD if
zynq nand controller (NAND_ZYNQ) is selected.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Ashok Reddy Soma
3dd0f8cccd mtd: nand: Remove hardcoded base address of nand
Remove hardcoded base address of nand and replace it with the
value taken from device tree. Remove base address from header
file too.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:52 +01:00
Ashok Reddy Soma
b014b833bd mtd: nand: Move arasan nand driver to driver model
Make changes to arasan nand driver to move it to driver model.
Select DM_MTD if arasan nand driver is selected.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:52 +01:00
Miquel Raynal
fb4384490d mtd: Makefile: deep cleanup
Move MTD-related lines out of the root Makefile. Put them in their
respective directories. Enclose some of these new lines to skip them
when building the SPL. MTD core files and some MTD device drivers are
compiled in a mtd.o object and included in the final object only if
MTD support is required (there are two different symbols for that, one
for U-Boot and one for the SPL).

Now that all defconfigs have been fixed, we can stop the logic where
enabling a command selects the core files to compile. This logic is
broken since selecting a symbol with a 'depends on' will not enforce
this secondary dependency.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-12-04 17:10:51 -05:00
Miquel Raynal
c8f555f102 mtd: nand: add includes in NAND core to avoid warnings
Because of the include's game, when some files are compiled for a SPI
NAND device, no warning appears. But when it is for a raw NAND device,
GCC complains. Fix these warning by including <common.h>.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-04 17:10:51 -05:00
Miquel Raynal
888f184abe mtd: rename CONFIG_MTD_DEVICE -> CONFIG_MTD
Like in Linux, just use CONFIG_MTD to compile the MTD stack.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03 23:04:10 -05:00
Miquel Raynal
1de770d544 mtd: rename CONFIG_MTD -> CONFIG_DM_MTD
CONFIG_MTD must be reserved for the MTD core. Like any other
subsystem, prefix the symbol by DM when it comes to DM support.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
[trini: Add Kconfig files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03 23:04:10 -05:00
Miquel Raynal
88718be300 mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND
Add more clarity by changing the Kconfig entry name.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Re-run migration, update a few more cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03 23:04:10 -05:00
Simon Glass
288b29e44d common: Move command functions out of common.h
Move these functions into the command.h header file which is a better fit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:02 -05:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Igor Opaniuk
9ab5f221a5 nand: mxs_nand: add API for switching different BCH layouts
On i.MX7 in a sake of reducing the disturbances caused by a neighboring
cells in the FCB page in the NAND chip, a randomizer is enabled when
reading the FCB page by ROM bootloader.

Add API for setting BCH to specific layout (and restoring it back) used by
ROM bootloader to be able to burn it in a proper way to NAND using
nandbcb command.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Anti Sullin <anti.sullin@artecdesign.ee>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:19 +01:00
Tom Rini
412326d1bc Merge tag 'u-boot-clk-23Oct2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Add I2C clocks for i.MX6Q CCF driver
- Fix check in clk_set_default_parents()
- Managed API to get clock from device tree
- Fixes for core clock code (including sandbox regression tests)
2019-10-30 13:13:46 -04:00
William Zhang
e365de9051 drivers: nand: brcmnand: fix nand_chip ecc layout structure
The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
old kernel which does not use this new API and expect nand_chip.ecc.layout
structure to be set. This cause nand_scan_tail function running into a bug
check if the device has a different oob size than the default ones.

This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
that supports the ecc layout struture and replaces the mtd_set_ooblayout
method

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
a9f80cf9ad nand: brcm: add BCM6368 support
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-10-25 17:20:43 +02:00
Jean-Jacques Hiblot
52720c536f drivers: clk: Add a managed API to get clocks from the device-tree
Add devm_clk_get(), devm_clk_get_optional() to get clocks from the
device-tree. The clocks is automatically released and the data structure
freed when the device is unbound.
Also add devm_clk_put() to release the clock and free the data structure
manually.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-22 16:14:05 +02:00
Stefan Roese
c680df7e84 mtd: nand: raw: Move CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig
Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs,
headers and whitelist.

Please note that this symbol already was used in Kconfig
(imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was
not available in Kconfig. This changes now with this patch and all
boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what
I also need on my GARDENA AT91SAM based board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
[trini: Rework such that the configs are unchanged to start with]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-25 20:58:37 -04:00
Heinrich Schuchardt
51443f57d8 nand: davinci: avoid out of bounds array access
The array bounds have to be checked before accessing the array element.

Identified by cppcheck.

Fixes: 67ac6ffaee ("mtd: nand: davinci: add opportunity to write keystone U-boot image")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-31 13:08:07 -04:00
Bartosz Golaszewski
29d8eb3345 nand: davinci: add support for driver model
Extend the davinci NAND driver to support the driver model. For now this
doesn't add any device-tree parsing due to the fact that we can't access
the actual nand node on the device-tree - it's a subnode of the aemif
device and we don't have an aemif driver on davinci at the moment.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-07-29 17:58:52 -04:00
Bartosz Golaszewski
7bf9972643 nand: davinci: make davinci_nand_init() static
This function is only used within the driver itself. No need
to export it.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-07-29 17:58:52 -04:00
Shyam Saini
1d43e24b94 i.MX6: nand: add nandbcb command for imx
Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.

It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.

It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.

So, cmd_nandbcb implemented in arch/arm/mach-imx

BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.

On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
  1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocks

for nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.

Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.

Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
2019-07-19 14:51:25 +02:00
Patrick Delaunay
d99ea13cdf mtd: rawnand: stm32_fmc2: avoid warnings when building with W=1 option
This patch solves warnings detected by setting W=1 when building.

Warnings type detected:
 - [-Wsign-compare]
 - [-Wtype-limits]

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:57 +02:00
Mario Six
fe7d654d04 mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to Kconfig
Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.

Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:52:33 +02:00
Trevor Woerner
1001502545 CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.

Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18 08:15:35 -04:00
Bartosz Golaszewski
a7fc3d7c68 nand: davinci: remove dead code for dm644x
The support for DaVinci DM* SoCs has been dropped. The code that used
to be relevant to dm644x is no longer needed. Remove it.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-05-04 13:04:07 -04:00
Gregory CLEMENT
5f626e7849 mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior
The purpose of "mtd: nand: raw: allow to disable unneeded ECC layouts"
was to allow disabling the default ECC layouts if a driver is known to
provide its own ECC layout. However, this commit did the opposite and
disabled the default layout when it was _not_ selected.

It breaks all the NAND drivers not providing their own ECC layout this
patch fix this situation.

It was tested with the lpc32xx_nand_slc driver.

Fixes: a38c3af868 ("mtd: nand: raw: allow to disable unneeded ECC layouts")
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-26 18:58:20 -04:00
Philippe Reynes
f917438772 drivers: nand: brcmnand: add an option to read the write-protect from device tree
The option write-protect may only change on the kernel command line,
we add a property in the device tree to be more flexible.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 11:55:58 -04:00
Philippe Reynes
317d40eb01 drivers: nand: brcmnand: add parameter parameter-page-big-endian
The parameter page isn't always in big endian, so we add
an option to choose the endiannes of the parameter page.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 11:55:58 -04:00