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https://github.com/AsahiLinux/u-boot
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drivers: nand: brcmnand: fix nand_chip ecc layout structure
The current brcmnand driver is based on 4.18 linux kernel which uses mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from old kernel which does not use this new API and expect nand_chip.ecc.layout structure to be set. This cause nand_scan_tail function running into a bug check if the device has a different oob size than the default ones. This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7 that supports the ecc layout struture and replaces the mtd_set_ooblayout method Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit is contained in:
William Zhang
Daniel Schwierzeck
parent
a69bae04fd
commit
e365de9051
1 changed files with 108 additions and 160 deletions
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@ -888,161 +888,59 @@ static inline bool is_hamming_ecc(struct brcmnand_controller *ctrl,
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}
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/*
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* Set mtd->ooblayout to the appropriate mtd_ooblayout_ops given
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* the layout/configuration.
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* Returns -ERRCODE on failure.
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* Returns a nand_ecclayout strucutre for the given layout/configuration.
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* Returns NULL on failure.
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*/
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static int brcmnand_hamming_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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static struct nand_ecclayout *brcmnand_create_layout(int ecc_level,
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struct brcmnand_host *host)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct brcmnand_host *host = nand_get_controller_data(chip);
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struct brcmnand_cfg *cfg = &host->hwcfg;
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int sas = cfg->spare_area_size << cfg->sector_size_1k;
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int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
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int i, j;
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struct nand_ecclayout *layout;
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int req;
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int sectors;
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int sas;
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int idx1, idx2;
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if (section >= sectors)
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return -ERANGE;
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#ifndef __UBOOT__
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layout = devm_kzalloc(&host->pdev->dev, sizeof(*layout), GFP_KERNEL);
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#else
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layout = devm_kzalloc(host->pdev, sizeof(*layout), GFP_KERNEL);
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#endif
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if (!layout)
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return NULL;
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oobregion->offset = (section * sas) + 6;
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oobregion->length = 3;
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sectors = cfg->page_size / (512 << cfg->sector_size_1k);
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sas = cfg->spare_area_size << cfg->sector_size_1k;
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return 0;
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}
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static int brcmnand_hamming_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct brcmnand_host *host = nand_get_controller_data(chip);
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struct brcmnand_cfg *cfg = &host->hwcfg;
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int sas = cfg->spare_area_size << cfg->sector_size_1k;
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int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
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if (section >= sectors * 2)
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return -ERANGE;
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oobregion->offset = (section / 2) * sas;
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if (section & 1) {
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oobregion->offset += 9;
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oobregion->length = 7;
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} else {
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oobregion->length = 6;
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/* First sector of each page may have BBI */
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if (!section) {
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/*
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* Small-page NAND use byte 6 for BBI while large-page
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* NAND use byte 0.
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*/
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if (cfg->page_size > 512)
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oobregion->offset++;
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oobregion->length--;
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/* Hamming */
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if (is_hamming_ecc(host->ctrl, cfg)) {
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for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) {
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/* First sector of each page may have BBI */
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if (i == 0) {
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layout->oobfree[idx2].offset = i * sas + 1;
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/* Small-page NAND use byte 6 for BBI */
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if (cfg->page_size == 512)
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layout->oobfree[idx2].offset--;
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layout->oobfree[idx2].length = 5;
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} else {
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layout->oobfree[idx2].offset = i * sas;
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layout->oobfree[idx2].length = 6;
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}
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idx2++;
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layout->eccpos[idx1++] = i * sas + 6;
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layout->eccpos[idx1++] = i * sas + 7;
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layout->eccpos[idx1++] = i * sas + 8;
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layout->oobfree[idx2].offset = i * sas + 9;
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layout->oobfree[idx2].length = 7;
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idx2++;
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/* Leave zero-terminated entry for OOBFREE */
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if (idx1 >= MTD_MAX_ECCPOS_ENTRIES_LARGE ||
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idx2 >= MTD_MAX_OOBFREE_ENTRIES_LARGE - 1)
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break;
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}
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}
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return 0;
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}
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static const struct mtd_ooblayout_ops brcmnand_hamming_ooblayout_ops = {
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.ecc = brcmnand_hamming_ooblayout_ecc,
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.free = brcmnand_hamming_ooblayout_free,
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};
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static int brcmnand_bch_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct brcmnand_host *host = nand_get_controller_data(chip);
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struct brcmnand_cfg *cfg = &host->hwcfg;
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int sas = cfg->spare_area_size << cfg->sector_size_1k;
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int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
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if (section >= sectors)
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return -ERANGE;
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oobregion->offset = (section * (sas + 1)) - chip->ecc.bytes;
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oobregion->length = chip->ecc.bytes;
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return 0;
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}
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static int brcmnand_bch_ooblayout_free_lp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct brcmnand_host *host = nand_get_controller_data(chip);
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struct brcmnand_cfg *cfg = &host->hwcfg;
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int sas = cfg->spare_area_size << cfg->sector_size_1k;
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int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
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if (section >= sectors)
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return -ERANGE;
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if (sas <= chip->ecc.bytes)
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return 0;
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oobregion->offset = section * sas;
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oobregion->length = sas - chip->ecc.bytes;
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if (!section) {
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oobregion->offset++;
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oobregion->length--;
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}
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return 0;
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}
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static int brcmnand_bch_ooblayout_free_sp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct brcmnand_host *host = nand_get_controller_data(chip);
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struct brcmnand_cfg *cfg = &host->hwcfg;
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int sas = cfg->spare_area_size << cfg->sector_size_1k;
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if (section > 1 || sas - chip->ecc.bytes < 6 ||
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(section && sas - chip->ecc.bytes == 6))
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return -ERANGE;
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if (!section) {
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oobregion->offset = 0;
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oobregion->length = 5;
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} else {
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oobregion->offset = 6;
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oobregion->length = sas - chip->ecc.bytes - 6;
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}
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return 0;
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}
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static const struct mtd_ooblayout_ops brcmnand_bch_lp_ooblayout_ops = {
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.ecc = brcmnand_bch_ooblayout_ecc,
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.free = brcmnand_bch_ooblayout_free_lp,
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};
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static const struct mtd_ooblayout_ops brcmnand_bch_sp_ooblayout_ops = {
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.ecc = brcmnand_bch_ooblayout_ecc,
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.free = brcmnand_bch_ooblayout_free_sp,
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};
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static int brcmstb_choose_ecc_layout(struct brcmnand_host *host)
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{
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struct brcmnand_cfg *p = &host->hwcfg;
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struct mtd_info *mtd = nand_to_mtd(&host->chip);
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struct nand_ecc_ctrl *ecc = &host->chip.ecc;
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unsigned int ecc_level = p->ecc_level;
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int sas = p->spare_area_size << p->sector_size_1k;
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int sectors = p->page_size / (512 << p->sector_size_1k);
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if (p->sector_size_1k)
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ecc_level <<= 1;
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if (is_hamming_ecc(host->ctrl, p)) {
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ecc->bytes = 3 * sectors;
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mtd_set_ooblayout(mtd, &brcmnand_hamming_ooblayout_ops);
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return 0;
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return layout;
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}
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/*
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@ -1051,20 +949,70 @@ static int brcmstb_choose_ecc_layout(struct brcmnand_host *host)
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* >= v5.0: ECC_REQ = ceil(BCH_T * 14/8)
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* But we will just be conservative.
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*/
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ecc->bytes = DIV_ROUND_UP(ecc_level * 14, 8);
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if (p->page_size == 512)
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mtd_set_ooblayout(mtd, &brcmnand_bch_sp_ooblayout_ops);
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else
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mtd_set_ooblayout(mtd, &brcmnand_bch_lp_ooblayout_ops);
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if (ecc->bytes >= sas) {
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req = DIV_ROUND_UP(ecc_level * 14, 8);
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if (req >= sas) {
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dev_err(&host->pdev->dev,
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"error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n",
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ecc->bytes, sas);
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return -EINVAL;
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req, sas);
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return NULL;
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}
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return 0;
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layout->eccbytes = req * sectors;
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for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) {
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for (j = sas - req; j < sas && idx1 <
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MTD_MAX_ECCPOS_ENTRIES_LARGE; j++, idx1++)
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layout->eccpos[idx1] = i * sas + j;
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/* First sector of each page may have BBI */
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if (i == 0) {
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if (cfg->page_size == 512 && (sas - req >= 6)) {
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/* Small-page NAND use byte 6 for BBI */
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layout->oobfree[idx2].offset = 0;
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layout->oobfree[idx2].length = 5;
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idx2++;
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if (sas - req > 6) {
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layout->oobfree[idx2].offset = 6;
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layout->oobfree[idx2].length =
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sas - req - 6;
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idx2++;
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}
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} else if (sas > req + 1) {
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layout->oobfree[idx2].offset = i * sas + 1;
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layout->oobfree[idx2].length = sas - req - 1;
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idx2++;
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}
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} else if (sas > req) {
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layout->oobfree[idx2].offset = i * sas;
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layout->oobfree[idx2].length = sas - req;
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idx2++;
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}
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/* Leave zero-terminated entry for OOBFREE */
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if (idx1 >= MTD_MAX_ECCPOS_ENTRIES_LARGE ||
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idx2 >= MTD_MAX_OOBFREE_ENTRIES_LARGE - 1)
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break;
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}
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return layout;
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}
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static struct nand_ecclayout *brcmstb_choose_ecc_layout(
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struct brcmnand_host *host)
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{
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struct nand_ecclayout *layout;
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struct brcmnand_cfg *p = &host->hwcfg;
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unsigned int ecc_level = p->ecc_level;
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if (p->sector_size_1k)
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ecc_level <<= 1;
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layout = brcmnand_create_layout(ecc_level, host);
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if (!layout) {
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dev_err(&host->pdev->dev,
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"no proper ecc_layout for this NAND cfg\n");
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return NULL;
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}
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return layout;
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}
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static void brcmnand_wp(struct mtd_info *mtd, int wp)
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@ -2383,9 +2331,9 @@ static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn)
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/* only use our internal HW threshold */
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mtd->bitflip_threshold = 1;
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ret = brcmstb_choose_ecc_layout(host);
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if (ret)
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return ret;
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chip->ecc.layout = brcmstb_choose_ecc_layout(host);
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if (!chip->ecc.layout)
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return -ENXIO;
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ret = nand_scan_tail(mtd);
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if (ret)
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