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nand: brcmnand: add bcm68360 support
This adds the nand support for chipset bcm68360. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
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3 changed files with 130 additions and 0 deletions
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@ -78,6 +78,12 @@ config NAND_BRCMNAND_6368
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help
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Enable support for broadcom nand driver on bcm6368.
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config NAND_BRCMNAND_68360
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bool "Support Broadcom NAND controller on bcm68360"
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depends on NAND_BRCMNAND && ARCH_BCM68360
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help
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Enable support for broadcom nand driver on bcm68360.
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config NAND_BRCMNAND_6838
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bool "Support Broadcom NAND controller on bcm6838"
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depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
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@ -2,6 +2,7 @@
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obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o
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obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o
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obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o
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obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o
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obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o
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obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o
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123
drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
Normal file
123
drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
Normal file
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@ -0,0 +1,123 @@
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// SPDX-License-Identifier: GPL-2.0+
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#include <common.h>
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#include <asm/io.h>
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#include <memalign.h>
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#include <nand.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <dm.h>
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#include "brcmnand.h"
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struct bcm68360_nand_soc {
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struct brcmnand_soc soc;
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void __iomem *base;
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};
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#define BCM68360_NAND_INT 0x00
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#define BCM68360_NAND_STATUS_SHIFT 0
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#define BCM68360_NAND_STATUS_MASK (0xfff << BCM68360_NAND_STATUS_SHIFT)
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#define BCM68360_NAND_INT_EN 0x04
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#define BCM68360_NAND_ENABLE_SHIFT 0
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#define BCM68360_NAND_ENABLE_MASK (0xffff << BCM68360_NAND_ENABLE_SHIFT)
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enum {
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BCM68360_NP_READ = BIT(0),
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BCM68360_BLOCK_ERASE = BIT(1),
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BCM68360_COPY_BACK = BIT(2),
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BCM68360_PAGE_PGM = BIT(3),
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BCM68360_CTRL_READY = BIT(4),
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BCM68360_DEV_RBPIN = BIT(5),
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BCM68360_ECC_ERR_UNC = BIT(6),
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BCM68360_ECC_ERR_CORR = BIT(7),
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};
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static bool bcm68360_nand_intc_ack(struct brcmnand_soc *soc)
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{
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struct bcm68360_nand_soc *priv =
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container_of(soc, struct bcm68360_nand_soc, soc);
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void __iomem *mmio = priv->base + BCM68360_NAND_INT;
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u32 val = brcmnand_readl(mmio);
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if (val & (BCM68360_CTRL_READY << BCM68360_NAND_STATUS_SHIFT)) {
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/* Ack interrupt */
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val &= ~BCM68360_NAND_STATUS_MASK;
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val |= BCM68360_CTRL_READY << BCM68360_NAND_STATUS_SHIFT;
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brcmnand_writel(val, mmio);
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return true;
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}
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return false;
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}
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static void bcm68360_nand_intc_set(struct brcmnand_soc *soc, bool en)
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{
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struct bcm68360_nand_soc *priv =
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container_of(soc, struct bcm68360_nand_soc, soc);
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void __iomem *mmio = priv->base + BCM68360_NAND_INT_EN;
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u32 val = brcmnand_readl(mmio);
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/* Don't ack any interrupts */
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val &= ~BCM68360_NAND_STATUS_MASK;
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if (en)
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val |= BCM68360_CTRL_READY << BCM68360_NAND_ENABLE_SHIFT;
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else
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val &= ~(BCM68360_CTRL_READY << BCM68360_NAND_ENABLE_SHIFT);
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brcmnand_writel(val, mmio);
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}
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static int bcm68360_nand_probe(struct udevice *dev)
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{
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struct udevice *pdev = dev;
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struct bcm68360_nand_soc *priv = dev_get_priv(dev);
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struct brcmnand_soc *soc;
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struct resource res;
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soc = &priv->soc;
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dev_read_resource_byname(pdev, "nand-int-base", &res);
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priv->base = devm_ioremap(dev, res.start, resource_size(&res));
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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soc->ctlrdy_ack = bcm68360_nand_intc_ack;
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soc->ctlrdy_set_enabled = bcm68360_nand_intc_set;
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/* Disable and ack all interrupts */
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brcmnand_writel(0, priv->base + BCM68360_NAND_INT_EN);
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brcmnand_writel(0, priv->base + BCM68360_NAND_INT);
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return brcmnand_probe(pdev, soc);
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}
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static const struct udevice_id bcm68360_nand_dt_ids[] = {
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{
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.compatible = "brcm,nand-bcm68360",
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},
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(bcm68360_nand) = {
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.name = "bcm68360-nand",
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.id = UCLASS_MTD,
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.of_match = bcm68360_nand_dt_ids,
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.probe = bcm68360_nand_probe,
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.priv_auto_alloc_size = sizeof(struct bcm68360_nand_soc),
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};
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void board_nand_init(void)
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{
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struct udevice *dev;
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int ret;
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ret = uclass_get_device_by_driver(UCLASS_MTD,
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DM_GET_DRIVER(bcm68360_nand), &dev);
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if (ret && ret != -ENODEV)
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pr_err("Failed to initialize %s. (error %d)\n", dev->name,
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ret);
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}
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