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15700 commits

Author SHA1 Message Date
Lokesh Vutla
14d963d1b5 remoteproc: elf_loader: Always check the validity of the image before loading
rproc_elf32_load_image() rely on user to send a valid address for elf loading.
Instead do a sanity check on the address passed by user. This will help
all rproc elf users to not call sanity_check explicitly before calling
elf_loading.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
2019-10-11 10:07:34 -04:00
Lokesh Vutla
c08eb93626 remoteproc: ops: Add elf section size as input parameter to device_to_virt api
Introduce a new parameter "size" that accepts size of the region to
remoteproc ops callback device_to_virt(). This can enforce more checks
on the region that device_to_virt() is dealing with.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
2019-10-11 10:07:33 -04:00
Lokesh Vutla
240b932010 dm: core: Add a function to count the children of a device
Add a function to count the available children of a device.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-11 10:07:33 -04:00
Tom Rini
44fb0d6c9f Xilinx/FPGA changes for v2020.01
FPGA:
 - Enable fpga loading on Versal
 - Minor fix
 
 Microblaze:
 - Fix LMB configurations to support initrds
 - Some other cleanups
 
 Zynq:
 - Minor config/dt changes
 - Add distro boot support for usb1 and mmc1
 - Remove Xilinx private boot commands and use only distro boot
 
 ZynqMP:
 - Kconfig cleanups, defconfig updates
 - Update some dt files
 - Add firmware driver for talking to PMUFW
 - Extend distro boot support for jtag
 - Add new IDs
 - Add system controller configurations
 - Convert code to talk firmware via mailbox or SMCs
 
 Versal:
 - Add board_late_init()
 - Add run time DT memory setup
 - Add DFU support
 - Extend distro boot support for jtag and dfu
 - Add clock driver
 - Tune mini configurations
 
 Xilinx:
 - Improve documentation (boot scripts, dt binding)
 - Enable run time initrd_high calculation
 - Define default SYS_PROMPT
 - Add zynq/zynqmp virtual defconfig
 
 Drivers:
 - Add Xilinx mailbox driver for talking to firmware
 - Clean zynq_gem for Versal
 - Move ZYNQ_HISPD_BROKEN to Kconfig
 - Wire genphy_init() in phy.c
 - Add Xilinx gii2rgmii bridge
 - Cleanup zynq_sdhci
 - dwc3 fix
 - zynq_gpio fix
 - axi_emac fix
 
 Others:
 - apalis-tk1 - clean config file
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Merge tag 'xilinx-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.01

FPGA:
- Enable fpga loading on Versal
- Minor fix

Microblaze:
- Fix LMB configurations to support initrds
- Some other cleanups

Zynq:
- Minor config/dt changes
- Add distro boot support for usb1 and mmc1
- Remove Xilinx private boot commands and use only distro boot

ZynqMP:
- Kconfig cleanups, defconfig updates
- Update some dt files
- Add firmware driver for talking to PMUFW
- Extend distro boot support for jtag
- Add new IDs
- Add system controller configurations
- Convert code to talk firmware via mailbox or SMCs

Versal:
- Add board_late_init()
- Add run time DT memory setup
- Add DFU support
- Extend distro boot support for jtag and dfu
- Add clock driver
- Tune mini configurations

Xilinx:
- Improve documentation (boot scripts, dt binding)
- Enable run time initrd_high calculation
- Define default SYS_PROMPT
- Add zynq/zynqmp virtual defconfig

Drivers:
- Add Xilinx mailbox driver for talking to firmware
- Clean zynq_gem for Versal
- Move ZYNQ_HISPD_BROKEN to Kconfig
- Wire genphy_init() in phy.c
- Add Xilinx gii2rgmii bridge
- Cleanup zynq_sdhci
- dwc3 fix
- zynq_gpio fix
- axi_emac fix

Others:
- apalis-tk1 - clean config file
2019-10-09 16:22:03 -04:00
Tom Rini
eaa0bde051 u-boot-imx-20191009
-------------------
 
 Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532
 
 - MX6UL / ULZ
 - Toradex board
 - Allow to set OCRAM for MX6Q/D
 - MX7ULP
 - MX8: (container image, imx8mq_mek), SCU API
 - fix several board booting from SD/EMMC (cubox-i for example)
 - pico boards
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Merge tag 'u-boot-imx-20191009' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191009
-------------------

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532

- MX6UL / ULZ
- Toradex board
- Allow to set OCRAM for MX6Q/D
- MX7ULP
- MX8: (container image, imx8mq_mek), SCU API
- fix several board booting from SD/EMMC (cubox-i for example)
- pico boards

[trini: display5 merged manually]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-10-09 11:44:45 -04:00
Tom Rini
8c05abad13 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Move WATCHDOG_TIMEOUT_MSECS to Kconfig (Heiko)
2019-10-08 18:45:49 -04:00
Tom Rini
efea5a34bb Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Rename existing FSP code to fsp1
- Add fsp2 directory in preparation to support FSP 2.0
- Various x86 platform codes update
- Various bug fixes and updates in dm core, sandbox and spl
2019-10-08 18:45:26 -04:00
Tom Rini
9d536fe8ae First set of u-boot-atmel features and fixes for 2020.01 cycle
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Merge tag 'u-boot-atmel-2020.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features and fixes for 2020.01 cycle

The feature set includes support for two new boards from Microchip AT91:
The sama5d27_wlsom1_ek , an evaluation kit which includes the SAMA5D2
SOC packaged in a 256 MB LPDDR2 SIP, on a SOM including wireless, which
is placed on evaluation kit with sd-card, ethernet, LCD, Camera sensor,
QSPI, etc
The sam9x60ek, an evaluation kit for the new SoC based on ARM926j , the
SAM9X60 . The evaluation kit includes NAND flash, QSPI, Ethernet, Audio,
Camera sensor connector, etc.
The full support for sam9x60ek will come at a later time. There are
still missing bits regarding the clock support and power management
controller.
2019-10-08 18:43:56 -04:00
Tom Rini
8679be2956 Pull request for UEFI sub-system for efi-2020-01-rc1
The major corrections in this pull request are:
 
 Fixes for the SetVariable() boot service.
 Device path node for NVMe drives.
 Disable CONFIG_CMD_NVEDIT by default.
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Merge tag 'efi-2020-01-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-01-rc1

The major corrections in this pull request are:

Fixes for the SetVariable() boot service.
Device path node for NVMe drives.
Disable CONFIG_CMD_NVEDIT by default.
2019-10-08 18:43:37 -04:00
Igor Opaniuk
c115cd154c pinctrl: nxp: DM_FLAG_PRE_RELOC by default
For NXP SoCs we have to set pinmux configuration ASAP (ideally
before relocation) to get serial console working. Without this we miss
almost the half of output (U-boot version, CPU defails, Reset cause,
DRAM details etc.).

To achieve this we need to force appropriate pinctrl drivers to get
probed before relocation.

Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-10-08 16:36:37 +02:00
Jacky Bai
69b8e50975 ddr: imx8m: Fix the ddr init hang on imx8mq
On, i.MX8MQ, the PLL config must be done when ddrmix
isolation is released. So move the dram pll init after
iso config done. For other i.MX8M SOC, either init pll
before or after isolation is ok.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:37 +02:00
Jacky Bai
825ab6b406 driver: ddr: Refine the ddr init driver on imx8m
Refine the ddr init driver to make it more reusable for different
DDR type(LPDDR4, DDR4 & DDR3L). So we can reduce some redundant
code.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:37 +02:00
Bai Ping
7b14cc991b imx8mq: Update the ddrc QoS setting for B1 chip
Update the ddrc Qos setting for B1 to align with B0's setting.
Correct the initial clock for dram_pll. This setting will be
overwrite before ddr phy training. Although there is no impact
on the dram init, we still need to correct it to eliminate
confusion.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Tested-by: Robby Cai <robby.cai@nxp.com>
2019-10-08 16:36:37 +02:00
Ye Li
ca729cd16c ddr: imx8m: Fix ddr4 driver build issue
Since the parameter of dram_pll_init is changed, update to use new.
Also remove non-existed header file.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:37 +02:00
Ye Li
9699fb4de5 spi: fsl_qspi: Add support for QSPI on iMX7ULP
Add the compatible string and driver data for iMX7ULP platform

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:36:37 +02:00
Ye Li
ce7575a86d spi: fsl_qspi: Update to use driver data
Add the driver data for each compatible string. So we can remove the
SOC config and use driver data instead.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:36:37 +02:00
Ye Li
b866b9278a spi: fsl_qspi: Update write data size for page program LUT
The write data size can be overwritten by writing to the IDATSZ
field of IPCR register. Since the driver always updates the IDATSZ
in page program operation. Set the LUT data size to 0 to align
the codes with iMX.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:36:37 +02:00
Ye Li
7949576664 spi: fsl_qspi: Fix DDR mode setting for latest iMX platforms
On latest iMX platforms like iMX7D/iMX6UL/iMX8MQ, the QSPI controller
is updated to have TDH field in FLSHCR register. According to reference
manual, this TDH must be set to 1 when DDR_EN is set. Otherwise, the TX
DDR delay logic won't be enabled.

Another issue in DDR mode is the MCR register will be overwritten in
every read/write/erase operation. This causes DDR_EN been cleared while
TDH=1, then no clk2x output for TX data shift and all operations will
fail.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:36:37 +02:00
Peng Fan
4d81755272 misc: imx8: add more scfw api
Add more scfw api for clk/partition/seco usage
The api will be used by ccf/partition/secure boot.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
28cb058ff7 ddr: imx8m: fix ddr firmware location when enable SPL OF
With CONFIG_SPL_OF_CONTROL, the device tree will be padded to
end of the u-boot-spl-nodtb.bin, however we also put
the ddr firmware file to this location, so need to adapt
the code with SPL OF and align to 4 bytes to ease copy firmware.

Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Patrick Wildt
6300dc4c61 imx: add support for i.MX7/i.MX8MQ reset controller
Add support for the reset controller that's used on the i.MX7D
and i.MX8MQ.  This will be needed to be able to assert the PCIe
reset pins.  Bindings taken from Linux, driver implementation
mostly taken from Linux and adjusted to U-Boot infrastructure.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:36:36 +02:00
Patrick Wildt
d08a194871 imx: add support for i.MX8MQ power domain controller
Add support for the power domain controller that's used on the
i.MX8MQ.  This will be needed to be able to power on the PCIe
controller.  Bindings taken from Linux, driver implementation
taken from the i.MX8 power domain controller and adjusted for
the i.MX8M SoC.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
c883d6a0f4 spi: Add support for SPL_OF_PLATDATA to mxs_gpio.c driver
After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to
read states of gpio pins (and for example alter the boot flow).

It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match
requirements for SPL_OF_PLATDATA usage.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
cf31914cf2 mmc: Replace printf with debug call for timeouts in the i.MX28 mxs driver
This change replaces printf() with debug() for the notification about
commands timeouts.

This is done on purpose (also other drivers use such approach - dw_mmc.c,
mvebu_mmc.c), as the mmc core code (mmc.c) uses timeouts to assess if one
is using sd card or eMMC device.
In such situation timeout is a some kind of a "normal" behavior and there
shall not be any output to the console.

There is no impact on boot time for boards using this driver (even in SPL)
when two extra timeouts are returned (no SD card present, only eMMC
available).

Boot time tested with grabserial:
sudo grabserial -b 115200 -d /dev/ttyUSB1 -e 30 -t -m "^U-Boot SPL*"

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
6116f4c56f mmc: Convert mxsmmc eMMC driver for i.MX2{38} to DM/DTS
This patch converts the mxsmmc driver to support DM/DTS.

Moreover, it is also possible to use it in early SPL with
SPL_OF_PLATDATA enabled.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
ec0c81f8ed spi: Add support for SPL_OF_PLATDATA to mxs_spi.c driver
After this patch the mxs_spi.c DM/DTS driver can be used at early SPL to
read payload from SPI-NOR memories.

It was necessary to adjust its name to 'fsl_imx_2{38}_spi' to match
requirements for SPL_OF_PLATDATA usage.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
c2050e10e1 spi: fix: Call mxs_reset_block() during DM/DTS probe
Without this change the DM/DTS version of mxs_spi driver doesn't reset the
SPI IP block in probe.
As a result this driver (when used solely on U-Boot proper) relies on reset
performed by mxs spi driver in SPL.

In the use case where eMMC is used in SPL as a boot primary device, the
mxs_reset_block() is not called at all and DM/DTS aware SPI driver in
U-Boot proper is malfunctioning.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
3c50e01566 spl: Init proper struct driver member (platdata_auto_alloc_size) for mxs_spi
This change initializes proper member of struct driver -
platdata_auto_alloc_size instead of priv_auto_alloc_size, which is setup
twice.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Peng Fan
43c5087385 imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c
Move cpu desc code to cpu driver directory and name it imx8_cpu.c
No functional change.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
8cacd788b4 imx: scu_api: add sc_pm_is_partition_started
Add sc_pm_is_partition_started to check whether a partition
has been started. This will be used to detect M4 partition booted up or
not, then we could choose which dtb to use. If M4 is up, we need
use dtb, such as imx8qm-mek-rpmsg.dtb.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
268644735b imx: scu_api: add sc_rm_set_master_sid
Add sc_rm_set_master_sid to set stream sid of masters to make
sure they could use smmu.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
994ab731b3 misc: Kconfig: make i.MX7ULP could use MXC_OCOTP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Peng Fan
8c247bbe23 serial: Kconfig: make MXC_UART usable for MX7 and IMX8M
i.MX7 and i.MX8M use mxc uart driver, so let's make the SoC could
use MXC_UART kconfig.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:35:16 +02:00
Peng Fan
39ebb4187d pinctrl: imx: use devfdt_get_addr_size_index
fdtdec_get_addr_size could not parse addr/size correctly is
using address-cells 2 and size-cells 2 on an ARM32 SoC.
So switch to use devfdt_get_addr_size_index.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Michal Simek
a3e552b53f arm64: zynqmp: Use mailbox driver for PMUFW config loading
With new mailbox driver PMUFW configuration object can be loaded via the
same interface and there is no need to have pmu_ipc.c completely.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2019-10-08 09:55:11 +02:00
Michal Simek
b6039aad2d firmware: zynqmp: Separate function for sending message via mailbox
U-Boot running in EL3 can't use SMC that's why there is a need to talk to
PMUFW directly via mailbox. The same logic is applied to all functions
which need to talk to PMUFW that's why move this logic to separate function
to avoid code duplication.

Also SMC request ID can be composed from PM_SIP_SVC offset that's why
ZYNQMP_SIP_SVC_GET_API_VERSION macro can be removed completely.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
5743981e27 arm64: zynqmp: use firmware driver to get version
Use the new function from firmware version to get the firmware version.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
009ab7b93a firmware: zynqmp: create firmware header
New firmware header to place firmware specific macro and function
declarations. The patch also moves the macros defining PM operations as
well as some helper macros.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
490f627316 firmware: zynqmp: get fw version with mailbox driver
Implements the function to get PMU Firmware version using the mailbox
driver or smc call based on if running SPL or not. Additionally gets
version as part of the ZynqMP Firmware driver probing

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
1327d1678b firmware: zynqmp: Add zynqmp-power support
zynqmp-power driver for ZynqMP to handle the communication with the PMU
firmware. Firmware driver just probes subnodes and power driver handles
communication with PMU using the IPI mailbox driver.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
660b0c77d8 mailbox: zynqmp: ipi mailbox driver
ZynqMP mailbox driver implementing IPI communication with PMU. This would
allow U-Boot SPL to communicate with PMUFW to request privileged
operations.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
05f683a3e2 mailbox: allow subnode for mbox regs
The following patch allows the mailbox node in DT to host subnodes with
mailbox definitions. If the client phandle to the mailbox is not the
mailbox driver node, just checks parents as well.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
22673b4d53 mailbox: check ops prior calling
Check if request and free operations are present prior calling to the
functions.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Siva Durga Prasad Paladugu
fccfb71004 net: xilinx_axiemac: Fill the phy node pointer in phydev
This patch assings the phynode pointer to the phydev node as it is needed
later in the corresponding phy driver to read phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:53:13 +02:00
Ashok Reddy Soma
0384ac0583 gpio: zynq: fix issue in set gpio output direction
This patch fixes zynq_gpio_direction() to call driver specific
zynq_gpio_set_value function rather than top level gpio_set_value.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:53:04 +02:00
T Karthik Reddy
1a031d236a drivers: usb: dwc3: setup phy before dwc3 core soft reset
Phy setup should be done before dwc3 soft core reset as it is done
in linux & this fixes unreliable detection of usb cable on host side.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
c95b19acac mmc: zynq_sdhci: Remove check for DM_MMC config
The zynq_sdhci drivers depends on DM_MMC in Kconfig so no need to check for
DM_MMC in the driver so this patch removes it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
f41e588c03 net: phy: Add gmiitorgmii converter support
This patch adds support for gmiitorgmii converter.
This converter sits between the MAC and the external phy
MAC <==> GMII2RGMII <==> RGMII_PHY.
The ethernet driver probes this bridge and this bridge driver
probes real phy driver and invokes the real phy functionalities
as requested. This bridge just needs to be configured based on
real phy negotiated speed and duplex.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
be49508a0f net: phy: Define init routine and register generic phy driver
This patch define init routine for generic phy driver and registers it
using phy_register as this generic phy driver also needs to be relocated
incase of manual reloc.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Michal Simek
23decf013b fpga: zynqmp: Fix second local variable declaration
No reason to define new_buf again.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00