This patch removes check for Versal platform
in gem driver as it now supports clock setting
through clock framework.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds clock driver support for Versal platform. The clock driver
queries and performs clock operations using PLM firmware by communicating
with it using SMC calls.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new versal compatible string to GEM driver for Versal
platform.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add simple ZynqMP firmware drive to populate child nodes under
zynqmp_firmware DT node.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds PL bitstream load support for Versal platform. The PL
bitstream is loaded by making an SMC to ATF which in turn communicates
with platform firmware which configures and loads PL bitstream on to PL.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
At present these uclasses assumes that they are used with a device tree.
Update them to support of-platdata as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This function ise effectively replaced by ofnode_read_pci_addr() which
works with flat tree. Delete it to avoid code duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This parameter is needed by the PCI driver-mode interface but is always
NULL on x86. There are a number of calls to this function so it makes
sense to minimise the parameters.
Adjust the x86 function to omit the first parameter, and introduce stub
functions to handle the conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this hedaer is only available on x86. To allow sandbox to use
it for testing, move it to a common location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.
Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present PCI address transaction is not supported so drivers must
manually read the correct BAR after reading the device tree info. The
ns16550 has a suitable implementation, so move this code into the core
DM support.
Note that there is no live-tree equivalent at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the unclear comments in test.dts]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this fails silently which can be confusing since some devices
on the PCI bus may not work correctly. Show a message in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add a '\n' in the PCI autoconfig fail message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
If PCI auto-config runs out of memory, show a few more details to help
diagnose the problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change %x to %llx to avoid build warnings on some platforms]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present U-Boot runs autoconfig in SPL but this is best left to U-Boot
proper. For TPL and SPL we can normally used fixed BARs and save code size
and time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the debugging info a little to show the result of trying to bind
a PCI device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present PCI emulation devices are not probed before use, since they
used to be children of the device that used them, and children cannot be
probed before their parents.
Now that PCI emulation devices are attached to the root node, we can
simply probe them, and avoid using the internal function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Sandbox pci works using emulation drivers which are currently children of
the pci device:
pci-controller {
pci@1f,0 {
compatible = "pci-generic";
reg = <0xf800 0 0 0 0>;
emul@1f,0 {
compatible = "sandbox,swap-case";
};
};
};
In this case the emulation device is attached to pci device on address
f800 (device 1f, function 0) and provides the swap-case functionality.
However this is not ideal, since every device on a PCI bus has a child
device. This is only really the case for sandbox, but we want to avoid
special-case code for sandbox.
Worse, child devices cannot be probed before their parents. This forces
us to use 'find' rather than 'get' to obtain the emulator device. In fact
the emulator devices are never probed. There is code in
sandbox_pci_emul_post_probe() which tries to track when emulators are
active, but at present this does not work.
A better approach seems to be to add a separate node elsewhere in the
device tree, an 'emulation parent'. This could be given a bogus address
(such as -1) to hide the emulators away from the 'pci' command, but it
seems better to keep it at the root node to avoid such hacks.
Then we can use a phandle to point from the device to the correct
emulator, and only on sandbox. The code to find an emulator does not
interfere with normal pci operation.
Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator
given a bus, and finding a bus given an emulator. Update the existing
device trees and the code for finding an emulator.
This brings PCI emulators more into line with I2C.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 3 typos in the commit message;
encode bus number in the labels of swap_case_emul nodes;
mention commit 4345998ae9 in sandbox_pci_get_emul()]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This function is useful in PCI emulators. More it into the header file to
avoid duplicating it in other drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This method is not used anymore since the bus/device/function of PCI
devices can be obtained from their (parent's per-child) platform data.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some functions and a struct should be marked static since they are not
used outside this file. Update them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Rename this ID to SANDBOX_PCI_SWAP_CASE_EMUL_ID since it is more
descriptive and allows us to add new PCI emulators without any conflict or
confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present running sandbox with valgrind produces some warnings due to the
MMC emulator not filling in all the expected fields. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: use sizeof() instead of hardcoded 16]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present address translation does not work since there is no ranges
property in the spmi nodes. Add empty ranges properties and a little more
logging so that this shows the error:
/tmp/b/sandbox/u-boot -d /tmp/b/sandbox/arch/sandbox/dts/test.dtb \
-c "ut dm spmi_access_peripheral" -L7 -v
...
pm8916_gpio_probe() bad address: returning err=-22
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
We have a 'safe' version of this function but sometimes it is not needed.
Add a normal version too and update a few places that can use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function returns -ENODEV when there is no device. This is
inconsistent with other functions, such as uclass_find_next_device(),
which returns 0.
Update it and tidy up the incorrect '-1' values in the comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
At present this function is never called when of-platdata is enabled since
we never have a device tree. However, this function is responsible for
copying over the of-platdata, so we must call it. Otherwise the probe()
method would have to be used.
Correct this and fix the sandbox serial driver to not read from the device
tree and try to write to what is read-only platdata on some platforms.
Fixes: 396e343b3d (dm: core: Allow binding a device from a live tree)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Two functions in this file return early for no good reason. Adjust the
code to match the standard DM style of returning 0 at the end of the
function on success.
Oddly enough this save 12 bytes of code size on ARM.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The pr_debug() functions do not response to setting the log level and in
fact have their own separate log level. Use U-Boot logging instead.
Perhaps we should make these options redirect to log_debug(), etc.?
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Many support functions are common between FSP1 and FSP2. Add a new header
to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove forward declarations in fsp_support.h]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this driver is always included in SPL and TPL, if U-Boot proper
enables it. Update the Makefile to provide full control using the existing
Kconfig options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: make the Kconfig help text a little bit clearer]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this driver uses the wrong condition for including the code and
drivers in SPL/TPL. Update it so that the code is only included if
DM_SERIAL is enabled for SPL/TPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.
Add a Kconfig which defines which version is in use.
Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The commit
642b80d256 ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.
Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
This adds a function which can be used by e.g. EFI to retrieve
the namespace identifier and EUI64. For that it adds the EUI64
to its driver internal namespace structure and copies the EUI64
during namespace identification.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this code passes an fdt_addr_t pointer as a u64 pointer which
is not safe, since sizeof(fdt_addr_t) may be 4, e.g. with sandbox. Correct
this to avoid a stack corruption problem.
Fixes: e679d03b08 (core: ofnode: Add ofnode_get_addr_size_index)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This reads the low cell of the PCI address from the wrong cell. Fix it.
Also fix the function that this code came from.
Fixes: 9e51204527 (dm: core: Add operations on device tree references)
Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT)
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Currently we may end up with an LCD clock divider that differs from
the HDMI PHY clock divider if we can't exactly match the pixel clock.
Fix this by using DIV_ROUND_UP to calculate the divider. This works
since the PLL is chosen such that the resulting pixel clock is
never higher than the requested pixel clock.
Fixes: 1feed358ed ("sunxi: video: HDMI: Fix clock setup")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
AM335X based beaglebone black target gets reset by DM converted watchdog
if booted from emmc around 60sec. Fixed this by moving driver's private struct
variable initialization at different places in the driver to driver's probe.
Tested on Beaglebone Black.
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Fixes: 7659ea32 ("watchdog: omap_wdt: Convert watchdog driver to use DT and DM")
Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Few of the rk3288 boards like tinker, vyasa are using
TPL, SPL bootchain so the dram initialization must needed
during TPL stage. So add proper ifconstruct to satisfy
both TPL, SPL and SPL-only bootchain boards.
This eventually fixing TPL to SPL handoff, otherwise missing
dram initilaztion at TPL stage would leads to SPL hang.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.
Enable protection ops for SST26 flash series which were
previously enabled by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.
Add missing SST26* flash IC protection ops which were introduced
previously by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
spi_write_then_read, will manage to do the respective
spi_xfer based on the tx_buf, rx_buf so drop the
legacy spi_flash_read/write/cm code.
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Now, we have spi_write_then_read routine that would handle
spi_xfer handling based on the tx_buf and rx_buf parameters.
So, replace individual flash read/write/cmd transfer call
with spi_write_then_read.
Cc: Egnite GmbH <info@egnite.de>
Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
Cc: Ilko Iliev <iliev@ronetix.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Alison Wang <alison.wang@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add support for SPI synchronous write followed by read,
this is common interface call from spi-nor to spi drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
MXS_SPI driver now partially converted into driver-model,
so unmark the DEPRECATED option for the same.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
[jagan: update the commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
In case spi_get_bus_and_cs callback is used, spi bus is first probed
then slave devices are probed. To avoid a data abort in soft_spi probe
function, we need to check that (slave != NULL).
If slave is NULL, cs_flags and clk_flags will be initialized with
respectively GPIOD_ACTIVE_LOW and 0.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The prescaler value computation can yield wrong result if given 0x1f at
the beginning: the value is computed to be 0x20, but the maximum value
the register can hold 0x1f, so the actual stored value in this case is
0, which is obviously wrong.
Set the upper bound of the value to 0x1f with the min macro.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
In case dma_ring_reset_quirk is not set the k3_ringacc_ring_reset_dma will
just exit without ring reset. Fix it, by adding ring reset call in case
dma_ring_reset_quirk is not.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add eMMC hs200 mode for ls1028a, ls1012a, lx2160a.
This increases eMMC performance.
Tuning procedure is currently not supported.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
NXP fsl_esdhc controller supports two reference clocks:
platform clock and peripheral clock
Peripheral clock can provide higher clock frequency
which is required to be used for tuning of SD UHS mode
and eMMC HS200/HS400 modes.
Peripheral clock is enabled by default by defining config
option FSL_ESDHC_USE_PERIPHERAL_CLK if eMMC HS200/HS400 modes
are supported.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
commit 65c1f9820c8f79f "usb: Add nonblock argument to submit_int_msg"
breaks the musb_hcd driver.
Fixing it by adding the missing argument
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
An USB 1.1 keyboard connected to dwc2 through a high-speed hub does not
report status until it changes. With this patch you can enable keyboard
by pressing a key while USB devices are probed. Without a keypress no
state is reported and the probe times out. We don't want to wait for a
keypress or timeout while polling for keypresses so implement an int_msg
nonblock variant that exits early on error.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
This quirk is necessary for the Amlogic GXL SoCs otherwise the
Port 2 PHY doesn't get out of suspend and U-Boot resets the board after:
XHCI timeout on event type 33... cannot recover.
BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()!
BUG!
This quirk is also handled in the dwc3 core code, but until the
xhci-dwc3 driver uses the dwc3 core, the quirk must be handled here
to fix USB support on the Amlogic libretech-cc and libretech-ac board
when a device is only plugged in the OTG port.
Cc: Yuri Frolov <crashing.kernel@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Fixes: dc9cdf859e ("usb: dwc3: Add DWC3 controller driver support")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
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Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot
- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
The bcm2711 has two emmc controllers. The difference is the clocks
they use. Add support for the second emmc controller.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Function bcm_2835_wait_transfer_complete() is not waiting long enough.
The previous code was claiming to wait for ~1 seconds, but as it depends
on register reads it's time actually varies.
Some cards require wait times of up to ~56 ms to perform
the command 'saveenv' on an EXT4 partition.
Re-implement the loop exit condition to use get_timer() which allows
to specify the wait time in more reliable manner. Set the maximum wait
time to the originally intended 1 second.
Signed-off by: Raul Benet <raul.benet_at_kaptivo.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The sdhci capabilities registers can be incorrect. The
sdhci-caps-mask and sdhci-caps dt properties specify which bits of
the registers are incorrect and what their values should be. This
patch makes the sdhci driver use those properties to correct the caps.
Also use "dev_read_u64_default" instead of "dev_read_u32_array" for
caps mask.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds functions dev_read_u64_default & dev_read_u64
to read unsigned 64-bit values from devicetree.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The mmc_spi driver's priv is not available in its bind phase(). Use
platdata instead.
Fixes: 05e35d4297 ("mmc: mmc_spi: Re-write driver using DM framework")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
There are two cases not been considered:
- use uint for timeout, it will overflow when size bigger than 512KB for
it *8*1000 at the beginning, but we may use size up to 32MB; The
'timeout' will overflow if size bigger than 51.2MB after this fix, which
should be enough for U-Boot;
- The timeout is using clock speed for data rate, but the device may not
have such high speed, eg. clock is 52MHz while the device write speed may
be less than 10MB/s, and we may use up to 150MHz clock.
Fix them in this patch, the max timeout is about 6500 when size is 32MB
after fix.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
It's quite hard to figure out time units for various function that have
timeout parameters. This leads to possible errors when one forgets to
convert ms to us, for example. Let's rename those parameters
correspondingly to 'timeout_us' and 'timeout_ms' to prevent such issues
further.
While at it, add time units info as comments to struct mmc fields.
This commit doesn't change the behavior, only renames parameters names.
Buildman should report no changes at all.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
mmc_wait_dat0() expects timeout argument to be in usec units. But some
overlying functions operate on timeout in msec units. Convert timeout
from msec to usec when passing it to mmc_wait_dat0().
This fixes 'avb' commands on BeagleBoard X15, because next chain was
failing:
get_partition() -> mmc_switch_part() -> __mmc_switch() ->
mmc_wait_dat0()
when passing incorrect timeout from __mmc_switch() to mmc_wait_dat0().
Fixes: bb98b8c5c0 ("mmc: During a switch, poll on dat0 if available and check the final status")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Tested-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
When look through the code, I found this bare metal
drives is not used, so remove it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With commit c6d07bf440 ("net/macb: increase RX buffer size for GEM")
ethernet support does not work any more with d-cache enabled on the
AT91SAM. The reason is, that MACB_RX_BUFFER_SIZE was changed from 4096
to 128 but this change was not refected in the rx_buffer flush and
invalidate functions, as these also use this macro.
This patch now fixes this by calculating the rx buffer size correctly
again in those functions. With this change, ethernet works again
reliably on my AT91SAM board.
Signed-off-by: Stefan Roese <sr@denx.de>
Fixes: c6d07bf440 ("net/macb: increase RX buffer size for GEM")
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The same compatible = "altr,socfpga-stmmac" appears in both
drivers/net/designware.c and drivers/net/dwmac_socfgpa.c,
creating ambiguity in which driver will be bound.
For Intel/Altera SoC devices, dwmac_socfpga.c is the correct driver.
So drop the compatible string from designware.c.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This reverts commit 1b0c9914cc.
Commit 1b0c9914cc ("net: macb: Fixed reading MII_LPA register")
causes 100Mbps does not work any more with SiFive FU540 GEM on the
HiFive Unleashed board. Revert it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
It was missing in the original submission and not having it in place causes
issues with probing of PCI devices.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Align the board and driver prototype for board_interface_eth_init
to avoid execution issue (the interface_type parameter is defined
as int or phy_interface_t).
To have a generic weak function (it should be reused by other driver)
I change the prototype to use directly udevice.
This prototype is added in netdev.h to allow compilation check
and avoid warning when compiling with W=1 on file
board/st/stm32mp1/stm32mp1.c
warning: no previous prototype for 'board_interface_eth_init'\
[-Wmissing-prototypes]
int board_interface_eth_init(int interface_type, ....
^~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch solves many warnings when compiling with W=1:
warning: no previous prototype for '....' [-Wmissing-prototypes]
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Do not use random value from stack as return value of pfe_phy_write().
Indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
SANDBOX_PHY_REG_CNT is not an allowable index for the array
u16 reg[SANDBOX_PHY_REG_CNT].
Identified by cppcheck.
Fixes: b47edf8069 ("test: dm_mdio: add a 2nd register to the emulated PHY")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
mvpp2 already has support for setting MAC addresses but this
functionality was not exposed to the ethernet core. This commit exposes
this functionality so that MAC address assignments stored in U-Boot's
environment are correctly applied before Linux boots.
Signed-off-by: Matt Pelland <mpelland@starry.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a driver
must guarantee non-concurrent accesses to this MDIO interface. The
most logical way is to have a separate driver that handles this
single MDIO interface, used by all Ethernet ports.
*) The MDIO interface is the same between the existing mv643xx_eth
driver and the new mvneta/mvpp2 driver. Even though it is for now
only used by the mvneta/mvpp2 driver, it will in the future be
used by the mv643xx_eth driver as well.
This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
802.3 Clause 45.
This patch also adds device tree binding for marvell MDIO driver.
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Create drivers/net/fsl-mc/Kconfig and move fsl-mc specific configs
from arch/arm/cpu/armv8/fsl-layerscape/Kconfig to this new Kconfig
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This driver is used for MDIO muxes driven over I2C. This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
