Commit graph

340 commits

Author SHA1 Message Date
Masahiro Yamada
535aad29f2 MAINTAINERS: comment out blank M: field
Since commit ddaf5c8f30
(patman: RunPipe() should not pipe stdout/stderr unless asked),
Patman spits lots of "Invalid MAINTAINERS address: '-'"
error messages for patches with global changes.
It takes too long for Patman to process them.

Anyway, "M:    -" does not carry any important information.
Rather, it is just like a place holder in case of assigning
a new board maintainer.  Let's comment out.

This commit can be reproduced by the following command:

find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/'

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-24 18:30:28 -04:00
Masahiro Yamada
e5a504eb3d MAINTAINERS: comment out invalid maintainers
The "S:    Orphan" in MAINTAINERS means that the maintainer in the
"M:" field is unreachable (i.e. the email address is not working).
(Refer to the definition of "Orphan" adopted in U-Boot
in the log of commit 31f1b654b2,
"boards.cfg: move boards with invalid emails to Orphan")

For patch files adding global changes, scripts/get_maintainer.pl
adds bunch of such invalid email addresses, which results in
tons of annoying bounce emails.

This commit can be reproduced by the following command:

find . -name MAINTAINERS | xargs sed -i -e '
/^M:[[:blank:]]/ {
      N
      /S:[[:blank:]]Orphan/s/^/#/
}
'

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-09-24 18:30:28 -04:00
Albert ARIBAUD
2a8c9c86b9 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-09-21 16:56:44 +02:00
Murali Karicheri
6c343825dd ARM: keystone: ddr3: workaround for ddr3a/3b memory issue
This patch implements a workaround to fix DDR3 memory issue.
The code for workaround detects PGSR0 errors and then preps for
and executes a software-controlled hard reset.In board_early_init,
where logic has been added to identify whether or not the previous
reset was a PORz. PLL initialization is skipped in the case of a
software-controlled hard reset.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Keegan Garcia <kgarcia@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-09-17 21:06:56 -04:00
Masahiro Yamada
461be2f96e kconfig: remove redundant "string" type in arch and board Kconfigs
Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME}
are specified in arch/Kconfig.

We can delete the ones in arch and board Kconfig files.

This commit can be easily reproduced by the following command:

find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e '
/config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ {
    N
    s/\n[[:space:]]*string//
}
'

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-13 16:43:55 -04:00
Masahiro Yamada
48ee8d3bb0 arm: am335x: add Kconfig range attribute to prevent invalid CONS_INDEX
The help message in board/ti/am335x/Kconfig says AM335x has
6 UARTs, so the valid number for CONFIG_CONS_INDEX is from 1 to 6.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
2014-09-04 13:06:00 -04:00
Masahiro Yamada
c338f09e96 keystone: kconfig: move board select menu and common settings
Becuase the board select menu in arch/arm/Kconfig is too big,
move the Keystone board select menu to keystone/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="keystone").

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Tom Rini <trini@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
2014-08-30 21:21:59 -04:00
Masahiro Yamada
6c5431ac81 omap5: kconfig: move board select menu and common settings
Becuase the board select menu in arch/arm/Kconfig is too big,
move the OMAP5 board select menu to omap5/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="omap5").

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Tom Rini <trini@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
2014-08-30 21:21:59 -04:00
Masahiro Yamada
d08215a5f1 omap4: kconfig: move board select menu and common settings
Becuase the board select menu in arch/arm/Kconfig is too big,
move the OMAP4 board select menu to omap4/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="omap4").

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Tom Rini <trini@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
2014-08-30 21:21:59 -04:00
Masahiro Yamada
3cfbcb58d3 omap3: kconfig: move board select menu and common settings
Becuase the board select menu in arch/arm/Kconfig is too big,
move the OMAP3 board select menu to omap3/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="omap3

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-08-30 21:21:59 -04:00
Tom Rini
6defdc0b55 Merge branch 'master' of git://git.denx.de/u-boot-ti 2014-08-29 13:47:42 -04:00
Lokesh Vutla
7b92252370 ARM: DRA: Enable VTT regulator
DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination
and this is controlled by gpio7_11. Configuring gpio7_11.
The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards,
and left unused on previous boards, so it is safe enough to enable gpio
on all DRA7 boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-08-25 10:48:13 -04:00
Tom Rini
1286b7f6ca am335x_evm: Convert CONFIG_CONS_INDEX into a menu choice
- Drop CONFIG_SERIAL[1-6] and use CONFIG_CONS_INDEX tests instead
- Add choice and help text to board/ti/am335x/Kconfig
- Correct comment about IDK in board/ti/am335x/mux.c
- Remove am335x_evm_uart* defconfig files as they're just variations
  on a config option now.

Signed-off-by: Tom Rini <trini@ti.com>
2014-08-25 10:48:13 -04:00
Vitaly Andrianov
61f66fd5a8 keystone2: use EFUSE_BOOTROM information to configure PLLs
This patch reads EFUSE_BOOTROM register to see the maximum supported
clock for CORE and TETRIS PLLs and configure them accordingly.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-08-25 10:48:12 -04:00
pekon gupta
9352697aa0 board/ti/dra7xx: add support for parallel NOR
This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM.
The Flash device is connected to GPMC controller on chip-select[0] and accessed
as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and
is CFI compatible.

As multiple devices are share GPMC pins on this board, so following board
settings are required to detect NOR device:
     SW5.1 (NAND_BOOTn) = OFF (logic-1)
     SW5.2 (NOR_BOOTn)  = ON  (logic-0) /* Active-low */
     SW5.3 (eMMC_BOOTn) = OFF (logic-1)
     SW5.4 (QSPI_BOOTn) = OFF (logic-1)

And also set appropriate SYSBOOT configurations:
     SW3.1 (SYSBOOT[ 8])= ON  (logic-1) /* selects SYS_CLK1 speed */
     SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
     SW3.3 (SYSBOOT[10])= ON  (logic-1) /* wait-pin monitoring = enabled */
     SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */
     SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */
     SW3.6 (SYSBOOT[13])= ON  (logic-1) /* device bus-width: 1(x16) */
     SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
     SW3.8 (SYSBOOT[15])= ON  (logic-1) /* reserved */

Also, following changes are required to enable NOR Flash support in
dra7xx_evm board profile:
2014-08-25 10:48:12 -04:00
pekon gupta
54a97d2849 board/ti/dra7xx: add support for parallel NAND
This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC
chip-select[0] on DRA7xx EVM.
As GPMC pins are shared by multiple devices, so in addition to this patch
following board settings are required for NAND device detection [1]:

  SW5.9 (GPMC_WPN)   = OFF (logic-1)
  SW5.1 (NAND_BOOTn) = ON  (logic-0) /* Active-low */
  SW5.2 (NOR_BOOTn)  = OFF (logic-1)
  SW5.3 (eMMC_BOOTn) = OFF (logic-1)
  SW5.4 (QSPI_BOOTn) = OFF (logic-1)

And also set appropriate SYSBOOT configurations
  SW2.1 (SYSBOOT[0]) = ON  (logic-1) /* selects NAND Boot */
  SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */
  SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */
  SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */
  SW2.5 (SYSBOOT[4]) = ON  (logic-1) /* selects NAND Boot */
  SW2.6 (SYSBOOT[5]) = ON  (logic-1) /* selects NAND Boot */
  SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */
  SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */

  SW3.1 (SYSBOOT[ 8])= ON  (logic-1) /* selects SYS_CLK1 speed */
  SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
  SW3.3 (SYSBOOT[10])= ON  (logic-1) /* wait-pin monitoring = enabled */
  SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */
  SW3.5 (SYSBOOT[12])= ON  (logic-1) /* device type: Addr/Data Muxed */
  SW3.6 (SYSBOOT[13])= ON  (logic-1) /* device bus-width: 1(x16) */
  SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
  SW3.8 (SYSBOOT[15])= ON  (logic-1) /* reserved */

Following changes are required in board.cfg to enable NAND on J6-EVM:
2014-08-25 10:48:12 -04:00
pekon gupta
e53ad4b445 board/ti/am43xx: add support for parallel NAND
This patch adds support for NAND device connected to GPMC chip-select on
following AM43xx EVM boards.

am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a
  time either eMMC or NAND can be enabled. Selection between eMMC and NAND is
  controlled by:
  (a) Statically using Jumper on connecter (J89) present on board.
  (a) If Jumper on J89 is NOT used, then selection can be dynamically controlled
      by driving SPI2_CS0[MUX_MODE=GPIO] pin via software:
      SPI2_CS0 == 0: NAND (default)
      SPI2_CS0 == 1: eMMC

am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI,
  Thus only one of the two can be used at a time. Selection is controlled by:
  (a) Dynamically driving following GPIO pin from software
      GPMC_A0(GPIO) == 0 NAND is selected (default)

NAND device (MT29F4G08AB) on these boards has:
 - data-width=8bits
 - blocksize=256KB
 - pagesize=4KB
 - oobsize=224 bytes
For above NAND device, ROM code expects the boot-loader to be flashed in BCH16
ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs.

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-08-25 10:48:12 -04:00
pekon gupta
3df3bc1e1d board/ti/am335x: add support for beaglebone NOR Cape
This patch adds support of NOR cape[1] for both Beaglebone (white) and
Beaglebone(Black) boards. NOR Flash on this cape is connected to GPMC
chip-select[0] and accesses as external memory-mapped device.
This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device.

As GPMC chip-select[0] can be shared by multiple capes so NOR profile is
not enabled by default in boards.cfg. Following changes are required to
enable NOR cape detection when building am335x_boneblack board profile.

Signed-off-by: Tom Rini <trini@ti.com>
2014-08-25 10:47:56 -04:00
pekon gupta
85eb0de214 board/ti/am335x: add support for beaglebone NAND cape
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64
(b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224
Further information and datasheets can be found at [1] and [2]

* How to boot from NAND using Memory Expander + NAND Cape ? *
 - Important: As BOOTSEL values are sampled only at POR, so after changing any
   setting on SW2 (DIP switch), disconnect and reconnect all board power supply
   (including mini-USB console port) to POR the beaglebone.

 - Selection of ECC scheme
  for NAND cape(a), ROM code expects BCH8_HW ecc-scheme
  for NAND cape(b), ROM code expects BCH16_HW ecc-scheme

 - Selction of boot modes can be controlled via  DIP switch(SW2) present on
   Memory Expander cape.
   SW2[SWITCH_BOOT] == OFF  follow default boot order  MMC-> SPI -> UART -> USB
   SW2[SWITCH_BOOT] == ON   boot mode selected via DIP switch(SW2)
   So to flash NAND, first boot via MMC or other sources and then switch to
   SW2[SWITCH_BOOT]=ON to boot from NAND Cape.

 - For NAND boot following switch settings need to be followed
   SW2[ 1] = OFF  (SYSBOOT[ 0]==1: NAND boot mode selected )
   SW2[ 2] = OFF  (SYSBOOT[ 1]==1:       -- do --          )
   SW2[ 3] = ON   (SYSBOOT[ 2]==0:       -- do --          )
   SW2[ 4] = ON   (SYSBOOT[ 3]==0:       -- do --          )
   SW2[ 5] = OFF  (SYSBOOT[ 4]==1:       -- do --          )
   SW2[ 6] = OFF  (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device )
   SW2[ 7] = ON   (SYSBOOT[ 9]==0: ECC done by ROM  )
   SW2[ 8] = ON   (SYSBOOT[10]==0: Non Muxed device )
   SW2[ 9] = ON   (SYSBOOT[11]==0:    -- do --      )

[1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion
[2] http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module

*IMPORTANT NOTE*
As Beaglebone board shares the same config as AM335x EVM, so following
changes are required in addition to this patch for Beaglebone NAND cape.
(1) Enable NAND in am335x_beaglebone board profile
(2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because:
 -  AM335x EVM has NAND device with datawidth=8, whereas
 -  Beaglebone NAND cape has NAND device with data-width=16
2014-08-25 08:52:34 -04:00
Masahiro Yamada
62d636aa2a omap: remove omap5912osk board support
Emails to the board maintainer
"Rishi Bhattacharya <rishi@ti.com>"
have been bouncing.

Tom suggested to remove this board.

Remove also omap1510_udc.c because this is the last board
to enable it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
2014-08-21 12:01:12 -04:00
Masahiro Yamada
93d4334f7f Add board MAINTAINERS files
We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.

The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.

After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.

TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 08:48:06 -04:00
Masahiro Yamada
dd84058d24 kconfig: add board Kconfig and defconfig files
This commit adds:
 - arch/${ARCH}/Kconfig
    provide a menu to select target boards
 - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
    set CONFIG macros to the appropriate values for each board
 - configs/${TARGET_BOARD}_defconfig
    default setting of each board

(This commit was automatically generated by a conversion script
based on boards.cfg)

In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.

But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 08:48:01 -04:00
Albert ARIBAUD
b1cdd8baa1 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-07-28 12:26:21 +02:00
Hao Zhang
a906847966 board: k2e-evm: add board support
This patch adds Keystone2 k2e_evm evaluation board support.

Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:11 -04:00
Hao Zhang
b1babef856 keystone: ddr3: move K2HK DDR3 configuration to a common file
It's convenient to hold configurations for DDR3 PHY and EMIF in
separate common place. This patch moves K2HK DDR3 PHY and EMIF
configuration data with different rates and memory size to a common
ddr3_cfg.c file.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:11 -04:00
Hao Zhang
e595107ebb ARM: keystone2: move K2HK board files to common KS2 board directory
This patch moves K2HK board directory to a common Keystone II board
directory. The Board related common functions are moved to a common
keystone board file.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:10 -04:00
Murali Karicheri
0bedbb8135 keystone2: add env option to do unitrd dt fixup
With latest v3.13 kernel, unitrd dt fixup is not needed. However for
older kernel versions such as v3.8/v3.10, it is needed. So to work
with both, add a u-boot env variable that can be set to do dt fixup
for older kernels.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:10 -04:00
Khoronzhuk, Ivan
3d31538625 k2hk: use common KS2_ prefix for all hardware definitions
Use KS2_ prefix in all definitions, for that replace K2HK_ prefix and
add KS2_ prefix where it's needed. It requires to change names also
in places where they're used. Align lines and remove redundant
definitions in kardware-k2hk.h at the same time.

Using common KS2_ prefix helps resolve redundant redefinitions and
adds opportunity to use KS2_ definition across a project not thinking about
what SoC should be used. It's more convenient and we don't need to worry
about the SoC type in common files, hardware.h will think about that.
The hardware.h decides definitions of what SoC to use.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:10 -04:00
Hao Zhang
4984bce41f keystone2: move cpu_to_bus() to keystone.c
The SoC related common functions in board.c should be placed to
a common keystone.c arch file.

Acked-by: Murali Karicheri <m-maricheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:10 -04:00
Hao Zhang
101eec50f0 keystone2: ddr: add DDR3 PHY configs updated for PG 2.0
Add DDR3 PHY configs updated for PG 2.0
Also add DDR3A PHY reset before init for PG2.0 SoCs.

Acked-by: Murali Karicheri <m-maricheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:09 -04:00
Khoronzhuk, Ivan
0b86858956 keystone: ddr3: add ddr3.h to hold ddr3 API
It's convinient to hold ddr3 function definitions in separate file
such as ddr3.h. So move this from hardware.h to ddr3.h.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-07-25 16:26:09 -04:00
Tom Rini
c4f80f5003 am335x_evm / gumstix pepper: Correct DDR settings
As noted by clang, we have been shifting certain values out of 32bit
range when setting some DDR registers.  Upon further inspection these
had been touching reserved fields (and having no impact).  These came in
from historical bring-up code and can be discarded.  Similarly, we had
been declaring some fields as 0 when they will be initialized that way.
Tested on Beaglebone White.

Reported-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-By: Ash Charles <ashcharles@gmail.com>
2014-07-25 16:26:08 -04:00
Khoronzhuk, Ivan
c6ac7e3bdc k2hk_evm: add script to automate NAND flash process
Add script to automate NAND flash process. As for now the board has
two burn scripts - burn to boot from SPI NOR flash and burn to boot
from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi.
Also update README to contain NAND burn U-boot process description.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
2014-07-25 15:21:06 -04:00
Tom Rini
7aa5598aac tps65218/am43xx_evm: Add power framework support to TPS65218
Add in an init function for the drivers/power framework so we can dump
and read the registers via i2c.

Cc: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-07-25 15:21:06 -04:00
Mugunthan V N
4c8014b942 ARM: dra7_evm: Add Ethernet support for dra72x platform
Set the active_slave to 1 as slave 1 is pinned out in dra72x base board

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-07-25 15:21:05 -04:00
Mugunthan V N
e5ff845bff ARM: DRA7xx: Add cpsw second port pinmux
Add cpsw second slave port pinmux to use it as primary ethernet port

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-07-25 15:21:05 -04:00
Lokesh Vutla
4ec3f6e510 ARM: DRA7xx: Update the board_name env variable
Update the board_name env variable and accordingly
populate the dtb file.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-07-14 11:16:38 -04:00
Cooper Jr., Franklin
8038b497e7 am43xx: Tune the system to avoid DSS underflows
* This is done by limiting the ARM's bandwidth and setting DSS priority in
  the EMIF controller to ensure underflows do not occur.
2014-07-07 19:42:34 -04:00
Franklin S. Cooper Jr
2c95211167 am43xx: Update EMIF DDR3 Configuration for AM43x GP
* Boot failures have been discovered due to a combination of routing issues and
  non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
  different timings are required for alpha, beta and production boards.

Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
2014-07-07 19:42:34 -04:00
Felipe Balbi
49b633b3d3 board: ti: dra7xx: add mux data for UART3
J6 EVM can be built with UART3 as console, but currently
there's nothing muxing UART3 correctly. Likely this only
works because, based on commit log, author was only testing
with UART3 boot and - I assume - ROM code leave UART3 correctly
muxed in that case.

If we want to boot from MMC and still use UART3 as console,
then we need to mux those signals correctly.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-07-07 19:42:34 -04:00
Albert ARIBAUD
e99f30e105 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-07-01 15:11:18 +02:00
Felipe Balbi
403edbb94f board: ti: am43xx: enable QSPI and Gbit Ethernet on AM437x SK
AM437x Starter Kit has a qspi flash and gbit ethernet
support. By muxing those signals, we can use those
interfaces from u-boot.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19 17:53:58 -04:00
Felipe Balbi
619ce62d2d board: ti: am43xx: add AM437x SK PHY Address
pass correct PHY Address when running on SK
so that we have working ethernet with this board
too.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19 17:53:58 -04:00
Felipe Balbi
9cb9f3331b board: ti: am43xx: add support for AM43xx Starter Kit
AM43xx Starter Kit is a new board based on
AM437x line of SoCs. Being a low-cost EVM and
small size EVM are intended to provide an entry
level development platform on a full fledged
Hardware System.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19 17:53:58 -04:00
Felipe Balbi
d51e5aeff6 board: ti: am43xx: print unsupported board name
when porting u-boot to a new am43xx board, it
helps to know the name of the current unsupported
board so we don't have to hunt for design documents
to figure out what's written in the EEPROM.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19 17:53:58 -04:00
Khoronzhuk, Ivan
909ea9aa26 ARM: keystone: aemif: move aemif driver to drivers/memory/ti-aemif.c
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-06-19 17:53:58 -04:00
Khoronzhuk, Ivan
3e01ed00da mtd: nand: davinci: add header file for driver definitions
The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h and nand_defs.h to it.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
[trini: Fixup more davinci breakage]
Signed-off-by: Tom Rini <trini@ti.com>
2014-06-19 17:53:58 -04:00
Simon Glass
ad3cd07f04 ti: am335x: Fix the U-Boot binary output
This should include the hash so that image_binary_size is really at the
end of the image, and not some 300 bytes earlier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:39 -04:00
Tom Rini
83bad1026b arm:am43xx: Add TPS65218 support to scale voltages up
This family is supported by the TPS65218 PMIC.  Implement a scale_vcores
to set the MPU and CORE voltage correctly to the max frequency that is
supported (and what we will be scaling them to in setup_dplls()).

Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00
Tom Rini
feca6e676e am43xx: Only read the MPU frequency bits of CTRL_DEV_ATTR
Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00