This patch improves cpu hotplug, previous cpu_off
implementation is NOT safe, a CPU can NOT power down
itself in runtime, it will cause system bus hang due
to pending transaction. So need to use other online
CPU to kill it when it is ready for killed.
Here use SRC parameter register and a magic number
of ~0 as handshake for killing a offline CPU,
when the online CPU checks the psci_affinity_info,
it will help kill the offline CPU according to
the magic number stored in SRC parameter register.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
CONFIG_BOOTDELAY has been migrated to Kconfig, but cl-som-imx7 was
missed. We can just delete the assignments as the config already has
the correct value.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
The existing imx_watchdog driver is compatible with mx25 chipsets.
Add a WDOG1_BASE_ADDR define for the base address and enable the driver
in watchdog's Makefile.
To use the driver, a board must define CONFIG_IMX_WATCHDOG and
CONFIG_HW_WATCHDOG.
This fixes an issue when booting an mx25 chip via usb/serial. In this
case, the boot rom will always enable the watchdog. If u-boot is running
in interactive mode and the watchdog is not serviced, the system is
rebooted when the watchdog expires.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Convert the codes and configurations to enable DM drivers in u-boot for
modules: i2c, PMIC, regulator, USB, Ethernet, SD/MMC, GPIO and QSPI
This patch does not change SPL, so it still uses non-DM driver for
UART, GPIO and SD/MMC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add the board DTS files for 14x14 EVK and 9x9 EVK. They are necessary
for converting to use u-boot DM driver.
Two -u-boot.dtsi are added to modify compatible string of SPI flash
device to "spi-flash".
Signed-off-by: Ye Li <ye.li@nxp.com>
On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default).
To use QSPI, users have to rework the board (de-populate R388-R391, R396-R399
populate R392-R395, R299, R300). So we add new DTS file and new defconfig
dedicated for QSPI.
Other changes to support the DM QSPI:
- Add QSPI node and alias spi0.
- Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req
conflict
- Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts to
align with kernel and also present the conflict.
- Add -u-boot.dtsi to modify compatible string of mx25l51245g@0 to
"spi-flash"
- Remove iomux settings of qspi in board codes which is not needed
for DM driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
To support DM QSPI driver:
- Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
to "spi-flash" and add "num-cs" property.
- Enable DM SPI and DM SPI FLASH configurations
- Remove iomux settings of qspi1 in board codes which is not needed
for DM driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
To support DM QSPI driver
- Add spi0 and spi1 alias for qspi1 and qspi2.
- Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
to "spi-flash" and add "num-cs" property.
- Enable DM SPI/QSPI relavent configurations
- Remove iomux settings of qspi2 in board codes which is not needed
for DM driver.
- Add sf default settings. So running "sf probe" can detect the flash
Signed-off-by: Ye Li <ye.li@nxp.com>
beagleboard x15 is the first supported platform variant of am57xx
in AOSP (android open source project) now.
changing board name to stay in consistent with aosp target name.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
It is not preferred to put SUNXI-specific code in the common place.
Change it to 'imply' property of ARCH_SUNXI.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Copy missing Kernel patch to make SLEWCTRL_SLOW available in device tree
and to correct the value of SLEWCTRL_FAST.
After this patch, the Kernel and U-boot device tree settings for
SLEWCTRL have the same effect.
Original Kernel patch message:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=424e0f039bfa8a51fb5c5178b6ece8baa4996469
"
According to AM335x TRM, Document spruh73l, Revised February 2015,
Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control
registers actually sets the SLEWCTRL value to slow rather than fast as
the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that
sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for
completeness. Current users of the macro (i2c and mdio) are left
unmodified as SLEWCTRL_FAST was the macro used and actual desired state.
Tested on am335x-gp-evm with no difference in software performance seen.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
"
Signed-off-by: Christian Amann <Christian.Amann@de.bosch.com>
Add missing environment name for UBI, to prevent this NULL in output:
Loading Environment from <NULL>...
and rather have a valid UBI there:
Loading Environment from UBI...
Signed-off-by: Marek Vasut <marex@denx.de>
Prevent cache warning messages when using the 'bootelf' command on an
Arm target. Round down each section start address and round up the
respective section end to the nearest cache line.
Currently when using bootelf to load an image on Arm, several warnings
such as the following appear in the console:
CACHE: Misaligned operation at range [87800000, 8783c5e0]
CACHE: Misaligned operation at range [8783c5e0, 8784b3e0]
Signed-off-by: Neil Stainton <nstainton@asl-control.co.uk>
[trini: Reword commit message to include the info after the --- which
included the Signed-off-by line, and change ' at ' to '@']
Signed-off-by: Tom Rini <trini@konsulko.com>
malloc_simple() can return 0 if out of memory. Don't call memset
from calloc() in this case but rely on the caller checking
the return value.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
In an earlier proposed patch, bcmstb.c implemented timer_read_counter,
but it was updated to implement get_ticks instead. This patch updates
the declaration in timer.h accordingly.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
The reset is already handled by the designware driver using
information from device tree.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Compiling U-Boot with ubsan/asan libraries and running it in sandbox
may lead to below backtrace:
=> avb init 0
=> avb verify
## Android Verified Boot 2.0 version 1.1.0
read_is_device_unlocked not supported yet
common/avb_verify.c:407:31: runtime error: division by zero
AddressSanitizer:DEADLYSIGNAL
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
=================================================================
==9388==ERROR: AddressSanitizer: FPE on unknown address 0x0000004b467f \
(pc 0x0000004b467f bp 0x000000000000 sp 0x7ffd899fe150 T0)
#0 0x4b467e in mmc_byte_io common/avb_verify.c:407
#1 0x4b4c47 in mmc_byte_io common/avb_verify.c:532
#2 0x4b4c47 in read_from_partition common/avb_verify.c:533
#3 0x69dc0d in load_and_verify_vbmeta lib/libavb/avb_slot_verify.c:560
#4 0x6a1ee6 in avb_slot_verify lib/libavb/avb_slot_verify.c:1139
#5 0x45dabd in do_avb_verify_part cmd/avb.c:245
#6 0x4af77c in cmd_call common/command.c:499
#7 0x4af77c in cmd_process common/command.c:538
#8 0x46bafc in run_pipe_real common/cli_hush.c:1677
#9 0x46bafc in run_list_real common/cli_hush.c:1875
#10 0x46c780 in run_list common/cli_hush.c:2024
#11 0x46c780 in parse_stream_outer common/cli_hush.c:3216
#12 0x46d34b in parse_file_outer common/cli_hush.c:3299
#13 0x4ad609 in cli_loop common/cli.c:217
#14 0x4625ae in main_loop common/main.c:65
#15 0x46f2d1 in run_main_loop common/board_r.c:648
#16 0x640253 in initcall_run_list lib/initcall.c:30
#17 0x46f9d0 in board_init_r common/board_r.c:879
#18 0x40539b in main arch/sandbox/cpu/start.c:321
#19 0x7fa94925f82f in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x2082f)
#20 0x408908 in _start (/srv/R/u-boot-master/u-boot+0x408908)
AddressSanitizer can not provide additional info.
SUMMARY: AddressSanitizer: FPE common/avb_verify.c:407 in mmc_byte_io
==9388==ABORTING
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Cppcheck (v1.85) reports w/o this patch:
[common/avb_verify.c:738] -> [common/avb_verify.c:741]: (warning) \
Either the condition 'ops' is redundant or there is possible null \
pointer dereference: ops.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Fix sparse complaint:
common/avb_verify.c:14:21: warning: \
symbol 'avb_root_pub' was not declared. Should it be static?
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Fix below compiler [1] warning:
common/avb_verify.c: In function ‘avb_find_dm_args’:
common/avb_verify.c:179:30: warning: left-hand operand of comma expression has no effect [-Wunused-value]
for (i = 0; i < AVB_MAX_ARGS, args[i]; ++i) {
[1] aarch64-linux-gnu-gcc (Linaro GCC 7.2-2017.11)
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Exit with AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
when hashtree_error_mode value passed to avb_append_options()
is unknown (not from AvbHashtreeErrorMode enum).
Otherwise, default value is not handled in the
switch(hashtree_error_mode), which causes below compile warning:
lib/libavb/avb_cmdline.c: In function ‘avb_append_options’:
lib/libavb/avb_cmdline.c:354:13: warning: ‘dm_verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
new_ret = avb_replace(
~~~~~~~~^~~~~~~~~~~~~~
slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
lib/libavb/avb_cmdline.c:363:8: warning: ‘verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
if (!cmdline_append_option(
^~~~~~~~~~~~~~~~~~~~~~
slot_data, "androidboot.veritymode", verity_mode)) {
Signed-off-by: Ievgen Maliarenko <ievgen.maliarenko@globallogic.com>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
The NAND reset is missing from DT, so the reset manager cannot unreset the NAND.
Add the missing DT reset entry.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
The UART clock frequency can be obtained from the clock framework by the
ns16550 driver, so drop this redundant DT node.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Switch the Arria10 from ad-hoc hardcoded timer to timer framework
and the DW APB timer driver. This allows the A10 to extract timer
information, like timer rate, from clock framework and thus DT
instead of having it hardcoded in U-Boot configuration files.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Flag timer clock as DM pre-reloc, so that a timer driver can be used and
it can extract information about it's clock rate using the clock framework.
This patch also moves some of the pre-reloc flags into the core dtsi file,
this is because the timer is not board specific, but rather is used on all
boards.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Add timer driver for the Designware APB Timer IP. This is present
for example on the Altera SoCFPGA chips.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
The Arria10 SPL is a complete mess of calls to functions which are
called in the wrong context and it is surprise it works at all. This
patch tries to clean that mess up by shuffling the function calls
around and moving the calls into the correct context. Due to the
delicate nature of the reordering, this is done in one huge patch.
The following changes happen in this patch:
- Security policy init and NIC301 happens first in board_init_f()
- The clock init happens very early in board_init_f() in SPL only
- arch_early_init_r() only registers the FPGA, just like on Gen5
- arch_early_init_r() is never called from any _f() function
- Dedicated FPGA pins are inited in board_init_f() as on Gen5
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
According to mailbox spec, software should send urgent command with
urgent register instead of COUT location. This patch write urgent
command index to urgent register.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Code checking and setting EMAC use fpga is in
populate_sysmgr_fpgaintf_module(). So, call to sysmgr_pinmux_init()
instead of populate_sysmgr_pinmux().
In sysmgr_pinmux_init(), it will call to both populate_sysmgr_pinmux()
and populate_sysmgr_fpgaintf_module().
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
This partially reverts commit 7e21fbca26.
That change broke sandbox EFI support for unknown reasons. It also changes
sandbox to use--gc-sections which we don't want.
For now I am just reverting the sandbox portion as presumably this change
is safe on other architectures.
Fixes: 7e21fbca26 (efi_loader: Rename sections to allow for implicit data)
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch reverts the changes made for ls1088a and ls2080a
based boards in commit 18b6dd6cb0 ("armv8: layerscape: Drop
u-boot-with-spl.bin for selected boards").
u-boot-with-spl.bin is required for Gen3 based SoC where internal
ROM copy data in the internal memory
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
CC: Pramod Kumar <pramod.kumar_1@nxp.com>
CC: Ashish Kumar <ashish.kumar@nxp.com>
CC: York Sun <york.sun@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Update README.falcon to use "none" for compression property for
ramdisk image to avoid being uncompressed upon loading.
Signed-off-by: York Sun <york.sun@nxp.com>
musb stop is musb core call during unregister or shutting down
gadget or host musb. For graceful exit add musb_platform_exit
on musb_stop so-that it can exit the musb platform driver as well.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
musb have platform ops to do proper graceful exit,
so add the exit call and move musb platform exit code
instead of keeping it in driver remove.
This make proper shutdown of musb where .remove will
call disable, exit serially via musb_stop.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
reset0 is not available for sun4i, 5i and 7i so access
the reset0 offset from ccm via driver data for relevant
Allwinner SoC. this will eventually drop the existing
ifdef for SUN6I.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Allocate struct phy in private structure instead of allocating
locally and assign it to a pointer. This eventually fix miss
alignment phy which is used in another functions.
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
When MUSB is operating in peripheral mode, probe registering
musb core using musb_register which intern return int value
for validation. so there is no scope to preserve struct musb
pointer but the same can be used in .remove musb_stop.
So fix this by return musb_register with struct musb pointer.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
Tested-by: Chen-Yu Tsai <wens@csie.org> # A33-OlinuXino
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
A few fixes for 2018.09. Most noticable are:
- unbreak x86 target (-fdata-section fallout)
- fix undefined behavior in a few corner cases
- make Jetson TX1 boot again
- RTS fixes
- implement reset for simple output
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJbfDTFAAoJECszeR4D/txgAj8P/3dRDvtLj3ZGJZdMItVfDfBq
+tEO7qc6OI+7BVFgCKcXTwLVX0u9rgH/DlhQ49G/ykA2bVsJLl9MrJ/uVsrjl+ux
s8cPufBEzz0jdZkOBxMPn5L17OqBQNxdMzyNi4mZlKTTS4+pGrZunLjtEv7EZRGo
xmD2R8Fkvt8KbtuLRODqA72hNVwY3KOjWZl7h/oHrvm/jZgde+z1EwyIHVPU3Tw5
d8/VkcdSUjYQFxxq7Ha9UAtpBfNqfqBLxVMy3fFsP/D2ZplxHzF0u4oTswcamHRt
rdSyIz1qoqBz3yzS5ZmqjIIn1GZKsJjML6JxzFEB3GfYwfe0aiVv0az2fUBer13b
rTofDn8xqozvQrbraVtZNm/s5G0jZZiJL2+Z0PEkybV6OEPCGYC38vE1YTeOMvD7
XgiHKHx4RyT+A+Zju/9Cff8rKfAN1O90F5kOk7BhpX9B3Fy0+/bY2Ev82SPu1Zlw
TB0eKmZ0d7lKVvdjP37RPGj28kWBwjlqe2QiQz11vtHG6QrCTi5hi6Rwt5jnhTi5
BqHaf1KcoRY3Ca/YJJh57tuIic1Xhrn1oTTwJY5E7BxM2dgFjWFLg1N6IqA8S7HH
vGQe0quGlZO47srg9p1w3FMgIljXP0yN5UTEg9Bu/IEk0SORosmcimZKwmOoVcwk
3XmSu293IswPGH9X1cyV
=Zi4z
-----END PGP SIGNATURE-----
Merge tag 'signed-efi-2018.09' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-08-21
A few fixes for 2018.09. Most noticable are:
- unbreak x86 target (-fdata-section fallout)
- fix undefined behavior in a few corner cases
- make Jetson TX1 boot again
- RTS fixes
- implement reset for simple output
A secure monitor that runs before U-Boot, and hence causes U-Boot to run
in non-secure world, must implement a few operations that U-Boot
otherwise implements when running in secure world. Fix U-Boot to skip
these operations when running in non-secure world. In particular:
- The secure monitor must provide the LP0 resume code and own LP0
configuration in order to maintain security, so must initialize all
the PMC scratch registers used by the boot ROM during LP0 resume.
Consequently, U-Boot should not attempt to clear those registers,
since the register accesses will fail or cause an error.
- The secure monitor owns system security, and so is responsible for
configuring security-related items such as the VPR.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Since commit f2faffecb0, tegra: Convert to use binman
the dm-pre-reloc properties are removed.
This leads U-Boot not to enable the display on paz00
This patch restore the dm-pre-reloc properties allowing
the bootloader to output to the display panel
v4: - Spell project name as appropriate
v3: - Fix few typos
v2: - Add more characters to commit hash
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
