We intended to use the PIC TFRR register however we where missing adding
in the PIC register base offset from IMMR when we defined
_POST_WORD_ADDR.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
By now, the majority of architectures have working relocation
support, so the few remaining architectures have become exceptions.
To make this more obvious, we make working relocation now the default
case, and flag the remaining cases with CONFIG_NEEDS_MANUAL_RELOC.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
The PIC's TFRR register doesn't affect hardware and is generally unused,
so use as storage for the POST word.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Using PIC TFRR register for post word load/store for generic MPC85xx.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
- Revives POST for blackfin arch;
- Removes redundant code:
arch/blackfin/lib/post.c
arch/powerpc/cpu/ppc4xx/commproc.c
arch/powerpc/cpu/mpc512x/common.c
- fixes up the post_word_{load|store} usage.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
List of the maintainers of the affected by patch boards:
Cc: Stephan Linz <linz@li-pro.net>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Larry Johnson <lrj@acm.org>
Cc: Feng Kan <fkan@amcc.com>
Add POST progress API implemented as weak calls before and after
each call to the POST test callback in the post_run_single routine
of the post.c file.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Add #ifdefs where necessary to not perform relocation fixups. This
allows boards/architectures which support relocation to trim a decent
chunk of code.
Note that this patch doesn't add #ifdefs to architecture-specific code
which does not support relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
When compile u-boot with the 2.18 binutils the following
warning messages for each object file in post/lib_ppc/fpu/ is
produced at the linking stage:
post/libpost.a(acc1.o) uses hard float, u-boot uses soft-float
...
This is because of the fact that, in general, the soft-float and
hard-float ABIs are incompatible; the 2.18 binutils do checking
of the Tag_GNU_Power_ABI_FP attribute of the files to be linked, and
produce the worning like above if these are not compatible.
The incompatibility of ABIs is concerned only the float values:
e.g. the soft-float ABI assumes the float argument passing in the
pair of rX registers, and the hard-float ABI assumes passing of
the float argument in the fX register. When we don't pass the float
arguments between the functions compiled with different floatness,
then such an application will work correctly.
This is the case for the FPU POST: u-boot (compiled with soft-float)
doesn't pass to (and doesn't get from) the FPU POST functions any
floats; there are no functions exported from the post/lib_ppc/fpu/
objects which would work with float parameters/returns too. So, we
can reassure the linker not to worry about the difference in ABI
attributes of linking files just by setting the 'soft-float'
attribute for the objects in post/lib_ppc/fpu. And this patch does
this.
Also, to avoid passing both soft- and hard-float options in CFLAGS
when compiling the files from post/lib_ppc/fpu (which is OK, but
looks rather dirty) this patch removes the soft-float string from
CFLAGS in post/lib_ppc/fpu/Makefile.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Don't run futher tests in case of a test fails that is marked as
POST_STOP.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Switch the OCM testid with the codec one. The reason is that current
implementation requires the POST_ROM testid to fit into lower 16
bits, and the codec test will never run with POST_ROM hopefully.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Added OCM test to POST layer. This version runs before all other tests
but doesn't yet interrupt post sequence on failure.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
This patch adds ECC Post test for the Lwmon5 board based
on PPC440EPx to U-Boot.
Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
- add support for the Epson 156x series of graphical displays
(These displays are serial and not suitable for using a normal
framebuffer console on them)
- add infrastructure needed in order to POST any DSPs in a board
applications: instead of using (PPC-specific) system calls we now
use a jump table; please see doc/README.standalone for details
* Patch by Dave Westwood, 24 Jul 2003:
added support for Unity OS (a proprietary OS)
- Correct flash and JFFS2 support for MPC8260ADS
- fix PVR values and clock generation for PowerQUICC II family
(8270/8275/8280)
* Patch by Bernhard Kuhn, 08 Jul 2003:
- add support for M68K targets
* Patch by Ken Chou, 3 Jul:
- Fix PCI config table for A3000
- Fix iobase for natsemi.c
(PCI_BASE_ADDRESS_0 is the IO base register for DP83815)
* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON
- Splashscreen support
- modem support
- sysmon support
- temperature dependend enabling of LCD
* Allow booting from old "PPCBoot" disk partitions
* Add support for TQM8255 Board / MPC8255 CPU
