Commit graph

64993 commits

Author SHA1 Message Date
Fugang Duan
0e9d23945c net: eqos: implement callbaks to get interface and set txclk rate
Implement the callbacks to get phy mode interface and txclk
rate configuration.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Fugang Duan
3a97da12ee net: dwc_eth_qos: add dwc eqos for imx support
Add dwc eqos for imx support.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:10 +02:00
Fugang Duan
e32e4d0f58 net: phy: realtek: add rx delay support for RTL8211F
Add RX delay enable support for RTL8211F PHY.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:25:02 +02:00
Ye Li
6a895d039b net: Update eQos driver and FEC driver to use eth phy interfaces
Update eQoS and fec ethernet drivers to support shared MDIO framework

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:24:54 +02:00
Ye Li
5fe419ef2a net: Add eth phy generic driver for shared MDIO
For dual ethernet controllers, the HW design may connect ETH phys to
one MDIO ports. So two different ethernet drivers have to share MDIO bus.
Since two ethernet drivers are independent, we can't ensure their probe
order.

To resolve this problem, introduce an eth phy generic driver and uclass.

After eth-uclass binds, we search the mdio node and binds the phy node
with the eth-phy-generic driver.

When one eth driver get its phy device, the parent of phy device will
probe prior than phy device. So this ensure the eth driver ownes the
MDIO bus will be probed before using its MDIO.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:24:48 +02:00
Peng Fan
d2b70205dd net: eth-uclass: add return value check
Add return value check

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:24:41 +02:00
Ye Li
a6979f78bc pinctrl: nxp: scu: Check the pad partition before set pinmux
If a pad is not owned by current partition we should not set its
pinmux.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:24:23 +02:00
Fabio Estevam
d19c1cb525 imx8mq_phanbell: Run SPL with caches enabled
It is safe to run SPL with caches enabled on i.MX8M, so
remove such restriction.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-05-10 13:23:27 +02:00
Peng Fan
3b26d527d3 net: fec: add fuse check
Add fuse check for fec. If the fuse indicates the module
will not work in the SoC, let's fail the initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-10 13:21:34 +02:00
Peng Fan
0bd3d911df usb: mx6: add fuse check
Add fuse check for USB. If the fuse indicates the module
will not work in the SoC, let's fail the initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:21:27 +02:00
Peng Fan
7d1ee741d1 i2c: mxc: add fuse check
Add fuse check for I2C. If the fuse indicates the module
will not work in the SoC, let's fail the initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:21:20 +02:00
Peng Fan
3c42c0f673 imx: add module fuse support
There are different parts from one SoC. Take i.MX6ULL for example,
some part might not have ENET, some might have; some might not have
USB, some might have. The information could be got from OCOTP,
to make one image support the different parts, we need runtime
disable linux kernel dts node and uboot driver probe if the
corresponding module not exists in the part.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:21:13 +02:00
Marek Vasut
b52fb0b0b5 ARM: imx: pico-imx8mq: Add support for Technexion Pico-iMX8MQ
Add initial support for Technexion Pico-iMX8MQ SoM on PicoPI carrier
board. Currently working is ethernet, serial, eMMC. DT is imported
from Linux 5.4.28 ("462afcd6e7ea") .

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-05-10 13:19:39 +02:00
Stefano Babic
b77d0292ca Merge branch 'master' of git://git.denx.de/u-boot 2020-05-10 13:03:56 +02:00
Tom Rini
c5c657644b Merge branch '2020-05-08-assorted-fixes' 2020-05-08 18:58:19 -04:00
Heinrich Schuchardt
be51c3ca08 test: fix naming of test functions in the log test suite
Both the nolog as well as the syslog tests were not found by Python
function generate_ut_subtest() due to not following the nameing
requirements imposed by the regular expression used to find linker
generated list entries in file u-boot.sym.

Adjust the naming of test functions.

With the patch the following tests are executed successfully for
sandbox_defconfig:

test/py/tests/test_ut.py::test_ut[ut_log_syslog_debug] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_err] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_info] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_nodebug] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_notice] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_warning] PASSED

The nolog tests are only executed if CONFIG_LOG=n and
CONFIG_CONSOLE_RECORD=y.

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-08 18:29:16 -04:00
Heinrich Schuchardt
d0ba026bd2 test: describe naming conventions for macro UNIT_TEST
Strict naming conventions have to be followed for Python function
generate_ut_subtest() to collect C unit tests to be executed via
command 'ut'.

Describe the requirements both on the C as well on the Python side.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-08 18:29:13 -04:00
Rasmus Villemoes
6d3524c2ad env/sf.c: honour CONFIG_SPL_SAVEENV
Deciding whether to compile the env_sf_save() function based solely on
CONFIG_SPL_BUILD is wrong: For U-Boot proper, it leads to a build
warning in case CONFIG_CMD_SAVEENV=n (because the initialization of
the .save member is guarded by CONFIG_CMD_SAVEENV, while the
env_sf_save() function is built if !CONFIG_SPL_BUILD - and even
without the CONFIG_CMD_SAVEENV guard, the env_save_ptr() macro would
just expand to NULL, with no reference to env_sf_save visible to the
compiler). And for SPL, when one selects CONFIG_SPL_SAVEENV, one
obviously expects to actually be able to save the environment.

The compiler warning can be fixed by using a "<something> ?
env_sf_save : NULL" construction instead of a macro that just eats its
argument and expands to NULL. That way, if <something> is false,
env_sf_save gets eliminated as dead code, but the compiler still sees
the reference to it.

For <something>, we can use CONFIG_IS_ENABLED(SAVEENV), which is true
precisely:

- For U-Boot proper, when CONFIG_CMD_SAVEENV is set (because
  CONFIG_SAVEENV is a hidden config symbol that gets set if and only
  if CONFIG_CMD_SAVEENV is set).
- For SPL, when CONFIG_SPL_SAVEENV is set.

As a bonus, this also removes quite a few preprocessor conditionals.

This has been run-time tested on a mpc8309-derived board to verify
that saving the environment does indeed work in SPL with these patches
applied.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-05-08 18:29:11 -04:00
Ye Li
6b6c620c82 sata: dwc_ahsata: Fix memory issue in reset_sata
The reset_sata should reset the sata device info and free the
probe_ent memory. Otherwise, it will cause memory leak if we
init the sata again.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-08 18:29:10 -04:00
Ye Li
cdff6fba32 sata: dwc_ahsata: Fix incorrect free
Fix coverity issue CID 43665: Free of address-of expression (BAD_FREE)
incorrect_free: free frees incorrect pointer pp.

pp points the port array field of struct ahci_uc_priv, should not free it.

Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-08 18:29:05 -04:00
Ye Li
87e2cb530f sata: ahsata: Fix wrong operand for checking SERR DIAG_X
Fix coverity issue CID 3261683: Wrong operator used
(CONSTANT_EXPRESSION_RESULT) operator_confusion:
({...; __v;}) | 67108864 is always 1/true regardless of the values
of its operand. This occurs as the logical operand of !

When DIAG_X is set, the PHY COMINIT signal is detected, so
should use '&' to check whether it is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-08 18:29:03 -04:00
Ye Li
bf38cbf9a2 sata: ahsata: Fix resource leak
Fix coverity issue CID 3606684: Resource leak (RESOURCE_LEAK)
leaked_storage: Variable uc_priv going out of scope leaks the storage it points to

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-08 18:29:00 -04:00
Tom Rini
a5e609b982 Pull request for UEFI sub-system for efi-2020-07-rc2-3
This series contains bug fixes and code simplifications.
 
 Following clarification in the discussion of the EBBR specification
 device trees will be passed as EfiACPIReclaimMemory to UEFI applications.
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Merge tag 'efi-2020-07-rc2-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc2-3

This series contains bug fixes and code simplifications.

Following clarification in the discussion of the EBBR specification
device trees will be passed as EfiACPIReclaimMemory to UEFI applications.
2020-05-08 14:56:23 -04:00
Tom Rini
ea02cfb649 Merge branch '2020-05-07-more-kconfig-migrations'
- Migrate CONFIG_SET_DFU_ALT_INFO, CONFIG_SYS_MTDPARTS_RUNTIME and
  finish the rest of the memtest related options.
2020-05-08 13:48:37 -04:00
Ashok Reddy Soma
702de89cc6 treewide: mem: Move mtest related defines to Kconfig
Move below defines which are used by mtest utility to Kconfig.
CONFIG_SYS_MEMTEST_START
CONFIG_SYS_MEMTEST_END

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Fix kmcoge5ne board, re-run migration as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-05-08 12:02:56 -04:00
Michal Simek
a389c9cd93 treewide: mem: Enable MEMTEST via defconfig
There is no reason to enable MEMTEST from headers when was converted to
Kconfig already.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-05-08 09:16:26 -04:00
Michal Simek
475d89d94d treewide: mem: Remove alternate memtest setup from Mox and x530
The commit e89f8aae3d ("treewide: Migrate CONFIG_SYS_ALT_MEMTEST to Kconfig")
setup correct dependency on MEMTEST that's why there is no reason to enable
enable alternate memtest without mtest command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-05-08 09:16:26 -04:00
Michal Simek
e519f03a18 cmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH mapping
There is no real need to exactly define space for saving patterns for
alternate memory test. It is much easier to allocate space on the stack and
use it instead of trying to find out space where pattern should be saved.

For example if you want to test the whole DDR memory you can't save patter
to DDR and you need to find it out. On Xilinx devices DDR or OCM addresses
were chosen but that means that OCM needs to be mapped and U-Boot has
access permission there.

It is easier to remove this limitation and simply save it on stack because
it is very clear that memory test can't rewrite U-Boot and U-Boot has also
full access to memory where runs from.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-05-08 09:16:26 -04:00
Patrick Delaunay
c39e19a9b0 configs: migrate CONFIG_SYS_MTDPARTS_RUNTIME to defconfigs
Move CONFIG_SYS_MTDPARTS_RUNTIME into Kconfig done by moveconfig.py.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-08 09:16:26 -04:00
Patrick Delaunay
8cc28146f5 configs: migrate CONFIG_SET_DFU_ALT_INFO to defconfigs
Move CONFIG_SET_DFU_ALT_INFO into Kconfig done by moveconfig.py.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-05-08 09:16:26 -04:00
Tom Rini
b11dc33e36 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-05-08 09:08:39 -04:00
Tom Rini
67887903af Merge branch '2020-05-07-atheros-phy-improvements' 2020-05-07 14:51:44 -04:00
Heinrich Schuchardt
d7ca3ce3d3 efi_loader: crypto/pkcs7_parser.h is not a local include
User <> and not "" for referencing a global include.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-07 18:23:18 +02:00
Patrick Wildt
6f146155f8 efi_loader: pkcs7_parse_message() returns error pointer
Since pkcs7_parse_message() returns an error pointer, we must not
check for NULL.  We have to explicitly set msg to NULL in the error
case, otherwise the call to pkcs7_free_message() on the goto err
path will assume it's a valid object.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Add missing include linux/err.h
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-07 18:23:17 +02:00
Patrick Wildt
9ad15227bb efi_loader: efi_variable_parse_signature() returns NULL on error
efi_variable_parse_signature() returns NULL on error, so IS_ERR()
is an incorrect check.  The goto err leads to pkcs7_free_message(),
which works fine on a NULL ptr.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-05-07 18:23:16 +02:00
Heinrich Schuchardt
42a426e027 efi_loader: put device tree into EfiACPIReclaimMemory
According to the UEFI spec ACPI tables should be placed in
EfiACPIReclaimMemory. Let's do the same with the device tree.

Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Grant Likely <grant.likely@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-07 18:23:16 +02:00
Heinrich Schuchardt
9900e4623a efi_loader: use logical and in do_env_print_efi()
If we want to check if two booleans are true, we should use a logical
conjunction (&&) and not a bitwise and-operator (&).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-07 18:23:16 +02:00
Heinrich Schuchardt
306bf6e7ff efi_loader: do not unnecessarily use EFI_CALL()
There is no need to call efi_get_variable() instead of
efi_get_variable_common(). So let's use the internal function.

Move forward declarations to the top of the file.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-07 18:23:16 +02:00
Heinrich Schuchardt
3fdff6be40 efi_loader: error handling in efi_set_variable_common().
Fix unreachable code. Free memory on error.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-07 18:23:16 +02:00
Heinrich Schuchardt
549b79e8e0 efi_loader: remove redundant assignment in dp_fill()
The value of dp is overwritten without being used.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-07 18:23:16 +02:00
Jan Kiszka
b37a0b5c89 kbuild: efi: Avoid rebuilding efi targets
Add a couple of missing targets so that helloworld and other efi targets
are not needlessly rebuilt.

CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-07 18:23:16 +02:00
Michael Walle
8737c65fe4 phy: atheros: consolidate {ar8031|ar8035}_config()
The two functions are now exactly the same, remove one of them.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:01 -04:00
Michael Walle
6333cbb381 phy: atheros: ar8035: remove static clock config
We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.

If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <125000000>" because that value was the hardcoded
value until this commit.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:01 -04:00
Michael Walle
fe6293a809 phy: atheros: add device tree bindings and config
Add support for configuring the CLK_25M pin as well as the RGMII I/O
voltage by the device tree.

By default the AT803x PHYs outputs the 25MHz clock of the XTAL input.
But this output can also be changed by software to other frequencies.
This commit introduces a generic way to configure this output.

Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V.
An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V
option needs an external supply voltage. This commit adds support to
switch the internal LDO to 1.8V.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
2b7721552a phy: atheros: move delay config to common function
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
f6ae47be1a phy: atheros: introduce debug read and write functions
Provide functions to read and write the Atheros debug registers.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
30e3193128 phy: atheros: use defines for PHY IDs
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
f4d48f43b2 phy: atheros: fix AR8021 PHY ID mask
The upper bits are all the OUI.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
4d4e4cf779 phy: atheros: Clarify the intention of ar8021_config
Debug register 5 contains TX_CLK DELAY at bit 8 and reserved values at
the other bit positions, just like the other PHYs in the family do.
Therefore, it is not necessary to hardcode the reserved values, but
instead simply follow the read-modify-write procedure from the common
function.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
13114f38e2 phy: atheros: Explicitly disable RGMII delays
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.

If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00