Commit graph

22 commits

Author SHA1 Message Date
Fabio Estevam
dce67bd548 mx6qsabreauto: Pass the board revision to the kernel
The kernel from Freescale expects that the bootloader passes the board revision.

Read the board revision and pass it via get_board_rev().

Without passing the board revision the kernel does not operate properly as the
initialization of peripherals are different in revA versus revB boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-16 12:35:11 +02:00
Eric Nelson
2af7e81015 i.MX6: get rid of redundant struct src_regs (dupe of struct src)
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15 11:54:09 -07:00
Eric Nelson
de710a14b5 i.MX6: define struct iomuxc and IOMUX_GPR2 register bitfields
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:09 -07:00
Eric Nelson
e66ad6e747 i.MX6: Add ANATOP_PFD_480 bitfield constants
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:09 -07:00
Eric Nelson
a83e1b7b8c i.MX6: define IOMUX_GPR3 register bitfields
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15 11:54:09 -07:00
Benoît Thébaudeau
8e99ecd74b mxc: Define architecture identifier
Define ARCH_MXC for i.MX devices. This is useful to identify features or
behaviors common to all i.MX SoCs.

The i.MX28 is omitted because its architecture is a bit different (like imx/mxc
vs. mxs in Linux).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kim Phillips <kim.phillips@freescale.com>
2012-09-01 14:58:30 +02:00
Stefano Babic
5fecb36ca0 MX: Set a common gpio.h for all i.MX
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
2012-09-01 14:58:27 +02:00
Troy Kisky
124a06d7fb imx-common/cmd_bmode.c: add imx bmode (bootmode) command
This is useful for forcing the ROM's
usb downloader to activate upon a watchdog reset.
Or, you can boot from either SD Card.

Currently, support added for MX53 and MX6Q
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

Note: MX53 support untested.
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:26 +02:00
Fabio Estevam
05d4df1d8a mx6: Allow mx6 to access the IPUv3 registers
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10 11:35:38 +02:00
Eric Nelson
64e7cdb5e8 i.MX6: add enable_sata_clock()
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:33 +02:00
Vikram Narayanan
a9407f2bc5 imx: Remove unneeded/repititive definitions from imx headers
Remove gpio related unused/repititive definitions from imx headers.

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-04-16 14:53:59 +02:00
Eric Nelson
c415919d57 i.MX6: define CACHELINE_SIZE
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-04-16 14:53:58 +02:00
Fabio Estevam
a768386746 mx6: Read silicon revision from register
Instead of hardcoding the mx6 silicon revision, read it in run-time.

Also, besides the silicon version print the mx6 variant type: quad,dual/solo
or solo-lite.

Tested on a mx6qsabrelite, where it shows:

CPU:   Freescale i.MX6Q rev1.0 at 792 MHz

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <r64343@freescale.com>
2012-03-27 09:41:16 +02:00
Fabio Estevam
334bd0e225 mx6: Remove duplicate definition of ANATOP_BASE_ADDR
Remove duplicate definition of ANATOP_BASE_ADDR.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-03-27 09:41:16 +02:00
Wolfgang Grandegger
3f467529ca usb/ehci: Add USB support for the MX6Q
Currently, only USB Host 1 is supported.

Cc: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
2012-03-26 23:09:23 +02:00
Troy Kisky
28774cbaac net: fec_mxc: add 1000 Mbps selection
Define FEC_QUIRK_ENET_MAC and add to
arch-mx6/imx-regs.h

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2012-02-27 21:19:24 +01:00
Eric Nelson
d5c37c9cc4 mx6q: Add support for ECSPI through mxc_spi driver
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
2012-02-27 21:19:23 +01:00
Eric Nelson
4b3a30e9ae mx6q: define GPIO macros for translating between ordinals and port:index
The interface to the mxc_gpio driver uses integer (ordinal) values to
refer to all GPIOs on the i.MX processors. The registers themselves
and much of the i.MX documentation are banked in groups of 32, and these
macros allow the use of the port:index numbering for clarity.

GPIO_NUMBER() converts to ordinal value from port:index
GPIO_PORT() returns the port of an ordinal value
GPIO_INDEX() returns the index or offset of the ordinal.

Discussion on the mailing list at
	http://lists.denx.de/pipermail/u-boot/2012-January/116927.html

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-02-27 21:19:23 +01:00
Jason Liu
f2f7745825 imx: mx6q: add aipstz init for off platform periph
Init peripheral access control register of AIPSTZ OPACRx:

Buffer Writes(BW):      0 -> not bufferable,
Supervisor Protect(SP): 0 -> not require supervisor privilege level for accesses.
Write Protect(WP):      0 -> allows write accesses.
Trusted Protect(TP):    0 -> allows unstrusted master

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
2012-01-16 08:40:10 +01:00
Jason Liu
bd2e27c043 i.mx6:imx6q: allign MAC address with burned-in ordering
For the i.mx6q, the burned-in MAC address will be the following odering,

fuse: 0x620[7:0]   MAC_ADDR[7:0]     ---> mac[5]
fuse: 0x620[15:8]  MAC_ADDR[15:8]    ---> mac[4]
fuse: 0x620[23:16] MAC_ADDR[23:16]   ---> mac[3]
fuse: 0x620[31:24] MAC_ADDR[31:24]   ---> mac[2]
fuse: 0x630[7:0]   MAC_ADDR[39:32]   ---> mac[1]
fuse: 0x630[15:8]  MAC_ADDR[47:40]   ---> mac[0]

This patch also fix the error caculation for the fuse bank[0] address

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
2012-01-16 08:40:09 +01:00
Fabio Estevam
be252b654a net: imx: Add multi-FEC support for imx_get_mac_from_fuse
Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter.

This feature is important on mx28 SoC for example that has two FEC ports.

Cc: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-01-16 08:40:09 +01:00
Jason Liu
23608e23fd i.mx: add the initial support for freescale i.MX6Q processor
i.MX6Q is freescale quad core processors with ARM cortex_a9 complex.
This patch is to add the initial support for this processor.

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc:Stefano Babic <sbabic@denx.de>
2011-12-09 17:30:10 +01:00