Commit graph

26026 commits

Author SHA1 Message Date
Simon Glass
084067ce13 dm: exynos: Move s5p_goni to generic board
The generic board deadline is approaching, and we need this feature to
enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for s5p_goni.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:12 -06:00
Simon Glass
d010facb4e dm: exynos: Move smdkc100 to generic board
The generic board deadline is approaching, and we need this feature to
enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for smdkc100.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:09 -06:00
Simon Glass
3b7a326c95 dm: exynos: Add pinctrl settings for s5p_goni
These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:04 -06:00
Simon Glass
3a4ed03cde dm: exynos: Add pinctrl settings for smdkc100
These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:00 -06:00
Simon Glass
c6b0b09032 dm: exynos: dts: Adjust device tree files for U-Boot
The pinctrl bindings used by Linux are an incomplete description of the
hardware. It is possible in most cases to determine the register address
of each, but not in all cases. By adding an additional property we can
fix this, and avoid adding a table to U-Boot for every single Exynos
SOC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:35:57 -06:00
Simon Glass
41678484b3 dm: exynos: dts: Remove unused pinctrl information to save space
We don't include the pinctrl functions for U-Boot as they use up quite
a bit of space and are not used.

We could instead perhaps eliminate this material with fdtgrep, but so far
this tool has not made it to upstream.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:34:12 -06:00
Simon Glass
dd54739dc4 dm: exynos: Bring in pinctrl dts files from Linux kernel
Bring in required device tree files for pinctrl from Linux v3.14. These
are initially unchanged and have a number of pieces not needed by U-Boot.

Note that exynos5420 is renamed to exynos54xx here since we want to
support exynos5422 also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:34:08 -06:00
Simon Glass
2fdd7d9e1a dm: exynos: dts: Convert /include/ to #include
We should be consistent about this. The kernel has moved to #include
which breaks error reporting to some extent but does allow us to include
binding files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:34:00 -06:00
Robert Baldyga
4d38395c15 arm: goni: add i2c_init_board()
Add proper initialization of GPIO pins used by software i2c.

Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:33:49 -06:00
Masahiro Yamada
f887cb6d86 dm: add of_match_ptr() macro
The driver model supports two ways for passing device parameters;
Device Tree and platform_data (board file).
Each driver should generally support both of them because some
popular IPs are used on various platforms.

Assume the following scenario:
  - The driver Foo is used on SoC Bar and SoC Baz
  - The SoC Bar uses Device Tree control (CONFIG_OF_CONTROL=y)
  - The SoC Baz does not support Device Tree; uses a board file

In this situation, the device driver Foo should work with/without
the device tree control.  The driver should have .of_match and
.ofdata_to_platdata members for SoC Bar, while they are meaningless
for SoC Baz; therefore those device-tree control code should go
inside #ifdef CONFIG_OF_CONTROL.

The driver code will be like this:

  #ifdef CONFIG_OF_CONTROL
  static const struct udevice_id foo_of_match = {
          { .compatible = "foo_driver" },
          {},
  }

  static int foo_ofdata_to_platdata(struct udevice *dev)
  {
          ...
  }
  #endif

  U_BOOT_DRIVER(foo_driver) = {
          ...
          .of_match = of_match_ptr(foo_of_match),
          .ofdata_to_platdata = of_match_ptr(foo_ofdata_to_platdata),
          ...
  }

This idea has been borrowed from Linux.
(In Linux, this macro is defined in include/linux/of.h)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:32:17 -06:00
Masahiro Yamada
b1799fcbdc dm: fix include guard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:32:17 -06:00
Masahiro Yamada
42c23dd2aa dm: include <linker_lists.h> from platdata.h and uclass.h
The header files include/dm/platdata.h and include/dm/uclass.h
use ll_entry_declare(); therefore they depend on
include/linker_lists.h.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:32:17 -06:00
Masahiro Yamada
dc7cb46f97 linker_lists: include <linux/compiler.h>
The header file include/linker_lists.h uses __aligned();
therefore it depends on include/linux/compiler.h

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:32:16 -06:00
Masahiro Yamada
2cede453da dm: simplify the loop in lists_driver_lookup_name()
if (strncmp(name, entry->name, len))
                continue;

        /* Full match */
        if (len == strlen(entry->name))
                return entry;

is equivalent to:

        if (!strcmp(name, entry->name))
                return entry;

The latter is simpler.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2014-10-22 10:32:16 -06:00
Masahiro Yamada
29a1bedbf3 dm: do not check the existence of uclass operation
The function uclass_add() checks uc_drv->ops as follows:

        if (uc_drv->ops) {
                dm_warn("No ops for uclass id %d\n", id);
                return -EINVAL;
        }

It seems odd because it warns "No ops" when uc_drv->ops has
non-NULL pointer.  (Looks opposite.)

Anyway, most of UCLASS_DRIVER entries have no .ops member.
This check makes no sense.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:32:16 -06:00
Masahiro Yamada
81b4e751c2 dm: fix comments
The struct udevice stands for a device, not a driver.
The driver_info.name is a driver's name, which is referenced
to bind devices.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:32:16 -06:00
Tom Rini
a84c8107d9 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2014-10-20 18:17:26 -04:00
Ruchika Gupta
ba4740205d ls102x: Add support for secure boot and enable blob command
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:21:26 -07:00
Ruchika Gupta
789490b6c0 mpc85xx: configs - Enable blob command in freescale platforms
Enable blob commands for platforms having SEC 4.0 or greater
for secure boot scenarios

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:21:09 -07:00
Ruchika Gupta
c5de15cbc8 crypto/fsl: Add command for encapsulating/decapsulating blobs
Freescale's SEC block has built-in Blob Protocol which provides
a method for protecting user-defined data across system power
cycles. SEC block protects data in a data structure called a Blob,
which provides both confidentiality and integrity protection.

Encapsulating data as a blob
Each time that the Blob Protocol is used to protect data, a
different randomly generated key is used to encrypt the data.
This random key is itself encrypted using a key which is derived
from SoC's non volatile secret key and a 16 bit Key identifier.
The resulting encrypted key along with encrypted data is called a blob.
The non volatile secure key is available for use only during secure boot.

During decapsulation, the reverse process is performed to get back
the original data.

Commands added
--------------
    blob enc - encapsulating data as a cryptgraphic blob
    blob dec - decapsulating cryptgraphic blob to get the data

Commands Syntax
---------------
	blob enc src dst len km

	Encapsulate and create blob of data $len bytes long
	at address $src and store the result at address $dst.
	$km is the 16 byte key modifier is also required for
	generation/use as key for cryptographic operation. Key
	modifier should be 16 byte long.

	blob dec src dst len km

	Decapsulate the  blob of data at address $src and
	store result of $len byte at addr $dst.
	$km is the 16 byte key modifier is also required for
	generation/use as key for cryptographic operation. Key
	modifier should be 16 byte long.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:20:40 -07:00
Ruchika Gupta
7cad2e38d6 powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot
By default, PAMU's (IOMMU) are enabled in case of secure boot.
Disable/bypass them once the control reaches the bootloader.

For non-secure boot, PAMU's are already bypassed in the default
SoC configuration.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:17:42 -07:00
Ruchika Gupta
4ba4a095da ls102x: configs - Add hash command in freescale LS1 platforms
Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:17:32 -07:00
Ruchika Gupta
737537ef0c mpc85xx: configs - Add hash command in freescale platforms
Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:17:21 -07:00
Ruchika Gupta
b9eebfade9 fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:17:07 -07:00
Ruchika Gupta
028dbb8db1 fsl_sec : Change accessor function to take care of endianness
SEC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of SEC IP.

So update acessor functions with common SEC acessor functions to take care
both type of endianness.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:16:50 -07:00
Ruchika Gupta
48ef0d2a10 fsl_sec : Move SEC CCSR definition to common include
Freescale SEC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
SEC to common include

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:16:25 -07:00
Ruchika Gupta
84e0fb403d powerpc/P1010RDB:Update RESET_VECTOR_ADDRESS for 768KB u-boot size
U-boot binary size has been increased from 512KB to 768KB.

So update CONFIG_RESET_VECTOR_ADDRESS to reflect the same for
P1010 SPI Flash Secure boot target.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Modified subject to P1010RDB]
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:15:20 -07:00
Jeroen Hofstee
3e780af127 video: ipu_disp: remove pixclk fixup
The ipu display insists on having a lower_margin smaller
then 2. If this is not the case it will attempt to force
it and adjust the pixclk accordingly. This multiplies pixclk
in Hz with the width and height, since this is typically
a * 10^7 * b * 10^2 * c * 10^2 this will overflow the
uint_32 and make things even worse. Since this is a
bootloader and the adjustment is neglectible, just force
it to two and warn about it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-16 11:00:26 +02:00
Jeroen Hofstee
c1420328dc video: ipu: fix debug and comment
- fix debug pixel clk display and add unit
- fix some comments

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-16 10:58:34 +02:00
Simon Glass
0156444cf7 lcd: Fix build error with CONFIG_LCD_BMP_RLE8
Add a block to avoid a build error with the variable declaration.
Enable the option on sandbox to prevent an error being introduced in
future.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-16 09:58:24 +02:00
Tom Rini
c43fd23cf6 Prepare v2014.10
Signed-off-by: Tom Rini <trini@ti.com>
2014-10-14 04:47:15 -04:00
Hans de Goede
74bf7961a0 sunxi: axp152: dcdc3 scale is 50mV / step not 25mV / step
Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
error introduced when adding the axp152_mvolt_to_target during review of the
axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.

This commit fixes this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-13 09:02:01 -04:00
Tom Rini
c7ad5cbb1e Makefile: drop "tools-only" from no-dot-config-targets
With the introduction of CONFIG_LOCALVERSION support we cannot build
tools without having a config file (as we won't know our PLAIN_VERSION
until then).

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@ti.com>
2014-10-13 08:38:55 -04:00
Tom Rini
e89d623f09 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-10-10 20:59:28 -04:00
Albert ARIBAUD
3d420cbd35 Merge branch 'u-boot-socfpga/topic/arm/socfpga-20141010' into 'u-boot-arm/master' 2014-10-11 01:20:55 +02:00
Albert ARIBAUD
790af81543 Merge branch 'u-boot/master' into 'u-boot-arm/master' 2014-10-11 01:20:30 +02:00
Marek Vasut
5a1d0ad3ee arm: socfpga: Use EMAC1 on SoCDK
The SoCDK uses EMAC1, not EMAC0. This patch fixes the issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
2014-10-11 00:50:33 +02:00
Pavel Machek
d8540a1619 arm: socfpga: add MAINTAINERS entry
Add MAINTAINERS entry.

Signed-off-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
2014-10-11 00:50:33 +02:00
Jeroen Hofstee
ed8271d11c tools: compiler.h: Fix build on FreeBSD
Commit 832472 "tools: socfpga: Add socfpga preloader signing
to mkimage" added tools/socfpga.c which relies on htole32,
le32toh and friends. While compiler.h includes these protypes
for linux from endian.h, it doesn't do so for FreeBSD. Hence
include <sys/endian.h> for FreeBSD.

Cc: Marek Vasut <marex@denx.de>
CC: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-10 16:00:01 -04:00
Heiko Schocher
d0b3723034 arm, at91: add generic board support for the taurus and corvus board
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-10-10 21:51:19 +02:00
Bo Shen
b2868187f4 ARM: atmel: switch at91sam9263ek to generic board
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-10-10 21:51:18 +02:00
Andreas Bießmann
b719a08863 sama5d3xek: run PHY's config
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
2014-10-10 21:51:17 +02:00
Andreas Bießmann
476095772f macb: simplify gmac initialisation
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Bo Shen <voice.shen@atmel.com>
2014-10-10 21:51:15 +02:00
Hans de Goede
4a74298c54 serial-uclass: Fix compilation error
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-10 12:37:59 -04:00
Khoronzhuk, Ivan
a79c911f35 ks2_evm: readme: align according to actual sources
Update readme file for Keystone II EVM boards to actual sources.
Also correct some typos. For now the Edison evaluation board is
added, README for K2E is mostly the same, so update README to
contain information also for K2E evm. Rename file to README as
it contains information for all keystone evm boards.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-10 12:10:01 -04:00
Murali Karicheri
f6c7c75482 configs:ks2_evm: update defconfigs to support SPL
The K2HK and K2E boards support SPL by default, so add
CONFIG_SPL option. Also export CONFIG_ARM, CONFIG_ARCH_KEYSTONE
and TARGET_K2*_EVM options to spl/.config as they are the same.
So now it's convinient to build gph images using only two commands:

make k2hk_evm_defconfig
make u-boot-spi.gph

Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-10 12:10:00 -04:00
Tom Rini
db67801bf9 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2014-10-10 09:45:16 -04:00
Tom Rini
787011834e am335x_evm: Correct BOOTCOUNT driver support
We need to set the 'BE' flag here for things to work right.

Signed-off-by: Tom Rini <trini@ti.com>
2014-10-10 09:44:45 -04:00
Valentin Longchamp
ae1a74ebe7 common/board_r: remove warning in initr_mem for 64-bit phys_size_t
Since on powerpc phys_size_t can be unsigned long long, this printout
line can result in a not nice compile warning.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-10 09:44:45 -04:00
Hannes Petermaier
207828e215 board/BuR: fix pinmux for MII Ethernet Interface
The lines COL (collision detect) and CRS (carrier sense) needs to be connected
and muxed to the CPSW MAC for a proper function in half-duplex Mode of the
interface.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: Tom Rini <trini@ti.com>
2014-10-10 09:44:45 -04:00