Real marketing name of the board was recently updated so
to accommodate that change renaming the board and all
related to it.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit
512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one
powering-only) and a miniHDMI port.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
[jagan: Fixed board MAINTAINERS file]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
At the moment we rely on the infamous get_ram_size() function to learn
the actual DRAM size in U-Boot proper. This function has two issues:
1) It only works if the DRAM size is a power of two. We start to see
boards which have 3GB of (usable) DRAM, so this does not fit anymore.
2) As U-Boot has no notion of reserved memory so far, it will happily
ride through the DRAM, possibly stepping on secure-only memory. This
could be a region of DRAM reserved for OP-TEE or some other secure
payload, for instance. It will most likely crash in that case.
As the SPL DRAM init routine has very accurate knowledge of the actual
DRAM size, lets propagate this wisdom to U-Boot proper.
We re-purpose a currently reserved word in our SPL header for that.
The SPL itself stores the detected DRAM size there, and bumps the SPL
header version number in that case. U-Boot proper checks for a valid
SPL header and a high enough version number, then uses the DRAM size
from there. If the SPL header field is not sufficient, we fall back to
the old DRAM scanning routine.
Part of the DRAM might be present and probed by SPL, but not accessible
by the CPU. They're restricted in the main U-Boot binary, when accessing
the DRAM size from SPL header.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
So far we have two users which want to look at the SPL header. We will
get more in the future.
Refactor the existing SPL header checks into a common function, to
simplify reusing the code.
Now that this is easy, add proper version checks to the DT name parsing.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
On Allwinner SoCs we use some free bytes at the beginning of the SPL image
to store various information. We have a version byte to allow updates,
but changing this always requires all tools to be updated as well.
Introduce the concept of semantic versioning [1] to the SPL header:
The major part of the version number only changes on incompatible
updates, a minor number bump indicates backward compatibility.
This patch just documents the major/minor split, adds some comments
to the header file and uses the versioning information for the existing
users.
[1] https://semver.org
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
The Pine A64 Plus/non-Plus model detection code is now built on all
64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in
use.
Disable them when the board is Pine A64 by adding a Kconfig option that
is only selected on Pine A64.
On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and
saves a 104 byte strstr() function, then makes SPL on H6 succeed to
build.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add an entry for the warp7_bl33_defconfig target.
This fixes the following warnings:
WARNING: no status info for 'warp7_bl33'
WARNING: no maintainers for 'warp7_bl33'
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Odroid HC2 board is based on Odroid XU4 board, like the Odroid HC1.
The linux kernel does not provide a hc2 DTB so the hc1 DTB is also used
for the Odroid HC2.
Resend because MUA changed whitespace.
Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The DM37 and OMAP35 SOM-LV SOM-LV products both support a NOR
flash part connected to CS2 in addition to the NAND part on CS0.
This patch setups the GPMC timings for the MT28 NOR Flash and
enables the CFI-Flash driver now that the CFI stuff is in Kconfig
Signed-off-by: Adam Ford <aford173@gmail.com>
When booting and CPU is detected from cpuid, we also need an environment
variable that will be used in boot commands to load the proper devicetree.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
In my haste to migrate SPL to DM, I copied the wrong name.
While it really doesn't matter, I'd prefer the name to match
the board, so am335x_mmc0 is now called omap3_logic_mmc0
Signed-off-by: Adam Ford <aford173@gmail.com>
With the new omap_serial driver, this patch uses this instead
from the former ns16550_serial driver. Even though the
omap_serial driver is essentially the same.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the DM_USB working for USB host features, encapsulate the
USB gadget initialization in a precomiler check. If DM is enabled,
we don't need to manually initialize the MUSB driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
The default timings are assumming an OMAP36 / AM37 / DM37, but
the OMAP35 controller is a bit slower, so DDR may operate out of
spec when under stress. This patch checks the processor type and
sets the DDR timings according to processor type.
Fixes: 5ad4212ce0 ("ARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV
and OMAP35 Torpedo")
Signed-off-by: Adam Ford <aford173@gmail.com>
I2C bus 0 was not initialized correctly. There is an offset between i2c
index and the structure number of pad info. So i2c bus 0 can be in an
inconsistent state.
This problem become visible on B{4,6}50v3 with the CPUC HW watchdog enabled.
Sometimes when the CPUC HW watchdog interrupted the boot process, U-Boot was
not able to read VPD from I2C/EEPROM and the system failed to boot up again,
because a device connected to that bus was stuck in data transfer state (from
previous boot attempt) and there was no method to recover (struct
mxc_i2c_bus::idle_bus_fn was not set) courtesy of incorrect initialization.
Signed-off-by: Dan Cimpoca <dan.I.cimpoca@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
The b{4,6}50v3 kernel framebuffer console requires a modeline otherwise
the LVDS panel shows garbage.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
Use Video PLL to provide 65MHz for all displays.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
While using ./scripts/get_maintainer.pl I detect that the Maintainer name
and address for bx50v3 boards are not valid.
The new maintainer for GE bx50v3 products must be Ian Ray.
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
The explicit arch specific build symbol allows to group supported
boards, generalize common config options and it will serve as
a dependency for platform only drivers.
Two related board defconfigs are resynced after the change.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
When referring to the MSTPSR register, it contains the clock
status of SYS, RT, SECURE, and controlling SMSTPCR using this
value has the problem of being affected by the RT and SECURE
status.This patch changes the reference register to SMSTPCR.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
GSX clock force supply code is unnecessary at U-Boot,
because GSX clock control is supported at the kernel driver.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
This code is unnecessary, because these registers are set by the
initial program loader (IPL).
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
This patch adds new zynqmp command "zynqmp tcminit mode" to
initialize TCM. TCM needs to be initialized before accessing
to avoid ECC errors. This new command helps to perform
the same. It also makes tcm_init() as global and uses it for
doing the TCM initialization.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency.
The patch is adding necessary infrastructure in place without enabling
platform which is done in separate patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB),
USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each).
Boards have mix of Winbond/ST QSPIs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add Menlosystems M53 board, based on the M53 SoM.
This board has Ethernet, USB host, USB gadget, UART and LCD on it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
More fixes and improvements for ARC here:
Fixes (this time included for real):
* Take care of global uninitialized variables
They used to be put right after .bss section and were never
zeroed as they should be. Now merged with normal .bss
Improvements:
* Print more verbose CPU info for boards built on real silicon
* Add support for SD-card detection on all ARC boards
* Quite a few fixes for IoT DK
- Support reset by command
- Print of CPU freq on boot
- Link for eFlash etc
So now we may detect MMC/SD-card existence and
instead of completely misleading message on missing card:
------------------------>8-----------------------
Loading Environment from FAT... Card did not respond to voltage select!
------------------------>8-----------------------
we now get very clear one:
------------------------>8-----------------------
Loading Environment from FAT... MMC: no card present
------------------------>8-----------------------
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Since gd->cpu_clk is a global item we may once populate it from .dtb
ans use it then in other places like for printing CPU info etc.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
ARC IDENTITY register only encodes major architecture
type and version while for a particular board/silicon we
may know better which template was used and so we may identify
CPU more precise, which exactly we do here.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Till now we have had cases where we had one phy device per dpmac.
Now, with the upcoming products (LX2160AQDS), we have cases, where there
are sometimes two phy devices for one dpmac. One phy for TX lanes and
one phy for RX lanes. to handle such cases, add the support for multiple
phys in ethernet driver. The ethernet link is up if all the phy devices
connected to one dpmac report link up. also the link capabilities are
limited by the weakest phy device.
i.e. say if there are two phys for one dpmac. one operates at 10G without
autoneg and other operate at 1G with autoneg. Then the ethernet interface
will operate at 1G without autoneg.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Sandbox SPL/TPL support
Various dm-related improvements
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Merge tag 'dm-9oct18' of git://git.denx.de/u-boot-dm
Test improvements to tidy up output and drop duplicate tests
Sandbox SPL/TPL support
Various dm-related improvements
The interruption support had be removed for ARM architecture and
the function get_timer_masked() is no more used except in some
the timer.c files.
This patch clean each timer.c which implement this function and
remove the associated prototype in u-boot-arm.h
For timer.c, I don't verify if the weak version of get_timer
(in lib/time.c) can be used
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The interruption support had be removed for ARM architecture and
the function udelay_masked() is no more used except in some timer.c
files and have the same content than udelay() or __udelay().
This patch update each timer.c implementing this function and
remove the associated prototype in u-boot-arm.h.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Push generic defines of gpio.h out of mach-davinci to drivers/gpio
now that non-davinci architectures are beginning to use this IP.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Fix calimain build]
Signed-off-by: Tom Rini <trini@konsulko.com>
The uinitrd fixup logic should be executed after the FDT /chosen
node has been properly populated by fdt_initrd()
Signed-off-by: Nicholas Faustini <nicholas.faustini@azcomtech.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This adds platform code for the Khadas VIM2 board based on a
Meson GXM (S912) SoC with the Meson GXM configuration.
This initial submission supports UART, MMC/SDCard and Ethernet.
USB is partially supported.
All the code is from Neil Armstrong! I just rebased the code, do
some cleanup and tested on my board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
There are plenty of existing drivers that have macros like ETH_ALEN
defined in their own source files. Now that we imported the kernel's
if_ether.h to U-Boot we can reduce some duplication.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch add SPL DM support for da8xxevm boards
with SPL serial, SPI drivers supported via platdata.
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850evm
Rather than passing a hardcoded maxsize to the generic get_ram_size()
function use the i.MX 7 specific imx_ddr_size() function, which extracts
the memory size at runtime by reading the DDR controller registers.
This is a purely cosmetic change as the generic get_ram_size() function
already took care of properly automatically detecting 256MB, 512MB or 1GB
modules.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
USB OTG2 port is connected to the USB host connector.
Add support for it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
At present this function uses pixels but it seems more useful for it to
position in terms of characters on the screen. This also matches the
comment to the function. Update this.
Unfortunately there is one user of this function (at91). Have a crack at
fixing this, since I cannot test it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
With there now being four device tree files, and 4 separate
defconfig files, the code necessary to determine which board is
being used is no longer necessary as the corresponding pin-muxing
and board names are determined by the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the device trees doing most of the work of pin-muxing and
DM doing much of the peripheral initialization, this creates
new defconfig files for each of the Logic PD variants with
proper register settings/pin-muxing.
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Update MAINTAINERS entry]
Signed-off-by: Tom Rini <trini@konsulko.com>
The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debugging of sensor fusion,
voice recognition and face detection designs.
More information is avaialble here [1] and here [2].
The board is based on real silicon with
ARC EM9D-based Data Fusion IP Subsystem.
It sports a rich set of I/O including
* DW USB OTG
* DW MobileStorage (used for micro SD-card)
* GPIO
* multiple serial interface including DW APB UART
* ADC, PWM and eFlash, SRAM and SPI Flash memory
* Real-Time Clock (RTC)
* Bluetooth module with worldwide regulatory compliance
(FCC, IC, CE, ETSI, TELEC)
* On-board 9-axis sensor (gyro, accelerometer and compass)
Extensible with Arduino, Pmod, mikroBUS connectors and a 2x18
extension header.
One of the most interesting features for developers is built-in
Digilent USB JTAG probe so only micro-USB cable is needed!
[1] https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit
[2] https://www.synopsys.com/dw/doc.php/ds/cc/iot_dev_kit.pdf
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This adds QEMU RISC-V 'virt' board target support, with the hope of
helping people easily test U-Boot on RISC-V.
The QEMU virt machine models a generic RISC-V virtual machine with
support for the VirtIO standard networking and block storage devices.
It has CLINT, PLIC, 16550A UART devices in addition to VirtIO and
it also uses device-tree to pass configuration information to guest
software. It implements RISC-V privileged architecture spec v1.10.
Both 32-bit and 64-bit builds are supported. Support is pretty much
preliminary, only booting to U-Boot shell with the UART driver on
a single core. Booting Linux is not supported yet.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Since the mach_id is not used by RISC-V, remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
The serial# environment variable needs to be
defined so it will be used by fastboot as serial
for the endpoint descriptor.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
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Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriq
Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
With DM_MMC working for both SPL and U-Boot, this patch removes
the legacy style of initializing the MMC driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the pinctrl function enabled and the device tree setting up
the pins we want to use, this patch removes the manual pinmuxing
except for that which is not done by the device tree and minimal
pins necessary for SPL (like serial, GPMC, and MMC)
Signed-off-by: Adam Ford <aford173@gmail.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This adds the support for PDA detection as common code for
Atmel boards.
Using the one wire interface over GPIO , an EEPROM memory is read
and compared to preprogrammed values for PDA screens TM4300, TM7000
and TM7000B.
Once the PDA is detected, an environment variable is set accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add command to query information from and write text to on-screen
display (OSD) devices.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Reuse the existing ICID setup code done for LS1046A smmu enablement
and add the equivalent setup for LS1043A chips.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The iommu-map property in the fsl-mc node is updated by
valid stream-ids by u-boot. This patch is to fixup this
property for LS208x and LS1088.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS1012AFRWY supports three board revisions.
Revision A and B board are collectively identified as revA/B,
Revision C board is identifies as revC.
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Modify the zynqmp_pmufw_version() routine to return PMUFW version so
that it can be reused wherever required. Get PMUFW version from PMU
only once at bootup and later just return stored value.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On beaglebone black, it can so happen that PHY address
is not latched correctly on reset and board boots with
PHY responding to a different address than that
programmed in device-tree. For example, see this report:
https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J
Workaround this by fixing up device-tree passed to kernel
by using the PHY address detected in hardware.
Beaglebone itself uses only one ethernet port and its DT
currently uses phy_id (obsoleted). But the function has
been written to handle multiple ports and phy_id as well
as phy-handle to make the function more generically useful.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable USB gadget support using DWC2 driver
Populate board_usb_init() to initialize clocks,
phy, reset and data needed for DWC2 IP.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
The Gardena Smart-Gateway boards have a MT7688 SoC with 128 MiB of RAM
and 8 MiB of flash (SPI NOR) and additional 128MiB SPI NAND storage.
This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.
Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM
and 32 MiB of flash (SPI NOR).
This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.
Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
If PCIe Mox module is connected we want to have PCIe node enabled
in U-Boot's device tree.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
The macro name CONFIG_WDT_ARMADA_3720 is called CONFIG_WDT_ARMADA_37XX
instead. Fix this so that watchdog really is enabled in board_init.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
This adds a new defconfig which pre-selects the PICO-Hobbit baseboard
allowing a completely non-interactive boot process.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This adds a new defconfig which pre-selects the PICO-Pi baseboard
allowing a completely non-interactive boot process.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Drop the macro as it is defined in sh7723.h already.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
