Commit graph

11487 commits

Author SHA1 Message Date
Michal Simek
64eb13bfd7 arm64: zynqmp: Add a2197 memory board revA
Similar to processor board but i2c structure is completely different.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
917c57845a arm64: zynqmp: Add System Controller for a2197-g/p
Similar SCs but different wiring.

- dc_i2c is connected to X-PRC cards that's why label is required to have
  an option to hook up some devices.
- Exactly identify i2c devices on x-prc boards.
  In case of missing i2c connection devices won't be accessible.
- USB 0 should be device mode with super speed.
- USB 1 should be host mode.
- Fix i2c mux reset pin entry - commented, not verified.
- Fix i2c1 eeprom compatible string - it is an ST 128Kbit device.
  Need to use atmel fallback.
- Fix si570 I2C slave address and add corresponding part numbers.
- Enable AMS for system monitoring.
- phy reset property should be commented because it will throw a
  warning dump when called from context that can sleep.
  No support for phys property (zynqmp phy driver) with SGMII.
  Add is-internal-pcspma property required by uboot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
be972b2bd1 arm64: zynqmp: Add generic a2197 system controller config
Add generic configuration for a2197-p/-m/-g boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
b96b695f2c arm64: zynqmp: Switch spi-flash to jedec, spi-nor compatible
Change has been done across the whole tree only zynqmp-mini-qspi hasn't
been fixed.
Origin changed done by commit ffd4c7c2ec
("dts: switch spi-flash to jedec, spi-nor compatible")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Vipul Kumar
69b67ec8c9 ARM: zynq: dts: Added alias for usb node
This patch added alias for usb node in dts file.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Michal Simek
a6af30908b ARM: zynq: Align model name with DT
Use model property to distinguish different configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
95105089af clk: versal: Add clock driver support
This patch adds clock driver support for Versal platform. The clock driver
queries and performs clock operations using PLM firmware by communicating
with it using SMC calls.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:24 +02:00
Michal Simek
3899ebdd88 arm64: zynqmp: Provide a Kconfig option to disable OCM and TCM MMU mapping
This patch provides an option to enable/disable OCM and TCM memory into MMU
table with corresponding memory attributes.

The same change was done for ZynqMP by commit 189bec47ab
("arm64: zynqmp: Provide a Kconfig option to define OCM and TCM in MMU")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Michal Simek
aef149e9dd arm64: versal: Enable memory mapping via DT
Code reads DT and setup MMU table based on memory node. This will ensure
that only DT needs to be changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
T Karthik Reddy
a69814c815 arm64: zynqmp: Set initrd_high to as high as possible
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Siva Durga Prasad Paladugu
085201c246 arm64: versal: Set initrd_high to as high as possible
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Siva Durga Prasad Paladugu
bfd092f9ca arm64: versal: Define board_late_init for versal
Define board_late_init which performs bootmode detection
and prepares corresponding distro boot commaand sequence.

Also disable it for mini platforms because simply there is no need to have
it enabled.
But also disable it for virtual platform because Qemu is not modelling this
register space that's why travis testing would fail. This configuration
should be reverted when mainline Qemu is updated.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Michal Simek
dd3c7b6ea1 arm64: zynqmp: Add u-boot,dm-pre-reloc to clk300 node
This node is used by qspi driver for supporting qspi boot mode in SPL.

Similar changes have beeen done by commit a9022b017a
("ARM64: zynqmp: Add u-boot,dm-pre-reloc to clk nodes")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Tom Rini
dac51e9aaf Merge branch 'master' of git://git.denx.de/u-boot-sh
- ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulator
2019-10-05 20:06:58 -04:00
Adam Ford
5ff1963da3 ARM: dts: imx6q-logicpd: Add missing imx6q-logicpd-u-boot for SPL
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2.  This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.

Fixes: 8f4691e31a ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-10-04 12:21:23 -04:00
Andrew F. Davis
29c9db4d98 board: ti: am654: Disable TRNG node for HS devices
On HS devices the access to TRNG is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-04 12:21:23 -04:00
Andrew F. Davis
c9e6c13deb arm: K3: Increase default SYSFW image size allocation
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 269000 bytes but now needs to be grown to 276000 to make room
for the signatures attached to the board configuration data on High
Security devices.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-10-04 12:21:23 -04:00
Marek Vasut
49d5fba81c ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulator
This patch restores commit c49d0ac38a ("ARM: dts: rmobile: Increase off-on
delay on the SD Vcc regulator"), which was accidentally dropped during DT
resync in commit 317d13ac63 ("ARM: dts: rmobile: Synchronize Gen3 DTs with
Linux 5.0").

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fixes: 317d13ac63 ("ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.0")
2019-09-30 02:07:02 +02:00
Heiko Stuebner
d46b548290 rockchip: make_fit_atf.py: fix .its generation for a single atf image
The commit 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property
set error") fixed the double-loading of the primary atf-image, but didn't
take into account that there may be rare atf images with only that main
section present.

Right now this will result in a broken its due to the loadables section not
getting closed correctly, so fix that by adapting the guards around the loop.

The guards now protect against 0 segments when the bl31 binary doesn't
contain any section and 1 segment when only a core atf section is present.

Fixes: 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property set error")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-28 22:26:32 +08:00
Heiko Stuebner
03f98b75e4 rockchip: misc: read the correct number of bytes from the efuse
Originally the cpuid var the value gets read into was defined as
    u8 cpuid[RK3399_CPUID_LEN];
hence the sizeof(cpuid) would return the correct the correct number
of array elements.

With the move to a separate function cpuid becomes a pointer and
sizeof(cpuid) hence returns the pointer size - 8 in the arm64 case.

We do have the actual id length available as function param so use
it for actual amount of bytes to read.

Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-28 22:26:32 +08:00
Michael Trimarchi
f810ea6acb rockchip: rk3288-tinker: Attach missing peripherals at SPL
Tinker board needs to mux all the sdmmc gpio and
activate the regulator connected to bank 7. Remove
all the bank that are not in use and mark them as dm,spl
so-that it would initialize at SPL.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Jagan Teki
891d4d1fca rockchip: spi-boot-order: Trival fix to newline missing
newline \n was missed in fdt_path_offset, error loop.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Jagan Teki
bacad567ac rockchip: rk3288: vyasa: Drop ROCKCHIP_BROM_HELPER selection
ROCKCHIP_BROM_HELPER is selected as if TPL/SPL ROCKCHIP_BACK_TO_BROM
has been defined, so drop the explicit enablement for vyasa board.

This change is supposed to missed during config move to
other locations, and missed to drop the same.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Tom Rini
a9fa70b7b7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add emmc hs200 support
- Few bug fixes related to serdes, I2C, ethernet, etc
2019-09-16 13:13:45 -04:00
Faiz Abbas
16f14b930d ARM: dts: dra74x: Fix iodelay configuration for mmc3
According to the latest am572x[1] and dra74x[2] data manuals, mmc3
default, hs, sdr12 and sdr25 modes use iodelay values given in
MMC3_MANUAL1. Set the MODE_SELECT bit for these so that manual mode is
selected and correct iodelay values are configured.

[1] http://www.ti.com/lit/ds/symlink/am5728.pdf
[2] http://www.ti.com/lit/ds/symlink/dra746.pdf

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-09-13 11:56:30 -04:00
Lokesh Vutla
78e512129b arm: k3: Use get_ti_sci_handle() where ever possible
Instead of calling uclass apis everywhere, use get_ti_sci_handle()
when ever ti_sci is needed.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13 11:56:30 -04:00
Lokesh Vutla
e8d3a18639 arm: k3: Fix getting ti_sci handle
API get_ti_sci_handle() is relying on the device-tree node name
to be "dmsc" for probing the ti_sci device. But with the introduction
of debug messages for dmsc, the node name changed to dmsc@44083000.
Because of this ti_sci is never probed cause a boot failure. Instead
of relying on device-tree node name, use the first available firmware
node for probing ti_sci.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13 11:56:30 -04:00
Adam Ford
ca62f2ba15 ARM: omapl138_lcdk: Enable DM_GPIO and DM and GPIO Commands
The da8xx GPIO driver is available with DM_GPIO support.  This
patch enables the CMD_GPIO, CMD_DM, and DM_GPIO and DA8XX_GPIO.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-09-13 11:56:08 -04:00
Suniel Mahesh
d60eb8e49e arm: am437x: cm-t43: Add device tree, enable OF_CONTROL
Add device tree from Linux for driver model conversion
and enable OF_CONTROL. This will remove the following compile
warning:
==================================================
Device Tree Source is not correctly specified.
Please define 'CONFIG_DEFAULT_DEVICE_TREE'
or build with 'DEVICE_TREE=<device_tree>' argument
===================================================
Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
2019-09-13 11:56:08 -04:00
Hou Zhiqiang
116f75c7b3 armv8: ls1028a: Updated serdes configuration for 0x13BB
In SerDes protocol 0x13BB, lane C was erroneously assigned
to PCIE1, this is now updated to PCIE2

Fixes: 36f50b7523 ("armv8: ls1028a: Add other serdes
		     protocal support")

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Hou Zhiqiang
c9ba88bafc armv8: fsl-layerscape: Fix typo in Layerscape PCIe config entry
The correct config entry is CONFIG_PCIE_LAYERSCAPE and this
typo results in skipping the fixup of Linux PCIe DT nodes.

Also enable the fixup when Layerscape Gen4 controller driver
is enabled.

Fixes: 4da0e52c9d (armv8: fsl-layerscape: fix config dependency
		     for layerscape pci code)

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Chuanhua Han
2f2a19757b armv8: fsl-layerscape: Update I2C clock divider
By default, i2c input clock is programmed at
platform clk / 2 in u-boot, but this is not
correct for all the platforms,
Update I2C clock divider's default values as per
SoC (LS1012A, LS1028A, LX2160A and LS1088A).

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Thomas Schaefer
0490cab584 armv8: ls1028a: configure PMU's PCTBENR to enable WDT
The SP805-WDT module on LS1028A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Alex Marginean
a3ce94b602 arm: dts: ls1028a-qds: define the MDIO MUX
Add the device-tree structure describing the MUX in board dts.

QDS board has an on-board RGMII PHY and 4 slots for extension cards.
All these can be accessed over MDIO through a MDIO MUX controlled
over I2C.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:31 +05:30
Yinbo Zhu
23da111d5f dts: armv8: add emmc hs200 support for ls1028ardb
Add emmc hs200 support for ls1028ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:04:43 +05:30
Yinbo Zhu
0f021c8bde dts: armv8: add emmc hs200 support for lx2160ardb
Add emmc hs200 support for lx2160ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:04:09 +05:30
Yinbo Zhu
be852314dc dts: armv8: add emmc hs200 support for ls1012ardb
Add emmc hs200 support for ls1012ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:03:10 +05:30
Yinbo Zhu
24cb6f2295 fsl-layerscape: Add fsl_esdhc peripheral clock support
Add esdhc peripheral clock support
for NXP layerscape platforms: LS1046ARDB, LS1043ARDB,
LS1012ARDB, LS1028ARDB, LS1088ARDB, LX2160ARDB

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:00:35 +05:30
Kever Yang
c9ec5fe018 rockchip: clean makefile for misc.c
Use obj-$(config) instead of #ifdef $config to make the code looks
clean, and move the misc_init for U-Boot proper only.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
45f8b55eca rockchip: not depends on TPL_BUILD for rk3188 makefile including
The rk3188/Makefile already depends on !TPL_BUILD, so no need to add
this again in parent Makefile, remove it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
86b4a6db68 rockchip: rk3399: dts: add boot order for rockpro64
The rk3399 rockpro64 board can boot from emmc and sdcard.
TODO: add spiflash as boot device.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Tom Rini
40e362a9ab Merge tag 'mmc-9-6-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Bug fixes to mmc_spi
Add Aspeed SD driver
Fix dw_mmc timeout calculation
Fix timeout values passed to mmc_wait_dat0
sdhci dt caps/mask update

[trini: Fix evb-ast2500_defconfig CONFIG_MMC line]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-09-08 21:15:13 -04:00
Tom Rini
ba83753289 - fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
 - increase kernel image size from 8 MB to 64 MB on arm64
 - add support for RPi4
 - add prefixes for raspberry pi related stuff to git-mailrc
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Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot

- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
2019-09-06 19:49:51 -04:00
Andrei Gherzan
76bce8c2ad ARM: bcm283x: Include definition for additional emmc clock
This clock has a different mbox ID so have this included in the relevant
header file.

Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06 18:16:59 +02:00
Andrei Gherzan
c6bcf05fcd ARM: bcm283x: Define configs for RaspberryPi 4
Define two target configs for Raspberry Pi 4 (32 and 64bit) and the
corresponding BCM2838* configs.

Be aware of the current limitation in firmware which requires an
explicit configuration to force the arm in 64bit mode when the
respective target is used.

Signed-off-by: Andrei Gherzan <andrei@balena.io>
[mb: rename BCM2838 -> BCM2711]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06 18:16:59 +02:00
Matthias Brugger
1cfac5204c ARM: bcm283x: Add BCM283x_BASE define
Devices of bcm283x have different base address, depending if they are on
bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to
build and only add the offset in the header files.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Gherzan <andrei@balena.io>
2019-09-06 18:16:59 +02:00
Fabian Vogt
49822442ed ARM: bcm283x mbox: Fix send status register
Before we can send a message to the mailbox we have to check that there
is space to do so. Therefore we poll the status register. But up to now
the wrong status register, the one of mailbox 0, was checked. Fix this
by polling the status regiser of mailbox 1.

Signed-off-by: Fabian Vogt <fvogt@suse.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[mb: rename registers and update commit message]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06 18:16:59 +02:00
Eddie James
30231e0ddb ARM: dts: ast2500: Add SDHCI nodes
Add nodes for the Aspeed SD controllers with their necessary properties.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
2019-09-05 15:27:31 +08:00
Eddie James
7764ee2e83 mmc: Add Aspeed SD controller driver
Add support for the Aspeed SD host controller engine.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2019-09-05 15:27:31 +08:00
Eddie James
38c9f08b41 clk: aspeed: Add support for SD clock
Add code to enable the SD clock on the ast2500 SoC.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
2019-09-05 15:27:31 +08:00