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ARM: bcm283x: Add BCM283x_BASE define
Devices of bcm283x have different base address, depending if they are on bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to build and only add the offset in the header files. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Andrei Gherzan <andrei@balena.io>
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193279d784
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1cfac5204c
5 changed files with 9 additions and 20 deletions
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@ -141,4 +141,9 @@ config SYS_SOC
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config SYS_CONFIG_NAME
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default "rpi"
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config BCM283x_BASE
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hex
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default "0x20000000" if BCM2835
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default "0x3f000000" if BCM2836 || BCM2837
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endmenu
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@ -37,11 +37,7 @@
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/* Raw mailbox HW */
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#ifndef CONFIG_BCM2835
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#define BCM2835_MBOX_PHYSADDR 0x3f00b880
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#else
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#define BCM2835_MBOX_PHYSADDR 0x2000b880
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#endif
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#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880)
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struct bcm2835_mbox_regs {
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u32 read;
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@ -6,11 +6,7 @@
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#ifndef _BCM2835_SDHCI_H_
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#define _BCM2835_SDHCI_H_
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#ifndef CONFIG_BCM2835
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#define BCM2835_SDHCI_BASE 0x3f300000
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#else
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#define BCM2835_SDHCI_BASE 0x20300000
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#endif
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#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000)
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int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
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@ -6,11 +6,7 @@
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#ifndef _BCM2835_TIMER_H
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#define _BCM2835_TIMER_H
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#ifndef CONFIG_BCM2835
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#define BCM2835_TIMER_PHYSADDR 0x3f003000
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#else
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#define BCM2835_TIMER_PHYSADDR 0x20003000
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#endif
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#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000)
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#define BCM2835_TIMER_CS_M3 (1 << 3)
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#define BCM2835_TIMER_CS_M2 (1 << 2)
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@ -6,11 +6,7 @@
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#ifndef _BCM2835_WDOG_H
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#define _BCM2835_WDOG_H
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#ifndef CONFIG_BCM2835
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#define BCM2835_WDOG_PHYSADDR 0x3f100000
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#else
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#define BCM2835_WDOG_PHYSADDR 0x20100000
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#endif
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#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000)
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struct bcm2835_wdog_regs {
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u32 unknown0[7];
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