Commit graph

18711 commits

Author SHA1 Message Date
Bill Richardson
55ae10f8db x86: gpio: Add GPIO driver for Intel ICH6 and later.
Implement <asm-generic/gpio.h> functions for Intel ICH6 and later.
Only GPIOs 0-31 are handled by this code.

Signed-off-by: Bill Richardson <wfrichar@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:38 -08:00
Luka Perkov
6e266bf88b add include/u-boot.lst to .gitignore
u-boot.lst is located in include directory. Update .gitignore file
accordingly.

Signed-off-by: Luka Perkov <luka@openwrt.org>
2012-12-06 13:56:39 -07:00
Robert P. J. Day
adb9d85139 README: Explain how to generate the CHANGELOG file.
Since the top-level README file refers the reader to the CHANGELOG,
it's worth mentioning how to generate it.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-06 13:56:39 -07:00
Robert P. J. Day
d4b901dd73 cmd_led.c: Standardize format of help and usage info.
Current "led" help and usage info has redundancy and extraneous
newlines, tweak it to be consistent with other commands.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-06 13:56:39 -07:00
Joe Hershberger
d060e6f441 Allow CONFIG_BOARD_SIZE_LIMIT to be specified in hex
Use the printf command to convert the number in any valid format into
the expected decimal format.  The resulting errors should be printed to
stderr.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-12-06 13:56:39 -07:00
Jerry Huang
33699df12c part: check each variable for capability calculation
In order to calculate the capability, we use the below expression to check:
((dev_desc->lba * dev_desc->blksz)>0L)
If the capability is greater than 4GB (e.g. 8GB = 8 * 1024 * 104 * 1024),
the result will overflow, the low 32bit may be zero.

Therefore, change to check each variable to fix this potential issue.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
2012-12-06 13:56:39 -07:00
Simon Glass
e3ff797cdb cbfs: Add docbook template
This adds a docbook template for fs, and makes CBFS use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 13:56:39 -07:00
Simon Glass
2592075776 cbfs: Remove mention of CREDITS files
As requested by Wolfgang, remove references to CREDITS in the CBFS
files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 13:56:38 -07:00
Stefan Reinauer
5fe8380db3 lzma: update to lzma sdk 9.20
Updated code taken from latest lzma sdk release 9.20 at
http://downloads.sourceforge.net/sevenzip/lzma920.tar.bz2

This generates quite a lot of checkpatch warnings, but I guess we
need to keep the code style as is to avoid a massive job each time we
update this.

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 13:56:38 -07:00
Joe Hershberger
0851020479 MAKEALL: Add options for incremental building
--continue will allow you to <ctrl-c> the MAKEALL and pick up where
you left off.

--rebuild-errors will allow you to rebuild only those boards which
had trouble on the last run of MAKEALL, allowing you to quickly test
a simple fix on just those boards.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2012-12-06 11:23:00 -07:00
Joe Hershberger
c97d59cbda MAKEALL: Fix kill_children
When building in parallel, make sure that we look up the children
based on the the actual process group id instead of just assuming
that the MAKEALL pid is the process group id.

Also ensure that logs from incomplete builds are deleted in the
process.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2012-12-06 11:23:00 -07:00
Matthias Fuchs
468ebf190a 4xx: Fix PCI memory mapping on CPCI405 boards
This patch fixes an issue with overlapping PCI regions
on boards with more than 64MB RAM.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-06 15:53:04 +01:00
Stefan Roese
fb3d2b8a3f Makefile: Add target for combined spl/u-boot.bin & u-boot.img
This new make target "u-boot-img.bin" consists of the U-Boot
SPL image with the real, full-blown U-Boot image directly
attached to it. The full-blown U-Boot image has the mkimage
header included, with its load-address and entry-point.

This will be used by the upcoming a3m071 MPC5200 board port.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:31:30 +01:00
Stefan Roese
b40bda6bd8 Makefile: Add possibility to set entry-point for u-boot.img
This patch enabled boards using the SPL framework to set
an entry point in the U-Boot mkimage image "u-boot.img".
Until now the entry point in the header has been set to 0.
By setting CONFIG_SYS_UBOOT_START in the board header, boards
can override this default location.

This will be used by the upcoming a3m071 MPC5200 board port.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:31:26 +01:00
Stefan Roese
13b4f63949 mpc5200: Add a3m071 board support
This patch adds support for the a3m071 board based on the
MPC5200.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:31:23 +01:00
Stefan Roese
083f2e08d2 mpc5200: Add SPL support
This patch adds SPL booting support (NOR flash) for the
MPC5200 platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:30:51 +01:00
Stefan Roese
d3aa8b8be2 env: Enable getenv_f() for SPL_BUILD
With this patch, getenv_f() can be included easily into the SPL
binary. With this, SPL boards can now use getenv_f() to read
environment variables (e.g. to detect if the OS or U-Boot shall
be executed).

In the approach this is done for env stored in NOR flash, as this
will be used by an upcoming MPC5200 board port.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:30:27 +01:00
Stefan Roese
ea8256f072 SPL: Port SPL framework to powerpc
This patch enables the SPL framework to be used on powerpc platforms
and not only ARM.

timer_init() does not exist on PPC systems. The timer (decrementer) is
initialized and enabled in interrupt_init() here. And currently
interrupt_init() is called after relocation to SDRAM. Since the only
powerpc SPL implementation (a3m071) doesn't need a timer, let's remove
this timer_init() call for PPC systems.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:30:22 +01:00
Stefan Roese
966b11c749 powerpc: Extract EPAPR_MAGIC constants into processor.h
By extracting these defines into a header, they can be re-used by other
C sources as well. This will be done by the SPL framework OS boot
support.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-12-05 17:27:02 +01:00
Marek Vasut
a918a53c36 mxs: Staticize SPL functions
The MXS SPL didn't mark local functions "static". Fix it. This also makes the
SPL smaller by roughly 300 bytes.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-04 09:29:11 +01:00
Marek Vasut
1230e7bc2d mxs: Properly setup VDDD in power supply setup code
The memory setup code adjusted the VDDD voltage. Remove this adjustment
and configure the VDDD voltage correctly in the power supply setup code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-04 09:27:21 +01:00
Marek Vasut
77cb33bd25 mxs: Implement common function to setup VDDx
Implement common function to setup the VDDIO, VDDD and VDDA voltage.
Right now, there are two almost identical functions to setup VDDIO
and VDDD, which is prone to breakage. Pull out the differences into
constant structure and pass them as an argument to the common function.

Moreover, the function has almost identical loops for setting higher
and lower VDDx voltage. Merge these two loops.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-04 09:26:54 +01:00
Marek Vasut
58bcadd9d0 mxs: Silence elftosb
The elftosb tool is now called with -d switch, which produces debug
output to the stdout. The debug output is completely useless for
regular operation, so silence it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-04 09:06:29 +01:00
Marek Vasut
893aabbead mx28: Rename regs-power.h to regs-power-mx28.h
The i.MX23 has different register layout and bit placement in the
power supply. Thus, in order to be able to add support for MX23,
rename the MX28's regs-power.h to regs-power-mx28.h . Moreover,
add ifdef around inclusion of regs-*-mx28.h in imx-regs.h so the
MX23 boards will include proper set of registers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-12-04 09:01:04 +01:00
Marek Vasut
3642b1c147 mx28: Remove SET, CLR, TOG ops from PLLxCTRL1 registers
These registers don't have _SET, _CLR and _TOG at the respective offsets
available, these registers has to be toggled via R-M-W if needed. Thus do
not export these offsets anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2012-12-04 08:52:05 +01:00
Tom Rini
ce12a8c1a9 Merge branch 'master' of git://git.denx.de/u-boot-x86 2012-12-03 06:47:05 -07:00
Stefan Reinauer
339c511106 x86: Don't spam POST80 codes with slow IO functions
This patch prevents u-boot from "spamming" random progress codes on
a port 80 "post card".
The previous version of this patch just removed the delays in the "slow"
IO functions, as they do not need to be slow, however, this patch is
less intrusive.

It uses another unused port that is often used by BIOSes (and the Linux
Kernel) for small delay timing purposes.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Simon Glass
a78d49473c x86: Define CONFIG_SYS_VSNPRINTF for coreboot
This option protects the printf() functions from overflow.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Stefan Reinauer
5b1be1bd01 x86: Fix typo in pcat_timer.c
Fix a small comment typo.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Gabe Black
687c108b10 x86: Include types.h explicitly in the i386 version of io.h
The i386 version of io.h depends on the phys_addr_t type which is defined in
types.h. It wasn't including that explicitly, and was working presumably
because the other files including it had already included types.h themselves
directly or indirectly. This change fixes that.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Gabe Black
452b80ef8c x86: Add a dummy implementation for timer_get_us
The microsecond timer is not currently implemented, but add a dummy
implementation for now.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:05 -08:00
Gabe Black
f30fc4de41 x86: Add a default implementation for cleanup_before_linux()
This function provides an opportunity for some last minute cleanup and
reconfiguration before control is handed over to Linux. It's possible this
may need to do something in the future, but for now it's left empty. It's set
up as a weak symbol so it can be overridden if necessary on a case by case
basis.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Gabe Black
9ad4736e32 x86: Add a minimal device tree for alex x86
The device tree now includes the necessary console configuration
information.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Gabe Black
028a56289a x86: Add an fdt pointer to the global data structure
This change adds a pointer to the global data structure in x86 to point to
the device tree. This mirrors an identical pointer in ARM.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Stefan Reinauer
17c40ad963 x86: video: Add coreboot framebuffer support
Add a basic driver for the coreboot framebuffer.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Simon Glass
893db5956e x86: Remove coreboot start16 code
This file is no longer needed for coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Gabe Black
5b5ece9ef4 x86: Allow compiling out realmode/bios code
We don't want this for coreboot, so provide a way of compiling it out.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:04 -08:00
Simon Glass
420a2ca73f x86: Select stdio devices for coreboot
We want to support VGA, serial, USB keyboard and the Coreboot memory
console buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Vadim Bendebury
b012bc94ac x86: Add console command to display CBMEM console buffer
This command is useful to allow to observe messages generated by
coreboot and u-boot until present. In particular it is handy when
u-boot is instrumented to fall through into console mode on startup
errors.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Vadim Bendebury
98ab435f73 x86: Add CBMEM console driver for coreboot
This patch builds upon the recently introduced CBMEM console
feature of coreboot.

CBMEM console uses a memry area allocated by coreboot to store
the console output. The memory area has a certain structure,
which allows to determine where the buffer is, the buffer size
and the location of the pointer in the buffer. This allows
different phases of the firmware (rom based coreboot, ram based
coreboot, u-boot after relocation with this change) to keep
adding text to the same buffer.

Note that this patch introduces a new console driver and adds the
driver to the list of drivers to be used for console output, i.e.
it engages only after u-boot relocates. Usiong CBMEM console for
capturing the pre-relocation console output will be done under a
separate change.

>From Linux, run the cbmem.py utility (which is a part of the coreboot
package) to see the output, e.g.:

vvvvvvvvvvvvvvvvv
SCSI:  AHCI 0001.0300 32 slots 6 ports ? Gbps 0xf impl SATA mode
flags: 64bit ilck stag led pmp pio
...
Magic signature found
Kernel command line: "cros_secure  quiet loglevel=1 console=tty2...
^^^^^^^^^^^^^^^^^

Note that the entire u-boot output fits into the buffer only if
the coreboot log level is reduced from the most verbose. Ether
the buffer size will have to be increased, or the coreboot
verbosity permanently reduced.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Simon Glass
402ed0048a x86: coreboot: Decode additional coreboot sysinfo tags
Add support for decoding tags for GPIOs, compile/build info, cbmem and
other features.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Stefan Reinauer
93c1735f41 x86: coreboot: Drop sysinfo.c
sysinfo.c only contains the lib_sysinfo data structure which
is used/filled by tables.c. This split was introduced by importing
code from libpayload originally, but to keep the code simple, add
the single line of actual code to tables.c

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Tom Rini
b04eb342af Merge branch 'master' of git://git.denx.de/u-boot-sh 2012-11-30 07:15:27 -07:00
Nobuhiro Iwamatsu
f3269ad4e8 include/linux/byteorder: Always defines __fswab64, __swab64p and __swab64s
When __BYTEORDER_HAS_U64__ is not defined, we got warning following:

-----
/tmp/include/linux/byteorder/little_endian.h: In function ‘__cpu_to_be64p’:
/tmp/include/linux/byteorder/little_endian.h:71:2: warning: implicit declaration of function ‘__swab64p’
		[-Wimplicit-function-declaration]
-----

Usually, __arch__swab64* required for __fswab64,  __swab64p and __swab64s
is defined.  Therefore, __BYTEORDER_HAS_U64__ is unnecessary.
This removes __BYTEORDER_HAS_U64__.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Kim Phillips <kim.phillips@freescale.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-30 07:15:04 -07:00
Tetsuyuki Kobayashi
7c791b3f0a serial: serial_sh: bugfix: autoboot fails if serial console is not connected
On kzm9g board (rmobile SoC), autoboot fails if serial console cable is not
connected.  When serial cable is not connected, serial error occurs and
some garbage comes in data register.
sh_serial_tstc() in serial_sh.c does not check error status and misunderstand
there is some input data.  It is the reason that autoboot fails.
This patch adds checking error status in sh_serial_tstc().

This patch is based on v2013.01-rc1 tag of u-boot master git.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-11-30 15:06:05 +09:00
Yoshihiro Shimoda
867da0d4fe sh: fix trigger_address_error()
The function should set BL bit, but it should not clear other flags.
So, the patch uses set_bl_bit() instead of a local asm code.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-11-30 15:06:04 +09:00
Tom Rini
b8715d8def Merge branch 'master' of git://git.denx.de/u-boot-fdt 2012-11-29 06:41:56 -07:00
Simon Glass
f39612d360 fdt: Correct global_data condition in main
We need an extra condition here in case we want to use fdt without the
silent console/cmdline editing/post options. It is easier to just remove
the #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 19:26:49 -05:00
Tom Rini
e57d9d15ee Merge branch 'master' of git://www.denx.de/git/u-boot-x86 2012-11-28 13:44:40 -07:00
Simon Glass
d02a568e9a x86: coreboot: Enable LPC TPM
Coreboot boards have an LPC TPM connected, so enable this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-28 11:40:05 -08:00