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mx28: Remove SET, CLR, TOG ops from PLLxCTRL1 registers

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These registers don't have _SET, _CLR and _TOG at the respective offsets
available, these registers has to be toggled via R-M-W if needed. Thus do
not export these offsets anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
This commit is contained in:
Marek Vasut 2012-11-24 14:03:21 +00:00 committed by Stefano Babic
parent 1d4fd0dc3b
commit 3642b1c147
1 changed files with 4 additions and 2 deletions
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6
arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
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@ -31,9 +31,11 @@
#ifndef __ASSEMBLY__
struct mxs_clkctrl_regs {
mxs_reg_32(hw_clkctrl_pll0ctrl0) /* 0x00 */
mxs_reg_32(hw_clkctrl_pll0ctrl1) /* 0x10 */
uint32_t hw_clkctrl_pll0ctrl1; /* 0x10 */
uint32_t reserved_pll0ctrl1[3]; /* 0x14-0x1c */
mxs_reg_32(hw_clkctrl_pll1ctrl0) /* 0x20 */
mxs_reg_32(hw_clkctrl_pll1ctrl1) /* 0x30 */
uint32_t hw_clkctrl_pll1ctrl1; /* 0x30 */
uint32_t reserved_pll1ctrl1[3]; /* 0x34-0x3c */
mxs_reg_32(hw_clkctrl_pll2ctrl0) /* 0x40 */
mxs_reg_32(hw_clkctrl_cpu) /* 0x50 */
mxs_reg_32(hw_clkctrl_hbus) /* 0x60 */