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Merge branch 'master' of git://git.denx.de/u-boot-x86

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This commit is contained in:
Tom Rini 2012-12-03 06:47:05 -07:00
commit ce12a8c1a9
26 changed files with 460 additions and 112 deletions
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6
README
View file

@ -3668,6 +3668,12 @@ Low Level (hardware related) configuration options:
If defined, the x86 reset vector code is excluded. You will need
to do this when U-Boot is running from Coreboot.
- CONFIG_X86_NO_REAL_MODE
If defined, x86 real mode code is omitted. This assumes a
32-bit environment where such code is not needed. You will
need to do this when U-Boot is running from Coreboot.
Freescale QE/FMAN Firmware Support:
-----------------------------------

2
arch/x86/cpu/Makefile
View file

@ -30,7 +30,7 @@ LIB = $(obj)lib$(CPU).o
START-y = start.o
RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += resetvec.o start16.o
COBJS = interrupts.o cpu.o
COBJS = interrupts.o cpu.o timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))

1
arch/x86/cpu/coreboot/Makefile
View file

@ -37,7 +37,6 @@ COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o
COBJS-$(CONFIG_PCI) += pci.o
SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o

39
arch/x86/cpu/coreboot/sysinfo.c
View file

@ -1,39 +0,0 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2009 coresystems GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <asm/arch-coreboot/sysinfo.h>
/*
* This needs to be in the .data section so that it's copied over during
* relocation. By default it's put in the .bss section which is simply filled
* with zeroes when transitioning from "ROM", which is really RAM, to other
* RAM.
*/
struct sysinfo_t lib_sysinfo __attribute__((section(".data")));

117
arch/x86/cpu/coreboot/tables.c
View file

@ -28,10 +28,19 @@
* SUCH DAMAGE.
*/
#include <common.h>
#include <asm/arch-coreboot/ipchecksum.h>
#include <asm/arch-coreboot/sysinfo.h>
#include <asm/arch-coreboot/tables.h>
/*
* This needs to be in the .data section so that it's copied over during
* relocation. By default it's put in the .bss section which is simply filled
* with zeroes when transitioning from "ROM", which is really RAM, to other
* RAM.
*/
struct sysinfo_t lib_sysinfo __attribute__((section(".data")));
/*
* Some of this is x86 specific, and the rest of it is generic. Right now,
* since we only support x86, we'll avoid trying to make lots of infrastructure
@ -72,22 +81,45 @@ static void cb_parse_memory(unsigned char *ptr, struct sysinfo_t *info)
static void cb_parse_serial(unsigned char *ptr, struct sysinfo_t *info)
{
struct cb_serial *ser = (struct cb_serial *)ptr;
if (ser->type != CB_SERIAL_TYPE_IO_MAPPED)
return;
info->ser_ioport = ser->baseaddr;
info->serial = ser;
}
static void cb_parse_optiontable(unsigned char *ptr, struct sysinfo_t *info)
static void cb_parse_vbnv(unsigned char *ptr, struct sysinfo_t *info)
{
info->option_table = (struct cb_cmos_option_table *)ptr;
struct cb_vbnv *vbnv = (struct cb_vbnv *)ptr;
info->vbnv_start = vbnv->vbnv_start;
info->vbnv_size = vbnv->vbnv_size;
}
static void cb_parse_checksum(unsigned char *ptr, struct sysinfo_t *info)
static void cb_parse_gpios(unsigned char *ptr, struct sysinfo_t *info)
{
struct cb_cmos_checksum *cmos_cksum = (struct cb_cmos_checksum *)ptr;
info->cmos_range_start = cmos_cksum->range_start;
info->cmos_range_end = cmos_cksum->range_end;
info->cmos_checksum_location = cmos_cksum->location;
int i;
struct cb_gpios *gpios = (struct cb_gpios *)ptr;
info->num_gpios = (gpios->count < SYSINFO_MAX_GPIOS) ?
(gpios->count) : SYSINFO_MAX_GPIOS;
for (i = 0; i < info->num_gpios; i++)
info->gpios[i] = gpios->gpios[i];
}
static void cb_parse_vdat(unsigned char *ptr, struct sysinfo_t *info)
{
struct cb_vdat *vdat = (struct cb_vdat *) ptr;
info->vdat_addr = vdat->vdat_addr;
info->vdat_size = vdat->vdat_size;
}
static void cb_parse_tstamp(unsigned char *ptr, struct sysinfo_t *info)
{
info->tstamp_table = ((struct cb_cbmem_tab *)ptr)->cbmem_tab;
}
static void cb_parse_cbmem_cons(unsigned char *ptr, struct sysinfo_t *info)
{
info->cbmem_cons = ((struct cb_cbmem_tab *)ptr)->cbmem_tab;
}
static void cb_parse_framebuffer(unsigned char *ptr, struct sysinfo_t *info)
@ -95,6 +127,11 @@ static void cb_parse_framebuffer(unsigned char *ptr, struct sysinfo_t *info)
info->framebuffer = (struct cb_framebuffer *)ptr;
}
static void cb_parse_string(unsigned char *ptr, char **info)
{
*info = (char *)((struct cb_string *)ptr)->string;
}
static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
{
struct cb_header *header;
@ -125,6 +162,9 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
/* Now, walk the tables. */
ptr += header->header_bytes;
/* Inintialize some fields to sentinel values. */
info->vbnv_start = info->vbnv_size = (uint32_t)(-1);
for (i = 0; i < header->table_entries; i++) {
struct cb_record *rec = (struct cb_record *)ptr;
@ -142,11 +182,35 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_SERIAL:
cb_parse_serial(ptr, info);
break;
case CB_TAG_CMOS_OPTION_TABLE:
cb_parse_optiontable(ptr, info);
case CB_TAG_VERSION:
cb_parse_string(ptr, &info->version);
break;
case CB_TAG_OPTION_CHECKSUM:
cb_parse_checksum(ptr, info);
case CB_TAG_EXTRA_VERSION:
cb_parse_string(ptr, &info->extra_version);
break;
case CB_TAG_BUILD:
cb_parse_string(ptr, &info->build);
break;
case CB_TAG_COMPILE_TIME:
cb_parse_string(ptr, &info->compile_time);
break;
case CB_TAG_COMPILE_BY:
cb_parse_string(ptr, &info->compile_by);
break;
case CB_TAG_COMPILE_HOST:
cb_parse_string(ptr, &info->compile_host);
break;
case CB_TAG_COMPILE_DOMAIN:
cb_parse_string(ptr, &info->compile_domain);
break;
case CB_TAG_COMPILER:
cb_parse_string(ptr, &info->compiler);
break;
case CB_TAG_LINKER:
cb_parse_string(ptr, &info->linker);
break;
case CB_TAG_ASSEMBLER:
cb_parse_string(ptr, &info->assembler);
break;
/*
* FIXME we should warn on serial if coreboot set up a
@ -155,6 +219,21 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_FRAMEBUFFER:
cb_parse_framebuffer(ptr, info);
break;
case CB_TAG_GPIO:
cb_parse_gpios(ptr, info);
break;
case CB_TAG_VDAT:
cb_parse_vdat(ptr, info);
break;
case CB_TAG_TIMESTAMPS:
cb_parse_tstamp(ptr, info);
break;
case CB_TAG_CBMEM_CONSOLE:
cb_parse_cbmem_cons(ptr, info);
break;
case CB_TAG_VBNV:
cb_parse_vbnv(ptr, info);
break;
}
ptr += rec->size;
@ -166,18 +245,12 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
/* == Architecture specific == */
/* This is the x86 specific stuff. */
/* Assume no translation or that memory is identity mapped. */
static void *phys_to_virt(unsigned long virt)
{
return (void *)(uintptr_t)virt;
}
int get_coreboot_info(struct sysinfo_t *info)
{
int ret = cb_parse_header(phys_to_virt(0x00000000), 0x1000, info);
int ret = cb_parse_header((void *)0x00000000, 0x1000, info);
if (ret != 1)
ret = cb_parse_header(phys_to_virt(0x000f0000), 0x1000, info);
ret = cb_parse_header((void *)0x000f0000, 0x1000, info);
return (ret == 1) ? 0 : -1;
}

5
arch/x86/cpu/cpu.c
View file

@ -115,6 +115,11 @@ void setup_gdt(gd_t *id, u64 *gdt_addr)
load_fs(X86_GDT_ENTRY_32BIT_FS);
}
int __weak x86_cleanup_before_linux(void)
{
return 0;
}
int x86_cpu_init_f(void)
{
const u32 em_rst = ~X86_CR0_EM;

17
arch/x86/cpu/timer.c Normal file
View file

@ -0,0 +1,17 @@
/*
* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*/
#include <common.h>
unsigned long timer_get_us(void)
{
printf("timer_get_us used but not implemented.\n");
return 0;
}

34
arch/x86/include/asm/arch-coreboot/sysinfo.h
View file

@ -30,32 +30,52 @@
#ifndef _COREBOOT_SYSINFO_H
#define _COREBOOT_SYSINFO_H
#include <common.h>
#include <compiler.h>
#include <fdt.h>
#include <asm/arch/tables.h>
/* Allow a maximum of 16 memory range definitions. */
#define SYSINFO_MAX_MEM_RANGES 16
/* Allow a maximum of 8 GPIOs */
#define SYSINFO_MAX_GPIOS 8
struct sysinfo_t {
unsigned int cpu_khz;
unsigned short ser_ioport;
unsigned long ser_base; /* for mmapped serial */
int n_memranges;
struct memrange {
unsigned long long base;
unsigned long long size;
unsigned int type;
} memrange[SYSINFO_MAX_MEM_RANGES];
struct cb_cmos_option_table *option_table;
u32 cmos_range_start;
u32 cmos_range_end;
u32 cmos_checksum_location;
u32 vbnv_start;
u32 vbnv_size;
char *version;
char *extra_version;
char *build;
char *compile_time;
char *compile_by;
char *compile_host;
char *compile_domain;
char *compiler;
char *linker;
char *assembler;
struct cb_framebuffer *framebuffer;
unsigned long *mbtable; /** Pointer to the multiboot table */
int num_gpios;
struct cb_gpio gpios[SYSINFO_MAX_GPIOS];
void *vdat_addr;
u32 vdat_size;
void *tstamp_table;
void *cbmem_cons;
struct cb_serial *serial;
};
extern struct sysinfo_t lib_sysinfo;

74
arch/x86/include/asm/arch-coreboot/tables.h
View file

@ -164,6 +164,55 @@ struct cb_framebuffer {
u8 reserved_mask_size;
};
#define CB_TAG_GPIO 0x0013
#define GPIO_MAX_NAME_LENGTH 16
struct cb_gpio {
u32 port;
u32 polarity;
u32 value;
u8 name[GPIO_MAX_NAME_LENGTH];
};
struct cb_gpios {
u32 tag;
u32 size;
u32 count;
struct cb_gpio gpios[0];
};
#define CB_TAG_FDT 0x0014
struct cb_fdt {
uint32_t tag;
uint32_t size; /* size of the entire entry */
/* the actual FDT gets placed here */
};
#define CB_TAG_VDAT 0x0015
struct cb_vdat {
uint32_t tag;
uint32_t size; /* size of the entire entry */
void *vdat_addr;
uint32_t vdat_size;
};
#define CB_TAG_TIMESTAMPS 0x0016
#define CB_TAG_CBMEM_CONSOLE 0x0017
#define CB_TAG_MRC_CACHE 0x0018
struct cb_cbmem_tab {
uint32_t tag;
uint32_t size;
void *cbmem_tab;
};
#define CB_TAG_VBNV 0x0019
struct cb_vbnv {
uint32_t tag;
uint32_t size;
uint32_t vbnv_start;
uint32_t vbnv_size;
};
#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
struct cb_cmos_option_table {
u32 tag;
@ -238,4 +287,29 @@ struct sysinfo_t;
int get_coreboot_info(struct sysinfo_t *info);
#define CBMEM_TOC_RESERVED 512
#define MAX_CBMEM_ENTRIES 16
#define CBMEM_MAGIC 0x434f5245
struct cbmem_entry {
u32 magic;
u32 id;
u64 base;
u64 size;
} __packed;
#define CBMEM_ID_FREESPACE 0x46524545
#define CBMEM_ID_GDT 0x4c474454
#define CBMEM_ID_ACPI 0x41435049
#define CBMEM_ID_CBTABLE 0x43425442
#define CBMEM_ID_PIRQ 0x49525154
#define CBMEM_ID_MPTABLE 0x534d5054
#define CBMEM_ID_RESUME 0x5245534d
#define CBMEM_ID_RESUME_SCRATCH 0x52455343
#define CBMEM_ID_SMBIOS 0x534d4254
#define CBMEM_ID_TIMESTAMP 0x54494d45
#define CBMEM_ID_MRCDATA 0x4d524344
#define CBMEM_ID_CONSOLE 0x434f4e53
#define CBMEM_ID_NONE 0x00000000
#endif

1
arch/x86/include/asm/global_data.h
View file

@ -58,6 +58,7 @@ struct global_data {
unsigned long gdt_addr; /* Location of GDT */
phys_size_t ram_size; /* RAM size */
unsigned long reset_status; /* reset status register at boot */
const void *fdt_blob; /* Our device tree, NULL if none */
void **jt; /* jump table */
char env_buf[32]; /* buffer for getenv() before reloc. */
};

4
arch/x86/include/asm/io.h
View file

@ -36,6 +36,8 @@
#define IO_SPACE_LIMIT 0xffff
#include <asm/types.h>
#ifdef __KERNEL__
@ -135,7 +137,7 @@ out:
#ifdef SLOW_IO_BY_JUMPING
#define __SLOW_DOWN_IO "\njmp 1f\n1:\tjmp 1f\n1:"
#else
#define __SLOW_DOWN_IO "\noutb %%al,$0x80"
#define __SLOW_DOWN_IO "\noutb %%al,$0xed"
#endif
#ifdef REALLY_SLOW_IO

1
arch/x86/include/asm/u-boot-x86.h
View file

@ -40,6 +40,7 @@ int cpu_init_f(void);
void init_gd(gd_t *id, u64 *gdt_addr);
void setup_gdt(gd_t *id, u64 *gdt_addr);
int init_cache(void);
int cleanup_before_linux(void);
/* cpu/.../timer.c */
void timer_isr(void *);

9
arch/x86/lib/Makefile
View file

@ -25,11 +25,16 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(ARCH).o
ifeq ($(CONFIG_X86_NO_REAL_MODE),)
SOBJS-$(CONFIG_SYS_PC_BIOS) += bios.o
SOBJS-$(CONFIG_SYS_PCI_BIOS) += bios_pci.o
SOBJS-$(CONFIG_SYS_X86_REALMODE) += realmode_switch.o
COBJS-y += realmode.o
SOBJS-y += realmode_switch.o
COBJS-$(CONFIG_SYS_PC_BIOS) += bios_setup.o
COBJS-$(CONFIG_VIDEO) += video_bios.o
endif
COBJS-y += board.o
COBJS-y += bootm.o
COBJS-y += cmd_boot.o
@ -41,11 +46,9 @@ COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o
COBJS-$(CONFIG_PCI) += pci.o
COBJS-$(CONFIG_PCI) += pci_type1.o
COBJS-$(CONFIG_SYS_X86_REALMODE) += realmode.o
COBJS-y += relocate.o
COBJS-y += string.o
COBJS-$(CONFIG_SYS_X86_ISR_TIMER) += timer.o
COBJS-$(CONFIG_VIDEO) += video_bios.o
COBJS-$(CONFIG_VIDEO) += video.o
COBJS-$(CONFIG_CMD_ZBOOT) += zimage.o

2
arch/x86/lib/pcat_timer.c
View file

@ -39,7 +39,7 @@ int timer_init(void)
* Timer 0 is used to increment system_tick 1000 times/sec
* Timer 1 was used for DRAM refresh in early PC's
* Timer 2 is used to drive the speaker
* (to stasrt a beep: write 3 to port 0x61,
* (to start a beep: write 3 to port 0x61,
* to stop it again: write 0)
*/
outb(PIT_CMD_CTR0 | PIT_CMD_BOTH | PIT_CMD_MODE2,

2
arch/x86/lib/video.c
View file

@ -222,8 +222,10 @@ int video_init(void)
int drv_video_init(void)
{
#ifndef CONFIG_X86_NO_REAL_MODE
if (video_bios_init())
return 1;
#endif
return video_init();
}

4
arch/x86/lib/zimage.c
View file

@ -171,7 +171,7 @@ struct boot_params *load_zimage(char *image, unsigned long kernel_size,
else
*load_address = (void *)ZIMAGE_LOAD_ADDR;
#if defined CONFIG_ZBOOT_32
#if (defined CONFIG_ZBOOT_32 || defined CONFIG_X86_NO_REAL_MODE)
printf("Building boot_params at 0x%8.8lx\n", (ulong)setup_base);
memset(setup_base, 0, sizeof(*setup_base));
setup_base->hdr = params->hdr;
@ -237,7 +237,7 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot,
struct setup_header *hdr = &setup_base->hdr;
int bootproto = get_boot_protocol(hdr);
#if defined CONFIG_ZBOOT_32
#if (defined CONFIG_ZBOOT_32 || defined CONFIG_X86_NO_REAL_MODE)
setup_base->e820_entries = install_e820_map(
ARRAY_SIZE(setup_base->e820_map), setup_base->e820_map);
#endif

1
board/chromebook-x86/coreboot/Makefile
View file

@ -32,7 +32,6 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
SOBJS-y += coreboot_start16.o
SOBJS-y += coreboot_start.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)

33
board/chromebook-x86/coreboot/coreboot_start16.S
View file

@ -1,33 +0,0 @@
/*
* Copyright (c) 2011 The Chromium OS Authors.
* (C) Copyright 2008
* Graeme Russ, graeme.russ@gmail.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
.section .bios, "ax"
.code16
.globl realmode_reset
.hidden realmode_reset
.type realmode_reset, @function
realmode_reset:
1: hlt
jmp 1

30
board/chromebook-x86/dts/x86-alex.dts Normal file
View file

@ -0,0 +1,30 @@
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Google Alex";
compatible = "google,alex", "intel,atom-pineview";
config {
silent_console = <0>;
};
aliases {
console = "/serial@e0401000";
};
serial@e0401000 {
compatible = "ns16550";
reg = <0xe0401000 0x40>;
id = <1>;
reg-shift = <1>;
baudrate = <115200>;
clock-frequency = <4000000>;
multiplier = <1>;
status = "ok";
};
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
};

4
common/stdio.c
View file

@ -237,6 +237,8 @@ int stdio_init (void)
#ifdef CONFIG_JTAG_CONSOLE
drv_jtag_console_init ();
#endif
#ifdef CONFIG_CBMEM_CONSOLE
cbmemc_init();
#endif
return (0);
}

1
drivers/misc/Makefile
View file

@ -27,6 +27,7 @@ LIB := $(obj)libmisc.o
COBJS-$(CONFIG_ALI152X) += ali512x.o
COBJS-$(CONFIG_DS4510) += ds4510.o
COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
COBJS-$(CONFIG_NS87308) += ns87308.o

67
drivers/misc/cbmem_console.c Normal file
View file

@ -0,0 +1,67 @@
/*
* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
*/
#include <common.h>
#ifndef CONFIG_SYS_COREBOOT
#error This driver requires coreboot
#endif
#include <asm/arch/sysinfo.h>
struct cbmem_console {
u32 buffer_size;
u32 buffer_cursor;
u8 buffer_body[0];
} __attribute__ ((__packed__));
static struct cbmem_console *cbmem_console_p;
void cbmemc_putc(char data)
{
int cursor;
cursor = cbmem_console_p->buffer_cursor++;
if (cursor < cbmem_console_p->buffer_size)
cbmem_console_p->buffer_body[cursor] = data;
}
void cbmemc_puts(const char *str)
{
char c;
while ((c = *str++) != 0)
cbmemc_putc(c);
}
int cbmemc_init(void)
{
int rc;
struct stdio_dev cons_dev;
cbmem_console_p = lib_sysinfo.cbmem_cons;
memset(&cons_dev, 0, sizeof(cons_dev));
strcpy(cons_dev.name, "cbmem");
cons_dev.flags = DEV_FLAGS_OUTPUT; /* Output only */
cons_dev.putc = cbmemc_putc;
cons_dev.puts = cbmemc_puts;
rc = stdio_register(&cons_dev);
return (rc == 0) ? 1 : rc;
}

1
drivers/video/Makefile
View file

@ -39,6 +39,7 @@ COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o
COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
COBJS-$(CONFIG_SED156X) += sed156x.o
COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
COBJS-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o
COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
COBJS-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o

101
drivers/video/coreboot_fb.c Normal file
View file

@ -0,0 +1,101 @@
/*
* coreboot Framebuffer driver.
*
* Copyright (C) 2011 The Chromium OS authors
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/tables.h>
#include <asm/arch/sysinfo.h>
#include <video_fb.h>
#include "videomodes.h"
/*
* The Graphic Device
*/
GraphicDevice ctfb;
static int parse_coreboot_table_fb(GraphicDevice *gdev)
{
struct cb_framebuffer *fb = lib_sysinfo.framebuffer;
/* If there is no framebuffer structure, bail out and keep
* running on the serial console.
*/
if (!fb)
return 0;
gdev->winSizeX = fb->x_resolution;
gdev->winSizeY = fb->y_resolution;
gdev->plnSizeX = fb->x_resolution;
gdev->plnSizeY = fb->y_resolution;
gdev->gdfBytesPP = fb->bits_per_pixel / 8;
switch (fb->bits_per_pixel) {
case 24:
gdev->gdfIndex = GDF_32BIT_X888RGB;
break;
case 16:
gdev->gdfIndex = GDF_16BIT_565RGB;
break;
default:
gdev->gdfIndex = GDF__8BIT_INDEX;
break;
}
gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
gdev->pciBase = (unsigned int)fb->physical_address;
gdev->frameAdrs = (unsigned int)fb->physical_address;
gdev->memSize = fb->bytes_per_line * fb->y_resolution;
gdev->vprBase = (unsigned int)fb->physical_address;
gdev->cprBase = (unsigned int)fb->physical_address;
return 1;
}
void *video_hw_init(void)
{
GraphicDevice *gdev = &ctfb;
int bits_per_pixel;
printf("Video: ");
if (!parse_coreboot_table_fb(gdev)) {
printf("No video mode configured in coreboot!\n");
return NULL;
}
bits_per_pixel = gdev->gdfBytesPP * 8;
/* fill in Graphic device struct */
sprintf(gdev->modeIdent, "%dx%dx%d", gdev->winSizeX, gdev->winSizeY,
bits_per_pixel);
printf("%s\n", gdev->modeIdent);
memset((void *)gdev->pciBase, 0,
gdev->winSizeX * gdev->winSizeY * gdev->gdfBytesPP);
return (void *)gdev;
}

13
include/configs/coreboot.h
View file

@ -38,6 +38,7 @@
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_LAST_STAGE_INIT
#define CONFIG_X86_NO_RESET_VECTOR
#define CONFIG_SYS_VSNPRINTF
/*-----------------------------------------------------------------------
* Watchdog Configuration
@ -92,6 +93,15 @@
#define CONFIG_SYS_NS16550_COM2 UART1_BASE
#define CONFIG_SYS_NS16550_PORT_MAPPED
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \
"stdout=vga,eserial0,cbmem\0" \
"stderr=vga,eserial0,cbmem\0"
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_STDIO_DEREGISTER
#define CONFIG_CBMEM_CONSOLE
/* max. 1 IDE bus */
#define CONFIG_SYS_IDE_MAXBUS 1
/* max. 1 drive per IDE bus */
@ -243,4 +253,7 @@
*/
#define CONFIG_PCI
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_STD_DEVICES_SETTINGS
#endif /* __CONFIG_H */

3
include/stdio_dev.h
View file

@ -120,5 +120,8 @@ int drv_nc_init (void);
#ifdef CONFIG_JTAG_CONSOLE
int drv_jtag_console_init (void);
#endif
#ifdef CONFIG_CBMEM_CONSOLE
int cbmemc_init(void);
#endif
#endif