- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
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Merge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
Update Patrick and my email address with the one dedicated to
upstream activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition
Voids the need to set such partition as bootable to work with the
'dev:auto' tuple
Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
threshold configuration (Joshua)
Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.
This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Add Luka Perkov to Puzzle-M801 BOARD MAINTAINERS.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Add implementation of board_mem_get_layout for overriding the memory
layout.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].
Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM: 2 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In: serial@5a070000
Out: serial@5a070000
Err: serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net: eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot: 0
Functionality wise the following is known to be working:
- eMMC and MMC/SD card
- Ethernet (*)
- GPIOs
- I2C
Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.
* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.
[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Implement board_phys_sdram_size() to automatically detect Verdin iMX8M
Mini DualLite 1GB vs. Verdin iMX8M Mini Quad 2GB.
Note: This only works if we keep using similar RAM chips!
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Now with them first Verdin iMX8M Mini DualLite modules in for bring-up
we got clarity how is_cpu_type() actually behaves.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Enable PCA9450 i2c level translator, as this is used for the
on module ADC.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
And select the correct devicetree accordingly by setting the variant
environment variable.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
V1.1A HW switched the PMIC from BD71837 to PCA9450.
- Disable combined DVS in PCA9450_BUCK123_DVS.
- Increase DDR Voltage to 0.95V as we use a 1.5GHz RAM.
- Configure WDOG_B behaviour.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
add the dts file to the MAINTAINERS entry
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Set `bootcause' from b850v3 power management watchdog status.
Boot cause "REVERT" is no longer used, remove it.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Use VPD product ID instead of confidx, so that we can easily reuse the
product ID defines and avoid some magic numbers.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Remove pinmux defines, that are no longer used after
converting the code to devicetree.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Commit f692b479f0 changed the VPD partition name from "vpd" to
"vpd@0". Fix the VPD reader code to use the new name, so that
the VPD code keeps working.
Fixes: f692b479f0 ("i2c: eeprom: Use reg property instead of offset and size")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Removed aristainetos2, 2b, 2b-csl. This boards have been
recalled and destroyed.
Adapt board code to remove stuff not needed anymore.
Fix checkpatch warning, remove fdt_high and initrd_high
from default environment.
Signed-off-by: Heiko Schocher <hs@denx.de>
zu remove
Use gpio_early_init_uart() function to disable RS232 serial transceiver
ForceOFF# pins on Iris.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Avoid UART input from floating RX pins on UARTB and UARTC (Colibri T30)
and UARTB, UARTC and UARTD (Apalis T30).
Note: Floating pins may cause spurious break conditions potentially
interrupting U-Boot's autoboot.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Fix SPI1 and UART2/3 resp. UARTB/C pinmuxing.
Note: The former was illegally muxing multiple SoC balls onto the same
internal SoC signal which caused rather strange behaviour regarding
the RS232 serial transceiver ForceOFF# pins as available on Iris.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add pinmuxing comment stating that TRISTATE means the output driver is
tri-stated and INPUT means the input driver is enabled vs. OUTPUT where
it is disabled.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Update kernel load address for FIT examples to avoid relocation:
- Kernel example uses Image.gz with U-Boot gzip decompression
at final kernel location 0x0xC0008000.
- Copro example loads zImage at a correct location (0xC4000000),
to avoid zImage relocation before decompression by kernel code.
An other solution to avoid zImage relocation is to align
the kernel load and entry address with the real location in FIT
(the relocation of zImage is skipped in U-Boot bootm command for
identical address) but it is less flexible because this offset
depends on FIT content:
For example:
## Loading kernel from FIT Image at c2000000 ...
Using 'ev1' configuration
Trying 'kernel' kernel subimage
Description: Linux kernel
Created: 2020-10-22 9:08:32 UTC
Type: Kernel Image
Compression: uncompressed
Data Start: 0xc20000cc
The kernel offset in FIT is 0xCC in FIT and zImage is decompressed at
0xC0008000 by kernel code:
kernel {
description = "Linux kernel";
data = /incbin/("zImage");
type = "kernel";
arch = "arm";
os = "linux";
compression = "none";
load = <0xC20000cc>;
entry = <0xC20000cc>;
hash-1 {
algo = "sha1";
};
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Remove the update of the MTD partitions in kernel device tree
for serial boot (USB / UART), and the kernel will use the MTD
partitions define in the loaded DTB because U-Boot can't known the
expected flash layout in this case.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
If customs fields in board area are used it will likely go over allocated
space in struct fru_board_data. That's why calculate limit of this
structure to make sure that different data is not rewritten by accident.
When limit is reached stop to record fields.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
capture variable is bool which is just one byte and it is just causing
unaligned accesses. Better to have it as last entry in the structure.
It also simplify offset calculation for initial header copy.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to use this file anymore. Include it in main config file
and simplify logic based on it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Also change back SYS_MEMTEST_END to 0x00f00000. 0xe00000 was wrong and
introduced due to the global Kconfig migration of this option in u-boot.
CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Instead of using an hard coded address, make use of an
already defined address for importing the environment
for ramfs and nfs boot. This allows boards having different
mapping to use the same code.
CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Matteo Ghidoni <matteo.ghidoni@hitachi-powergrids.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Re-submitted because of missing description and signed-off.
flags reset in board_init caused bugs when executing command like editenv
because the reallocated flag was lost.
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Signed-off-by: Arnaud Aujon Chevallier <arnaud@intelibre.fr>
Allow attaching a virtual SATA disk to QEMU RISC-V by implying
AHCI, AHCI_PCI, CMD_SCSI, DM_SCSI, PCI_INIT_R, SCSI, SCSI_AHCI.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Sort implied options in BOARD_SPECIFIC_OPTIONS in the same sequence as in
.config.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
The reference design of Allwinner V3 series uses an
AXP203 or AXP209 PMIC attached to the I2C0 bus of the SoC, although the
first community-available V3s board, Lichee Pi Zero, omitted it.
Allow to introduce support for the PMIC on boards with it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The PinePhone is a smartphone produced by Pine64, with an A64 SoC,
2 or 3 GiB LPDDR3 RAM, 16 or 32 GiB eMMC, 720x1440 MIPI-DSI panel,
and Quectel EG25-G modem.
There are two main board revisions: 1.1 for early adopters, and 1.2
for mass production. Since there is code to detect the board revision
at boot, one config/image can support both boards.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE.
This meant that, regardless of the DT chosen by SPL (either by changing
the header in the image or by the selection code at runtime), Linux
always used the default DT.
By using the name from the SPL header (which, because of the previous
commit, always matches the DT used by U-Boot proper), Linux also sees
the same board as U-Boot/SPL, even if the boot script later loads a DT
from disk.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: remove no longer needed CONFIG_SPL_LOAD_FIT guards]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This overwrites the name loaded from the SPL image. It will be different
if there was previously no name provided, or if a more accurate name was
determined by the board variant selection logic. This means that the DT
name in the SPL header now always matches the DT appended to U-Boot.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: move function under CONFIG_SPL_LOAD_FIT guard]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
There are two different publicly-released revisions of the PinePhone
hardware, versions 1.1 and 1.2; and they need different device trees.
Since some GPIO pins were rerouted, we can use that to distinguish
between them.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Instead of using an entirely separate matching algorithm, simply update
the name of the DT we want to match. Enabling this logic does not depend
on the FIT config name, only on the initial guess of the board name.
Importantly, the initial guess must be "sun50i-a64-pine64-plus", because
otherwise the logic would trigger when "sun50i-a64-pine64-lts" was
written to the SPL header.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>