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verdin-imx8mm: spl: switch to pca9450 pmic
V1.1A HW switched the PMIC from BD71837 to PCA9450. - Disable combined DVS in PCA9450_BUCK123_DVS. - Increase DDR Voltage to 0.95V as we use a 1.5GHz RAM. - Configure WDOG_B behaviour. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
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caafc6c497
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2 changed files with 24 additions and 26 deletions
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@ -21,12 +21,16 @@
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#include <dm/uclass.h>
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#include <dm/uclass-internal.h>
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#include <hang.h>
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#include <i2c.h>
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#include <power/bd71837.h>
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#include <power/pca9450.h>
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#include <power/pmic.h>
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#include <spl.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define I2C_PMIC_BUS_ID 1
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int spl_board_boot_device(enum boot_device boot_dev_spl)
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{
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switch (boot_dev_spl) {
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@ -101,33 +105,27 @@ int power_init_board(void)
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struct udevice *dev;
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int ret;
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ret = pmic_get("pmic@4b", &dev);
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if (ret == -ENODEV) {
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puts("No pmic\n");
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if (IS_ENABLED(CONFIG_SPL_DM_PMIC_PCA9450)) {
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ret = pmic_get("pmic", &dev);
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if (ret == -ENODEV) {
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puts("No pmic found\n");
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return ret;
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}
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if (ret != 0)
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return ret;
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/* BUCKxOUT_DVS0/1 control BUCK123 output, clear PRESET_EN */
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pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
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/* increase VDD_DRAM to 0.975v for 1.5Ghz DDR */
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pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1c);
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/* set WDOG_B_CFG to cold reset */
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pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
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return 0;
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}
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if (ret != 0)
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return ret;
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/* decrease RESET key long push time from the default 10s to 10ms */
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pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0);
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/* unlock the PMIC regs */
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pmic_reg_write(dev, BD718XX_REGLOCK, 0x1);
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/* increase VDD_SOC to typical value 0.85v before first DRAM access */
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pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
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/* increase VDD_DRAM to 0.975v for 3Ghz DDR */
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pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
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#ifndef CONFIG_IMX8M_LPDDR4
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/* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
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pmic_reg_write(dev, BD718XX_4TH_NODVS_BUCK_VOLT, 0x28);
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#endif
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/* lock the PMIC regs */
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pmic_reg_write(dev, BD718XX_REGLOCK, 0x11);
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return 0;
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}
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@ -90,7 +90,7 @@ CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_IMX8M=y
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CONFIG_DM_PMIC=y
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CONFIG_SPL_DM_PMIC_BD71837=y
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CONFIG_SPL_DM_PMIC_PCA9450=y
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CONFIG_DM_PMIC_PFUZE100=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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