Commit graph

8 commits

Author SHA1 Message Date
Marek Vasut
8a4289ad72 drivers/mtd/nvmxip: Move sandbox_set_enable_memio() to test
The sandbox_set_enable_memio() should only ever be set during
sandbox testing, not within driver itself, move it back to test/ .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-30 17:56:21 -04:00
Marek Vasut
6539f71d1d drivers/mtd/nvmxip: Print phys_addr_t without warnings on both 32bit and 64bit systems
Cast the address such that it can be printed without warnings
on both 32bit and 64bit systems. This really should use some
better print formatter, but for the lack of it, do it this way.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-30 17:56:21 -04:00
Marek Vasut
16be2bc72e drivers/mtd/nvmxip: Rework the read accessor to support 32bit systems
Get rid of nvmxip_mmio_rawread() and just implement the readl()/readq()
reader loop within nvmxip_blk_read(). Cast the destination buffer as
needed and increment the read by either 4 or 8 bytes depending on if
this is systemd with 32bit or 64bit physical address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-30 17:56:21 -04:00
Marek Vasut
d223dcf31a drivers/mtd/nvmxip: Trigger post bind as probe on driver level
Perform all the block device creation only once, after the driver itself
successfully bound. Do not do this in uclass post bind, as this might be
triggered multiple times. For example the ut_dm_host test triggers this
and triggers a memory leak that way, since there are now multiple block
devices created using the blk_create_devicef() .

To retain the old probe-on-boot behavior, set DM_FLAG_PROBE_AFTER_BIND
flag in uclass post_bind callback, so the driver model would probe the
driver at the right time.

Rename the function as well, to match similar functions in
other block-related subsystems, like the mmc one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-30 17:56:21 -04:00
Rui Miguel Silva
dc3abd8006 nvmxip: move header to include
Move header to include to allow external code
to get the internal bdev structures to access
block device operations.

as at it, just add the UCLASS_NVMXIP string
so we get the correct output in partitions
listing.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19 14:34:16 -04:00
Abdellatif El Khlifi
cc89b7cf41 sandbox64: add support for NVMXIP QSPI
enable NVMXIP QSPI for sandbox 64-bit

Adding two NVM XIP QSPI storage devices.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-27 17:01:14 -04:00
Abdellatif El Khlifi
9e115ace35 drivers/mtd/nvmxip: introduce QSPI XIP driver
add nvmxip_qspi driver under UCLASS_NVMXIP

The device associated with this driver is the parent of the blk#<id> device
nvmxip_qspi can be reused by other platforms. If the platform
has custom settings to apply before using the flash, then the platform
can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
nvmxip-blk driver. The custom driver can be implemented like nvmxip_qspi in
addition to the platform custom settings.

Platforms can use multiple NVM XIP devices at the same time by defining a
DT node for each one of them.

For more details please refer to doc/develop/driver-model/nvmxip_qspi.rst

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
2023-04-27 17:01:14 -04:00
Abdellatif El Khlifi
f37af2760e drivers/mtd/nvmxip: introduce NVM XIP block storage emulation
add block storage emulation for NVM XIP flash devices

Some paltforms such as Corstone-1000 need to see NVM XIP raw flash
as a block storage device with read only capability.

Here NVM flash devices are devices with addressable
memory (e.g: QSPI NOR flash).

The implementation is generic and can be used by different platforms.

Two drivers are provided as follows.

  nvmxip-blk :

    a generic block driver allowing to read from the XIP flash

  nvmxip Uclass driver :

        When a device is described in the DT and associated with
        UCLASS_NVMXIP, the Uclass creates a block device and binds it with
	 the nvmxip-blk.

Platforms can use multiple NVM XIP devices at the same time by defining a
DT node for each one of them.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
2023-04-27 17:01:14 -04:00