Commit graph

58051 commits

Author SHA1 Message Date
Patrick Delaunay
03cc423d8a stm32mp1: configs: Add CONFIG_OF_SPL_REMOVE_PROPS
Removes unused device tree property in SPL
to reduce the SPL size by 1kB

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
25d436a624 stm32mp1: cosmetic: remove unnecessary include
Remove post.h include as it is used in spl.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
526558c63b stm32mp1: update README
Add latest information and correct some information.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
f4cb5d69c2 stm32mp1: key: add stm32key command
Add dedicated command to register in fuse a public hash
key provided by keygen tool.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
afb0840ffa stm32mp1: add stboard command
Allow to update board identification in OTP 59.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
c60f3b3589 stm32mp1: update device tree with ETZPC status
U-Boot should disable nodes in device tree if needed according
ETZPC status in ft_system_setup().

ETZPC itself use an array on addresses to do the match between the status
bits and the node.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
05d3693688 stm32mp1: update package information in device tree
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
24cb4587f4 stm32mp1: export get_cpu_package function
Prepare update of package information update
in Linux device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
d3f077b349 dt-bindings: pinctrl: stm32: add new entry for package information
Add "st,package" entry. Possibles values are:
-STM32MP_PKG_AA for LFBGA448 (18*18) package
-STM32MP_PKG_AB for LFBGA354 (16*16) package
-STM32MP_PKG_AC for TFBGA361 (12*12) package
-STM32MP_PKG_AD for TFBGA257 (10*10) package

see Linux commit 966d9b928f626a54a0c27c0fdae1e3dfe9bab416
for v5.2-rc1

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
dfda7d4c83 stm32mp1: syscon: remove stgen
Reduce difference with kernel Linux device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
72d18583a1 stm32mp1: syscon: remove etzpc support
Support for ETZPC is removed as this device is not present
in Linux kernel device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
f59ad456ff stm32mp1: call regulators_enable_boot_on in board_init
U-Boot activates regulators by reading the "regulator-boot-on"
property in DT; it is requested by M4 early Boot feature.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
ca351e705a stm32mp1: deactivate WATCHDOG in defconfig
Deactivate WATCHDOG by default in u-boot to avoid issue to boot kernel
and rootfs without the needed daemon to reload it.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
486942184a sysreset: syscon: add support for power off
The new type sysreset 'POWER_OFF', introduced by
commit 751fed426f ("sysreset: Add a way to find the last reset")
is only supported for "syscon-poweroff" compatible.

For details see Linux binding:
./Documentation/devicetree/bindings/power/reset/syscon-poweroff.txt

This patch removes the support of POWER_OFF for "syscon-reboot"
and keeps only the COLD reset (for command reset support)
and it introduces the compatible "syscon-poweroff"
for the POWER_OFF case.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Patrick Delaunay
4048e171d2 stm32mp1: move CONFIG_ENV in Kconfig
Move 2 ENV configuration flags in board Kconfig
- CONFIG_ENV_SECT_SIZE
- CONFIG_ENV_OFFSET

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Fabien Dessenne
1958dae4f3 ARM: dts: stm32: Add ipcc mailbox support on stm32mp1
Add IPCC mailbox support on stm32mp157 eval and disco boards.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-07-12 11:18:53 +02:00
Fabien Dessenne
8da622d818 configs: stm32mp15: enable IPCC mailbox
Activate the ipcc mailbox for stm32mp15 configs.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-07-12 11:18:53 +02:00
Fabien Dessenne
b04553ec9a MAINTAINERS: Add stm32 mailbox IPPC driver
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-07-12 11:18:53 +02:00
Fabien Dessenne
01964d8e23 mailbox: introduce stm32-ipcc driver
On STM32 family, the IPCC peripheral allows the communication
between 2 processors offering doorbells mechanism.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-07-12 11:18:53 +02:00
Tom Rini
5acce685c9 Merge branch '2019-07-11-master-imports'
- spear platform improvements
- Android BCB support
- Cadence PCIe endpoint driver
2019-07-11 18:03:52 -04:00
Marek Vasut
4a09831ab2 gpio: pca953x: Add TI TCA9539 compatible string
Add TI TCA9539 compatible string for yet another I2C GPIO expander.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Peng Fan <van.freenix@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-11 14:11:20 -04:00
Marek Vasut
b2a2bf41ac arm: mach-omap2: am33xx: Init pinmux before clock
The board_early_init_f() inits clock before initing pinmux. However,
the clock configuration code might need to adjust PMIC settings of a
PMIC on I2C bus (e.g. board/ti/am335x/board.c does that). If the I2C
bus pin muxing is not configured before attempting to communicate
with the PMIC, the communication will silently fail and the prcm_init()
may configure fast enough CPU clock that the default voltage provided
by the PMIC would be insufficient and the platform would become
unstable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Tom Rini <trini@konsulko.com>
2019-07-11 14:11:20 -04:00
Eugeniu Rosca
9bdf0e8fef doc: relocate/rename Android README and add BCB overview
Rename:
 - doc/{README.avb2 => android/avb2.txt}
 - doc/{README.android-fastboot => android/fastboot.txt}

Add a new file documenting the 'bcb' command:
 - doc/android/bcb.txt

The new directory structure has been reviewed by Simon in
https://patchwork.ozlabs.org/patch/1101107/#2176031 .

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 14:11:19 -04:00
Eugeniu Rosca
db7b7a05b2 cmd: Add 'bcb' command to read/modify/write BCB fields
'Bootloader Control Block' (BCB) is a well established term/acronym in
the Android namespace which refers to a location in a dedicated raw
(i.e. FS-unaware) flash (e.g. eMMC) partition, usually called "misc",
which is used as media for exchanging messages between Android userspace
(particularly recovery [1]) and an Android-capable bootloader.

On higher level, this allows implementing a subset of Android Bootloader
Requirements [2], amongst which is the Android-specific bootloader
flow [3]. Regardless how the latter is implemented in U-Boot ([3] being
the most memorable example), reading/writing/dumping the BCB fields in
the development process from inside the U-Boot is a convenient feature.
Hence, make it available to the users.

Some usage examples of the new command recorded on R-Car H3ULCB-KF
('>>>' is an overlay on top of the original console output):

=> bcb
bcb - Load/set/clear/test/dump/store Android BCB fields

Usage:
bcb load  <dev> <part>       - load  BCB from mmc <dev>:<part>
bcb set   <field> <val>      - set   BCB <field> to <val>
bcb clear [<field>]          - clear BCB <field> or all fields
bcb test  <field> <op> <val> - test  BCB <field> against <val>
bcb dump  <field>            - dump  BCB <field>
bcb store                    - store BCB back to mmc

Legend:
<dev>   - MMC device index containing the BCB partition
<part>  - MMC partition index or name containing the BCB
<field> - one of {command,status,recovery,stage,reserved}
<op>    - the binary operator used in 'bcb test':
          '=' returns true if <val> matches the string stored in <field>
          '~' returns true if <val> matches a subset of <field>'s string
<val>   - string/text provided as input to bcb {set,test}
          NOTE: any ':' character in <val> will be replaced by line feed
          during 'bcb set' and used as separator by upper layers

=> bcb dump command
Error: Please, load BCB first!
 >>> Users must specify mmc device and partition before any other call

=> bcb load 1 misc
=> bcb load 1 1
 >>> The two calls are equivalent (assuming "misc" has index 1)

=> bcb dump command
00000000: 62 6f 6f 74 6f 6e 63 65 2d 73 68 65 6c 6c 00 72    bootonce-shell.r
00000010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00    y.r.............
 >>> The output is in binary/string format for convenience
 >>> The output size matches the size of inspected BCB field
 >>> (32 bytes in case of 'command')

=> bcb test command = bootonce-shell && echo true
true
=> bcb test command = bootonce-shell- && echo true
=> bcb test command = bootonce-shel && echo true
 >>> The '=' operator returns 'true' on perfect match

=> bcb test command ~ bootonce-shel && echo true
true
=> bcb test command ~ bootonce-shell && echo true
true
 >>> The '~' operator returns 'true' on substring match

=> bcb set command recovery
=> bcb dump command
00000000: 72 65 63 6f 76 65 72 79 00 73 68 65 6c 6c 00 72    recovery.shell.r
00000010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00    y.r.............
 >>> The new value is NULL-terminated and stored in the BCB field

=> bcb set recovery "msg1:msg2:msg3"
=> bcb dump recovery
00000040: 6d 73 67 31 0a 6d 73 67 32 0a 6d 73 67 33 00 00    msg1.msg2.msg3..
00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
 >>> --- snip ---
 >>> Every ':' is replaced by line-feed '\n' (0xA). The latter is used
 >>> as separator between individual commands by Android userspace

=> bcb store
 >>> Flush/store the BCB structure to MMC

[1] https://android.googlesource.com/platform/bootable/recovery
[2] https://source.android.com/devices/bootloader
[3] https://patchwork.ozlabs.org/patch/746835/
    ("[U-Boot,5/6] Initial support for the Android Bootloader flow")

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
2019-07-11 14:11:19 -04:00
Eugeniu Rosca
0381b713d1 include: android_bootloader_message.h: Minimize the diff to AOSP
Perform the following updates:
 - Relocate the commit id from the file to the description of U-Boot
   commit. The AOSP commit is c784ce50e8c10eaf70e1f97e24e8324aef45faf5.
   This is done to avoid stale references in the file itself. The
   reasoning is in https://patchwork.ozlabs.org/patch/1098056/#2170209.
 - Minimize the diff to AOSP, to decrease the effort of the next AOSP
   backports. The background can be found in:
   https://patchwork.ozlabs.org/patch/1080394/#2168454.
 - Guard the static_assert() calls by #ifndef __UBOOT__ ... #endif,
   to avoid compilation failures of files including the header.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 14:11:19 -04:00
Tom Rini
11bd2fa197 SPL: Default to disabling legacy image support when using FIT
When we have a FIT image being used by SPL by default that means the
most common case is that we'll never run into a legacy image.  Disable
legacy image support by default in that case to reclaim space.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-11 14:11:19 -04:00
Tom Rini
c76c93a3d5 configs: Rename CONFIG_IMAGE_FORMAT_LEGACY to CONFIG_LEGACY_IMAGE_FORMAT
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with
allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line
with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY).  In a few places outside of
cmd/ switch to using CONFIG_IS_ENABLED() to test what is set.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-11 14:11:18 -04:00
Roman Kapl
27eb177b39 tpm: wait for valid status
The TPM specification says that the EXPECT_DATA bit is not valid until
the VALID bit is set. Wait for that bit to be set. Fixes problems with
Ifineon SPI TPM.

Signed-off-by: Roman Kapl <rka@sysgo.com>
2019-07-11 14:11:18 -04:00
Miquel Raynal
2e8a720246 arm: spear: Return to BootROM if failing to boot from the main device
Overload the weak function board_boot_order() so that besides choosing
the main boot device, we can fallback on USB boot by returning in the
BootROM, eg. if the NOR flash is empty while it was the primary boot
medium.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
6d09581f78 arm: spear: Do not link the _main branch
The _main call is not supposed to return at all: don't link the
branch.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
f78fdee9fc arm: spear: Support returning to BootROM
Implement the weak board_return_to_bootrom() function so that when
enabling the spl_bootrom.c driver, one can make use of usbboot on
spear platforms. All necessary information to return to the BootROM
are stored in the BootROM's stack. The SPL stack pointer is reset so
we save the BootROM's stack pointer into the SPL .data section.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
6a9d0e275f arm: spear: Simplify start.S organization
There is no reason to do the few spear-related initialization, in a
different procedure than 'reset'. Spare one branching and get a linear
code flow by removing this indirection.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
08ad72ae81 arm: spear: Reference the link register with LR instead of R14
The link register is stored in R14. ARM assembly code allows to use
the 'lr' name to reference it instead of 'r14' which is not very
meaningful. Do the substitution to ease the reading.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
f30765b748 arm: spear: Use PUSH/POP mnemonics when relevant
Quoting ARM "RealView Compilation Tools Assembler Guide v4.0":

        PUSH and POP are synonyms for STMDB and LDM (or LDMIA), with
        the base register sp (r13), and the adjusted address written
        back to the base register.
	PUSH and POP are the preferred mnemonic in these cases.

Let's follow this recommandation to ease the reading and substitute
LDMIA/STMDB operations with PUSH/POP mnemonics.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
76bdaaa196 arm: spear: Purely cosmetic changes in start.S
Before cleaning a bit further the spear/start.S file, apply a few
cosmetic changes: capital letters, comment indentation and small
rewriting.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
10a5b3cd99 arm: spear: Fix the main comment in start.S
This comment describes the board state at the moment where we enter
the SPL. The description is entirely wrong; re-write it to fit the
reality.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
58cbb671ef arm: spear: Drop false comment
SPL BSS lies in SRAM and is actually initialized to 0 by the SPL in
arch/arm/lib/crt0.S:_main(), which is called by cpu_init_crit.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
68cadee6f2 arm: spear: Call the SPL 'SPL', not 'Xloader'
Rename Xloader as SPL in comments.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
aa13fa71ea arm: spear: Drop useless board_init_r call
It is clearly stated that board_init_f should *not* call
board_init_r. Indeed, board_init_f should return. The code will
continue through arch/arm/lib/crt0.S which will do more setup before
calling board_init_r.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
fd4ee98db3 spl: Fix typo in kernel doc
Fix a tiny typo in boot_from_devices() kernel doc.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Ramon Fried
f2a55acfcf test: pci_ep: add basic pci_ep tests
Add basic PCI endpoint sandbox testing.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Ramon Fried
bb41333782 pci_ep: add pci endpoint sandbox driver
Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Ramon Fried
c2ccc9e5cb pci_ep: add Cadence PCIe endpoint driver
Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Ramon Fried
914026d258 drivers: pci_ep: Introduce UCLASS_PCI_EP uclass
Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Tom Rini
ef8b7e045e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-i2c 2019-07-10 13:51:53 -04:00
Tom Rini
a52f1fe408 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-ubi
[trini: Migrate sama5d27_som1_ek_qspiflash/sama5d2_xplained_qspiflash
        for CONFIG_ENV_SECT_SIZE]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-10 13:18:54 -04:00
Tom Rini
b4944e2574 First set of u-boot-atmel features and fixes for 2019.10 cycle
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Merge tag 'u-boot-atmel-2019.10-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features and fixes for 2019.10 cycle

This includes the Atmel QSPI driver and support for the at91 boards.
This is the port of the driver from Linux, mostly done by Tudor Ambarus.
2019-07-09 08:17:12 -04:00
Chuanhua Han
ef6c26d338 rtc: pcf2127: Fixed bug with rtc settings and getting error time
The previous pcf2127 RTC chip could not read and set the correct time.
When reading the data of internal registers, the read address was the
value of register plus 1. This is because this chip requires the host
to send a stop signal after setting the register address and before
reading the register data.

This patch sets the register address using dm_i2c_write and reads
the register data using the original dm_i2c_xfer in order to generate
a stop signal after the register address is set, and fixes the bug of
the original read and write time.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-07-09 10:51:12 +02:00
Eugen Hristev
5dd4fa7fad configs: sama5d2_xplained: add support QSPI flash boot
The spi-nor flash resides on spi bus 1. Update the CONFIG_ENV_SPI_CS
and CONFIG_BOOTCOMMAND accordingly.

Based on original work by Wenyou Yang.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[tudor.ambarus@microchip.com: amend the commit message.]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-07-09 09:26:43 +03:00
Tudor Ambarus
907f1da6ce configs: sama5d27_som1_ek: qspi: use common memory layout
Use the qspi memory layout defined in at91-sama5_common - it aligns
with the 8 Mbyte flash (sst26vf064b-104i/sn) available in sama5d27_som1_ek.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-07-09 09:26:43 +03:00