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78084 commits

Author SHA1 Message Date
Pali Rohár
cf2a589a89 arm: a37xx: pci: Cleanup macro names
Remove "PCI_" prefix from all macros which are aardvark specific to not
conflict with macros defined in global include file pci.h. Instead add
"ADVK_" prefix for them so it is visible that they are aardvark specific.

After "ADVK_" prefix append keyword which describes register group, so it
would be clear to which register each macro value belongs.

Rename some macros for consistency with other macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Pali Rohár
819a43c90a arm: a37xx: pci: Use standard register macros from pci.h
PCI config space of the aardvark PCIe Root Port is available only in
internal aardvark memory space starting at offset 0x0. PCI Express
registers (PCI_EXP_*) start at offset 0xc0. And Advanced Error Reporting
registers (PCI_ERR_*) start at offset 0x100.

Replace custom aardvark register macros by standard PCI macros from
include/pci.h file with fixed offset.

Some DEVCTL and AER macros are not defined in include/pci.h file, so define
them in the same way as in linux uapi header file pci_regs.h.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Tom Rini
b627718939 Merge branch 'master' of git://source.denx.de/u-boot-usb 2022-02-16 18:21:41 -05:00
Tom Rini
6bb2557da2 Merge branch '2022-02-16-add-TI-J721E-SK'
- Add TI J721E SK support
2022-02-16 18:21:21 -05:00
Sinthu Raja
bc2972bd9a arm: dts: k3-j721e-r5-sk: Update R5 DT to pick the new DDR config
A new lpddr4 configuration is introduced for J7 SK with 4266 MTs data
rate. Therefore, update the R5 DTS file to point to the new DDR config
file.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
51f660120f arm: dts: k3-j721e-sk: EMIF tool update to 0.6.1 with 4266MTs for lpddr4
EMIF tool for J721E SK is now updated to 0.6.1 that includes
* Updated write DQ training pattern to enable user pattern and clock
  pattern (from 0x7 to 0x6).
* Updated IO drive strength to 40-80-80 Ohms.

J721E SK uses the lpddr4 configuration of 4266 MTs data rate which is
the same as J721E EVM but facing random failures. As the tool update is
specific to the SK board, add a new lpddr4 config of 4266 MTs.

Signed-off-by: Kevin Scholz <k-scholz@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
0ca9f70423 include: configs: Update env for selecting right dtb
Now that single defconfig can be used for booting J721E EVM and
SK, default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
8e0758aa6e configs: j721e_evm: Store env in MMC FAT partition
Enable defconfigs relevant for storing env on FAT partion of MMC.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
c4ba922153 configs: j721e_evm_a72: Align OSPI partitions on erase block boundary
S28HS512T on TI SK has sector size of 256KB, so update OSPI partition
to align on 256KB sector size. Since the sector size for MT35XU512ABA
on EVM is 128KB, partitions will remain aligned for EVM.

Also, now since the sector size is 256KB ospi.env.backup will collide
with ospi.sysfw, so move ospi.env.backup to the padding space (0x7C0000)
before ospi.rootfs partition.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
9bb621aad3 configs: j721e_evm_a72: Add SK dtb as part of DTB FIT
Add k3-j721e-sk dtb along with other dtbs inside DTB FIT image.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
d9c59a3da1 configs: j721e_evm_r5: Enable support for building multiple dtbs into FIT
Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both J721E EVM and SK boards.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
daad7d6d85 arm: dts: k3-j721e-r5-sk: Add initial R5 specific dts support for j721e-sk
Add R5 specific dts for J721E-SK

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
58d61fb5a7 arm: dts: k3-j721e-sk: Add initial A72 specific dts support
J721E Starter Kit (SK)[1] is a low cost, small form factor board designed
for TI’s J721E SoC. TI’s J721E SoC comprises of dual core A72, high
performance vision accelerators, video codec accelerators, latest C71x
and C66x DSP, high bandwidth real-time IPs for capture and display, GPU,
dedicated safety island and security accelerators. The SoC is power
optimized to provide best in class performance for industrial and
automotive applications.

    J721E SK supports the following interfaces:
    * 4 GB LPDDR4 RAM
    * x1 Gigabit Ethernet interface
    * x1 USB 3.0 Type-C port
    * x3 USB 3.0 Type-A ports
    * x1 PCIe M.2 E Key
    * x1 PCIe M.2 M Key
    * 512 Mbit OSPI flash
    * x2 CSI2 Camera interface (RPi and TI Camera connector)
    * 40-pin Raspberry Pi GPIO header

Add A72 specific dts for J721E-SK.

[1] https://www.ti.com/tool/SK-TDA4VM

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
1157f36724 arm: dts: k3-j721e-r5-common-proc-board: Do not use power-domains for I2C
Board ID I2C EEPROM will be probed before SYSFW is available.
So drop the power-domains property for wakup_i2c0 on which
board ID EEPROM is connected.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
1e82a80d17 arm: j721e: Add support for selecting DT based on board name
Enable support for selecting DTB from FIT within SPL based on the
board name read from EEPROM. This will help to use single defconfig
for both EVM and SK.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
d8004919aa board: ti: j721e: Add support for detecting multiple device trees
Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.

Also restrict multpile EEPROM reads by verifying if EEPROM is already
read.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
ee59fa45c8 board: ti: j721e: Disable probing of daughtercards
j721e-sk doesn't have any daughter cards, so disable daughter
card probing inside board_late_init() and spl_board_init() for
j721e-sk.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
dfb2429ff4 board: ti: j721e: Add support to update board_name for j721e-sk
Update setup_board_eeprom_env() to choose the right board name
for j721e-sk.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
a46c5289b7 board: ti: j721e: Enable support for reading EEPROM at next alternate address
J721E EVM has EEPROM populated at 0x50. J721E SK has EEPROM populated
at next address 0x51 in order to be compatible with RPi. So start
looking for TI specific EEPROM at 0x50, if not found look for EEPROM at
0x51.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
d948fc4e66 board: ti: j721e: Guard functions with right #ifdef to avoid build warnings
board_late_init(), setup_board_eeprom_env() and setup_serial() is
called only under CONFIG_BOARD_LATE_INIT, so guard these functions
with the same. Also, reorder these functions to place it under
single #ifdef

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2022-02-16 14:19:30 -05:00
Sinthu Raja
df1fa2718f drivers: power: regulator: tps65941_regulator: Add support for 3Phase buck
Buck regulator 1, 2 and 3 of TPS6594132 on j721e-sk is in 3 Phase
confguration, in-order to support this, add configuring 3 Phase buck
in tps65941 while driver probing.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-02-16 14:19:29 -05:00
Sinthu Raja
3d32ad4d24 drivers: power: pmic: Add support for tps659412 PMIC
Since TPS659412 and TPS659413 are both software compatible,
add a compatible string for the same inside tps65941.c.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-02-16 14:19:29 -05:00
Tom Rini
545026a554 fdtdec.h: Remove gurads around fdtdec_resetup function
This function has not been conditionally compiled for some time, so
remove the incorrect guards around the declaration.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-16 14:19:29 -05:00
Stefan Agner
d5daa02d8d usb: xhci: reset endpoint on USB stall
There are devices which cause a USB stall when trying to read strings.
Specifically Arduino Mega R3 stalls when trying to read the product
string.

The stall currently remains unhandled, and subsequent retries submit new
transfers on a stopped endpoint which ultimately cause a crash in
abort_td():
WARN halted endpoint, queueing URB anyway.
XHCI control transfer timed out, aborting...
Unexpected XHCI event TRB, skipping... (3affe040 00000000 13000000 02008401)
BUG at drivers/usb/host/xhci-ring.c:505/abort_td()!
BUG!
resetting ...

Linux seems to be able to recover from the stall by issuing a
TRB_RESET_EP command.

Introduce reset_ep() which issues a TRB_RESET_EP followed by setting the
transfer ring dequeue pointer via TRB_SET_DEQ. This allows to properly
recover from a USB stall error and continue communicating with the USB
device.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2022-02-16 17:11:31 +01:00
Angus Ainslie
fb146fbc1a usb: dwc3: core: stop the core when it's removed
If u-boot doesn't stop the core when it's finished with it then
linux can't find it.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2022-02-16 16:52:56 +01:00
Angus Ainslie
c08db05455 usb: dwc3: dwc3-generic: check the parent nodes
The kernel devicetree has definitions for port and hub nodes as subnodes
to the USB devices. These subnodes don't contain all of the data required
to properly configure the dwc3. Check the parent nodes if the data is not
in the port/hub node.

Here's an example from the librem5 kernel dts file

&usb_dwc3_0 {
	#address-cells = <1>;
	#size-cells = <0>;
	dr_mode = "otg";
	snps,dis_u3_susphy_quirk;
	status = "okay";

	port@0 {
		reg = <0>;

		typec_hs: endpoint {
			remote-endpoint = <&usb_con_hs>;
		};
	};

	port@1 {
		reg = <1>;

		typec_ss: endpoint {
			remote-endpoint = <&usb_con_ss>;
		};
	};
};

&usb_dwc3_1 {
	dr_mode = "host";
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	/* Microchip USB2642 */
	hub@1 {
		compatible = "usb424,2640";
		reg = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		mass-storage@1 {
			compatible = "usb424,4041";
			reg = <1>;
		};
	};
};

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2022-02-16 16:52:56 +01:00
Ovidiu Panait
d1114b8340 microblaze: exception: fix unaligned data access register mask
The correct mask for getting the source/destination register from ESR in
the case of an unaligned access exception is 0x3E0. With this change, a
dummy unaligned store produces the expected info:
"""
>> swi r5, r0, 0x111

 ...
 Hardware exception at 0x111 address
 Unaligned data access exception
 Unaligned word access
 Unaligned store access
 Register R5
 Return address from exception 0x7f99dfc
 ### ERROR ### Please RESET the board ###
"""

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-6-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
Ovidiu Panait
339f489d52 microblaze: exception: move unaligned access printfs inside switch case
The unaligned access messages are only valid in the case of an unaligned
data access exception. Do not print them for other types of hw exceptions.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-5-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
Ovidiu Panait
ee8161f7d1 microblaze: exception: fix return address for delay slot exceptions
According to the MicroBlaze reference manual (xilinx2021.2/ug984/page-37):
"""
If an exception is caused by an instruction in a delay slot (that is,
ESR[DS]=1), the exception handler should return execution to
the address stored in BTR instead of the normal exception return
address stored in R17.
"""

Adjust the code to print the proper return address for delay slot
exceptions.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-4-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
Ovidiu Panait
7422b41175 microblaze: exception: fix delay slot exception handling
The switch statement in _hw_exception_handler() only covers the
rightmost 5 bits that encode the exception cause:
switch (state & 0x1f)
{
...
}

For this reason, the "0x1000" case will never be reached, because the 13th
bit was zeroed out. To fix this, move delay slot exception handling before
the switch statement (delay slot (DS) bit in Exception Status Register is
independent of the exception cause (EC)).

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-3-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
Ovidiu Panait
1669b3d1a0 microblaze: exception: migrate MICROBLAZE_V5 to Kconfig
Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only
covers delay slot exception support.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
Ovidiu Panait
4fef0a7b7e microblaze: exception: move privileged instruction exception out of v5 ifdef
The privileged instruction exception seems to have been introduced in
microblaze v7.00 along with MMU support, so having it wrapped in
MICROBLAZE_v5 ifdefs seems incorrect. Move it out of the ifdef, since all
recent microblaze versions support it.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-1-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
Michal Simek
753a29522c xilinx: Remove GPIO_EXTRA_HEADER selection
Platform specific headers are empty that's why there is no need to include
them. That's why remove them for Zynq/ZynqMP and Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/625b1be0b813e2b9a5323c0529f9c567bfe13e75.1643960446.git.michal.simek@xilinx.com
2022-02-15 13:06:13 +01:00
Michal Simek
25a5fa1c4c video: Add missing dependency for DM_GPIO
Seps driver also requires DM_GPIO to be enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/da8c25c19e5c723ed16a2a6b8494dfb967328567.1643960212.git.michal.simek@xilinx.com
2022-02-15 13:05:34 +01:00
Michal Simek
f6f5451d46 scsi: ceva: Enable PHY and reset support
Add phy and reset support for ceva sata IP. Phy and reset are optional
properties that's why detect if description is available. If not just
continue with operation.
This code was tested on Xilinx Kria SOM kv260-revA with sata connector
populated.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://lore.kernel.org/r/eb3adf649be866aab19fc70ecc0fc8921545b1ac.1644226590.git.michal.simek@xilinx.com
2022-02-15 13:04:28 +01:00
Michal Simek
462f76bc00 phy: zynqmp: Add support for sata and DP phy initialization
DP is untested but just c&p from Linux driver. Sata is tested on kv260-revA
board which has SATA connector populated.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d231610160e76a2ad1b4a163e0e8db0ddc4733e2.1644226590.git.michal.simek@xilinx.com
2022-02-15 13:04:28 +01:00
Michal Simek
fac46bc446 arm64: zynqmp: Add command for disabling loading other overlays
Add command "zynqmp pmufw node close" to disable permission to load
additional pmufw config overlays. This command will make sure that any
other sw will ask for changing permission.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cfa5cc7909eb8deb23eb0f11c26954cbaddeb861.1642163135.git.michal.simek@xilinx.com
2022-02-15 13:04:03 +01:00
Michal Simek
c750c6dbb2 xilinx: firmware: Introduce zynqmp_pmufw_node() for loading PMU fragments
Introduce zynqmp_pmufw_node() for loading PMU configuration fragment for
enabling IPs. Firmware driver has small overlay where NODE id is added and
config fragment is sent to PMUFW. There is a need to build PMUFW with
fragment support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/636e8150bd4e2b1f988d59795772c685ceeec083.1642163135.git.michal.simek@xilinx.com
2022-02-15 13:03:54 +01:00
Michal Simek
e0283cbdfd power: zynqmp: Add power domain driver for ZynqMP
Driver should be enabled by CONFIG_POWER_DOMAIN=y and
CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node
but it uses zynqmp firmware DT node that's why there is a need to bind
driver when firmware node is found.

Driver itself is simple. It is sending pmufw config object overlay for
enabling access to device which is done in ...domain_request().
In ...domain_on() capabilities are passed and node is requested.
This should be bare minimum of required to get power domain driver working.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/f4b9433b91c0b18c375b061c7a4e29d428f70547.1644226055.git.michal.simek@xilinx.com
2022-02-15 13:01:42 +01:00
Luca Ceresoli
2f9dd4bfc7 tools/zynqmp_pm_cfg_obj_convert.py: fix build with Vivado 2021.x
This tool fails with a pm_cfg_obj.c file generated by Vitis 2021.2. This is
because that version of Vitis added the PM_CONFIG_OBJECT_TYPE_BASE that was
not previously generated, thus the script does not implement it.

Reported-by: Neal Frager <nealf@xilinx.com>
[report: https://lists.buildroot.org/pipermail/buildroot/2022-February/636639.html]
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Link: https://lore.kernel.org/r/20220212125121.3398547-1-luca@lucaceresoli.net
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 12:41:00 +01:00
Tom Rini
ab8903a24d configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-14 22:21:29 +00:00
Tom Rini
8a4ef8786f Prepare v2022.04-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-14 17:03:08 -05:00
Tom Rini
139e049732 Merge branch '2022-02-14-assorted-fixes'
- Fix for pstore already being in the DT, "setlocalversion" script
  bugfix and pdu001 platform bugfix
2022-02-14 14:18:45 -05:00
Felix Brack
9f0deae6d5 arm: pdu001: Fix dt to work with the current am33xx dtsi files
The changes introduced with commit 6337d53fdf ("arm: dts: sync am33xx
with Linux 5.9-rc7") prevent the PDU001 from operating correctly.
This patch fixes the configuration of the pin multiplexer and uart3.

Signed-off-by: Felix Brack <fb@ltec.ch>
2022-02-14 13:04:39 -05:00
Nikita Maslov
609177140b scripts: setlocalversion: remove quotes around localversion from config
After replacing of include/config/auto.conf sourcing with
extraction of CONFIG_LOCALVERSION, resulting version string
contains quotes around localversion part which are always
present in auto.conf (even if localversion is empty).

This patch fixes this script to remove quotes.

Signed-off-by: Nikita Maslov <wkernelteam@gmail.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-14 13:04:39 -05:00
Detlev Casanova
ac52cba63f pstore: Support already existing reserved-memory node
The pstore command tries to create a reserved-memory node but fails if
it is already present with:

    Add 'reserved-memory' node failed: FDT_ERR_EXISTS

This patch creates the node only if it does not exist and adapts the reg
values sizes depending on already present #address-cells and #size-cells
values.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
2022-02-14 13:03:49 -05:00
Tom Rini
162c22bfbc Pull request for efi-2022-04-rc2-4
Documentation:
 
 * mkeficapsule man-page
 
 UEFI changes:
 
 * add support for signing images to mkeficapsule
 * add support for user define capsule GUID
 * adjust unit tests for capsules
 * fix UEFI image signature validation in case of multiple signatures
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Merge tag 'efi-2022-04-rc2-4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-04-rc2-4

Documentation:

* mkeficapsule man-page

UEFI changes:

* add support for signing images to mkeficapsule
* add support for user define capsule GUID
* adjust unit tests for capsules
* fix UEFI image signature validation in case of multiple signatures
2022-02-11 15:11:52 -05:00
Ilias Apalodimas
72b509b701 test/py: efi_secboot: adjust secure boot tests to code changes
The previous patch is changing U-Boot's behavior wrt certificate based
binary authentication.  Specifically an image who's digest of a
certificate is found in dbx is now rejected.  Fix the test accordingly
and add another one testing signatures in reverse order

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-02-11 20:07:55 +01:00
Ilias Apalodimas
54cebe8a3a efi_loader: fix dual signed image certification
The EFI spec allows for images to carry multiple signatures. Currently
we don't adhere to the verification process for such images.

The spec says:
"Multiple signatures are allowed to exist in the binary's certificate
table (as per PE/COFF Section "Attribute Certificate Table"). Only one
hash or signature is required to be present in db in order to pass
validation, so long as neither the SHA-256 hash of the binary nor any
present signature is reflected in dbx."

With our current implementation signing the image with two certificates
and inserting both of them in db and one of them dbx doesn't always reject
the image.  The rejection depends on the order that the image was signed
and the order the certificates are read (and checked) in db.

While at it move the sha256 hash verification outside the signature
checking loop, since it only needs to run once per image and get simplify
the logic for authenticating an unsigned imahe using sha256 hashes.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-02-11 20:07:55 +01:00
AKASHI Takahiro
e012550cd7 test/py: efi_capsule: check the results in case of CAPSULE_AUTHENTICATE
Before the capsule authentication is supported, this test script works
correctly, but with the feature enabled, most tests will fail due to
unsigned capsules.
So check the results depending on CAPSULE_AUTHENTICATE or not.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-11 20:07:55 +01:00