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5151 commits

Author SHA1 Message Date
Matthew McClintock
c8f9802a72 p1010rdb: fix ddr values for p1014rdb (setting bus width to 16bit)
There was an extra 0 in front of the value we were using to mask,
remove it to improve the code.

Also fix the value written to ddr_sdram_cfg to set the bus width
properly to 16 bits

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:16 -05:00
Shaohui Xie
5d898a00f3 powerpc/CoreNet: add tool to support pbl image build.
Provides a tool to build boot Image for PBL(Pre boot loader) which is
used on Freescale CoreNet SoCs, PBL can be used to load some instructions
and/or data for pre-initialization. The default output image is u-boot.pbl,
for more details please refer to doc/README.pblimage.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:16 -05:00
Liu Gang
461632bd71 powerpc/corenet_ds: Slave module for boot from PCIE
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.

Slave's ucode and ENV can be stored in master's memory space, then slave
can fetch them through PCIE interface. For the corenet platform, ucode is
for Fman.

NOTE: Because the slave can not erase, write master's NOR flash by
	  PCIE interface, so it can not modify the ENV parameters stored
	  in master's NOR flash using "saveenv" or other commands.

environment and requirement:

master:
	1. NOR flash for its own u-boot image, ucode and ENV space.
	2. Slave's u-boot image is in master NOR flash.
	3. Put the slave's ucode and ENV into it's own memory space.
	4. Normally boot from local NOR flash.
	5. Configure PCIE system if needed.
slave:
	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
	2. Boot location should be set to one PCIE interface by RCW.
	3. RCW should configure the SerDes, PCIE interfaces correctly.
	4. Must set all the cores in holdoff by RCW.
	5. Must be powered on before master's boot.

For the slave module, need to finish these processes:
	1. Set the boot location to one PCIE interface by RCW.
    2. Set a specific TLB entry for the boot process.
	3. Set a LAW entry with the TargetID of one PCIE for the boot.
	4. Set a specific TLB entry in order to fetch ucode and ENV from
	   master.
	5. Set a LAW entry with the TargetID one of the PCIE ports for
	   ucode and ENV.
	6. Slave's u-boot image should be generated specifically by
	   make xxxx_SRIO_PCIE_BOOT_config.
	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.

In addition, the processes are very similar between boot from SRIO and
boot from PCIE. Some configurations like the address spaces can be set to
the same. So the module of boot from PCIE was added based on the existing
module of boot from SRIO, and the following changes were needed:
	1. Updated the README.srio-boot-corenet to add descriptions about
	   boot from PCIE, and change the name to
	   README.srio-pcie-boot-corenet.
	2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to
	   "xxxx_SRIO_PCIE_BOOT", and the image builded with
	   "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and
	   from PCIE.
	3. Updated other macros and documents if needed to add information
	   about boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:15 -05:00
Liu Gang
81fa73bab0 powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macro
When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.

This has the following advantages:
	1. No longer need to rebuild an image when change the SRIO port for
	   boot from SRIO, just rewrite the new RCW with selected port,
	   then the code will get the port information by reading new RCW.
	2. It will be easier to support other boot location options, for
	   example, boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:14 -05:00
Jens Scharsig
eb0b43f264 rename EB+MCF-EV123 to its current marketing name EB+CPU5282
* rename board directory to eb_cpu5282
* rename EB+MCF-EV123_.*config to eb_cpu5282_.*config
* add Maintainer for EB+CPU5282 board
* rename prompt

Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2012-08-09 23:07:32 +02:00
Hongtao Jia
308bc61db7 powerpc/sgmii: To support PHY link state auto detect in SGMII mode
PHYs on SGMII riser card are used in SGMII mode with different external
IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type
under ethernet node should be updated. Otherwise the PHY interrupt can not
be handled therefor PHY link state change can not be auto detected.

For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed
but it's still be kept to guarantee the sgmii mode could work with old
device tree.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 18:32:15 -05:00
Shaohui Xie
145dbc0250 powerpc/p2041: configure the CPLD lane_mux according to RCW
Lane muxing on p2041 is controlled by a reg in CPLD, offset of this reg
is 0xc, CPLD supports SATA by default, we should re-configure the lane
muxing according to RCW, which indicates what SerDes protocol it is running.

Default lane muxing map is as below:
Lane G on bank1 routes to SGMII, controlled by bit 1 of the reg;
Lane A on bank2 routes to AURORA, controlled by bit 0 of the reg;
Lane C/D on bank2 routes to SATA0 and SATA1, controlled by bit 2
and bit 3 respectively.

Default value of these bits for lane muxing is '1', we should set or clear
these bits accoring to RCW.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 17:13:39 -05:00
Timur Tabi
7a946961c7 powerpc/p1022ds: fix DIU/LBC switching with NAND enabled
In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead.  Therefore, we need to set BR0 and BR1 to GPCM
mode before switching to indirect mode.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 17:13:37 -05:00
Matthew McClintock
af2536088e powerpc/p1022ds: add support for SPI and SD boot
Add TLB mappings, board target options, and configuration items
need for SPI/SD boot.

Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit
address flash, therefore, when SDHC/ESPI booting and access to eLBC,
the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to
00b for them.

Configure the PX_BRDCFG0[0~1] to 10b which is connected to
SPI devices as SPI_CS(0:3)_B.

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 17:13:37 -05:00
Gerlando Falauto
3a532346fc powerpc/82xx: add SDRAM detection for km82xx
This patch adds SDRAM detection feature to km82xx boards.
To enable this feature, define CONFIG_SYS_SDRAM_LIST as the initializer
for an array of struct sdram_conf_s.
These structs will expose the bitfields within registers PSDMR and OR1 which
have to be different between configurations; common bitfields will be
defined, as usual, within CONFIG_SYS_PSDMR and CONFIG_SYS_OR1.
If CONFIG_SYS_SDRAM_LIST is not defined, then the usual behavior is retained.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
2012-07-31 22:36:31 +02:00
Wolfgang Denk
948fa1713c Merge branch 'master' of git://git.denx.de/u-boot-i2c
* 'master' of git://git.denx.de/u-boot-i2c:
  km/common: remove printfs for i2c deblocking code
  CONFIG: SMDK5250: I2C: Enable I2C
  I2C: Add support for Multi channel
  I2C: Modify the I2C driver for EXYNOS5
  I2C: Move struct s3c24x0_i2c to a common place.
  EXYNOS: PINMUX: Add pinmux support for I2C
  EXYNOS5: define EXYNOS5_I2C_SPACING
  EXYNOS: Add I2C base address.
  EXYNOS: CLK: Add i2c clock
  mx6qsabrelite: add i2c multi-bus support
  imx-common: add i2c.c for bus recovery support
  i.mx53: add definition for I2C3_BASE_ADDR
  i.mx: iomux-v3.c: move to imx-common directory
  i.mx: iomux-v3.h: move to imx-common include directory
  iomux-v3: remove include of mx6x_pins.h
  mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support
  mxc_i2c: add bus recovery support
  mxc_i2c: prep work for multiple busses support
  mxc_i2c: add i2c_regs argument to i2c_imx_stop
  mxc_i2c: add retries
  mxc_i2c: check for arbitration lost
  mxc_i2c: change slave addr if conflicts with destination.
  mxc_i2c: don't disable controller after every transaction
  mxc_i2c: place i2c_reset code inline
  mxc_i2c: place imx_start code inline
  mxc_i2c: remove redundant read
  mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state
  mxc_i2c.c: code i2c_probe as a 0 length i2c_write
  mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write
  mxc_i2c: create i2c_init_transfer
  mxc_i2c: clear i2sr before waiting for bit
  mxc_i2c: create tx_byte function
  mxc_i2c: remove ifdef of CONFIG_HARD_I2C
  mxc_i2c: fix i2c_imx_stop
  i2c: deblock i2c bus also if accessed before realocation

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-31 22:07:42 +02:00
Wolfgang Denk
d978780b2e Merge branch 'master' of git://git.denx.de/u-boot-microblaze
* 'master' of git://git.denx.de/u-boot-microblaze:
  microblaze: Wire up SPI driver
  spi: microblaze: Adds driver for Xilinx SPI controller
  microblaze: intc: Clear interrupt code
  microblaze: Call serial multi initialization
  microblaze: Move __udelay implementation
  microblaze: Remove extern from board.c
  microblaze: Wire up dts configuration
  fdt: Add board specific dts inclusion
  microblaze: Move individual board linker scripts to common script in cpu tree.
  microblaze: Add gpio.h
  microblaze: Add missing undefs for UBI and UBIFS
  microblaze: Expand and correct configuration comments
  microblaze: Enable ubi support
  microblaze: Avoid compile error on systems without cfi flash
  microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION

Conflicts:
	drivers/spi/Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-31 22:01:08 +02:00
Holger Brunck
e69e482bbf km/common: remove printfs for i2c deblocking code
This code will also be used before reallocation and during this time we
are not allowed to do these printings.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-31 08:04:13 +02:00
Rajeshwari Shinde
c82b050ead CONFIG: SMDK5250: I2C: Enable I2C
This enables I2C support on smdk5250.
Pinmux setting moved to board file to avoid repeated setting of
gpio lines.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:03:19 +02:00
Troy Kisky
9c06782863 mx6qsabrelite: add i2c multi-bus support
This includes bus recovery support.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-07-31 08:01:09 +02:00
Troy Kisky
af2a35fb1f i.mx: iomux-v3.h: move to imx-common include directory
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 08:00:19 +02:00
Wolfgang Denk
b98b611502 Merge branch 'next' of git://git.denx.de/u-boot
* 'next' of git://git.denx.de/u-boot:
  MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c
  doc: cleanup - move board READMEs into respective board directories
  net: sh_eth: add support for SH7757's GETHER
  net: sh_eth: modify the definitions of regsiter
  net: sh_eth: add SH_ETH_TYPE_ condition
  net: sh_eth: clean up for the SH7757's code
  net: fec_mxc: Fix MDC for xMII
  net: fec_mxc: Fix setting of RCR for xMII
  net: nfs: make NFS_TIMEOUT configurable
  net: Inline the new eth_setenv_enetaddr_by_index function
  net: allow setting env enetaddr from net device setting
  net/designware: Consecutive writes to the same register to be avoided
  CACHE: net: asix: Fix asix driver to work with data cache on
  net: phy: micrel: make ksz9021 phy accessible
  net: abort network initialization if the PHY driver fails
  phylib: phy_startup() should return an error code on failure
  net: tftp: fix type of block arg to store_block

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-30 20:39:52 +02:00
Wolfgang Denk
702e6014f1 doc: cleanup - move board READMEs into respective board directories
Also drop a few files referring to no longer / not yet supported
boards.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Jason Jin <jason.jin@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-07-29 15:42:02 +02:00
Wolfgang Denk
00c60f9131 Minor Coding Style Cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-22 21:58:26 +02:00
Wolfgang Denk
b264bcf2b9 BC3450 board: Remove unused CONFIG_SYS_CPU definition
This fixes:
cmd_bc3450.c:55:0: warning: "CONFIG_SYS_CPU" redefined [enabled by default]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2012-07-22 09:58:47 +02:00
Wolfgang Denk
d0090c33f1 BC3450 board: change debug code to using debug()
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2012-07-22 09:56:06 +02:00
SRICHARAN R
d2ebaa41ed ARM: OMAP4: PANDA: Add rest of the USB module pads to essentials
In commit 1a89a217f5 we moved most of the
required pads and mux data for USB to the essential list so that later
on we could NOT enable anything that wasn't essential unless otherwise
configured.  This was however missing a few pandaboard-specific parts
which left for example USB ethernet non-functional.

Tested this on OMAP4430 ES2.2, OMAP4460 ES1.1 PANDA boards.

(Reworded by Tom Rini to be more precise about what the problem was)

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Tested-by: Gary Thomas <gary@mlbassoc.com>
Tested-by: Tom Rini <trini@ti.com>
2012-07-20 14:24:08 +02:00
Fabio Estevam
175a7d2778 mx28evk: Add I2C support
Add I2C support.

Tested by placing a 24LC16 EEPROM into the U50 slot which comes empty from factory.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-11 10:54:53 +02:00
Troy Kisky
3174689be2 mx6qsabrelite: add i2c support
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11 10:54:52 +02:00
Stephan Linz
920c358781 microblaze: Wire up dts configuration
- enable OF control and embedded OF
    - set default device tree file name to 'microblaze'
    - add CPP to dtc proxy: board/xilinx/dts/microblaze.dts
    - add an empty but processable dts for microblaze-generic

Signed-off-by: Stephan Linz <linz@li-pro.net>
2012-07-10 10:01:29 +02:00
Wolfgang Denk
3fe63839f3 Minor Coding Style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10 09:18:33 +02:00
Stephen Warren
2db7b95284 tegra: trimslice: set up serial flash pinmux
When Trimslice is booted from serial flash, the boot ROM does this, so
U-Boot doesn't need to. However, booting from the SD slot for recovery
purposes, the boot ROM does not set up the pinmux for serial flash. Add
code to U-Boot to set this up, so that an SD-based recovery U-Boot image
can upgrade the U-Boot in serial flash.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:33 +02:00
Stephen Warren
e028494887 tegra: add pin_mux_spi() board initialization function
Boards can override this to set up the pinmux correctly to access serial
flash.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:33 +02:00
Tom Warren
1e2d785975 tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and
one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2012-07-09 22:44:32 +02:00
Thierry Reding
d70575b6d0 tegra: Add Tamonten Evaluation Carrier support
The Tamonten Evaluation Carrier is an evaluation board for the Tamonten
processor board. More information is available here:

	http://www.avionic-design.de/en/products/nvidia-tegra-tamonten-system-en/nvidia-tegra-tamonten-evboard-en.html

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Thierry Reding
7925454305 tegra: Use SD write-protect GPIO on Tamonten
GPIO PI6 can be used to obtain the write-protect status of an SD card
inserted into the SD slot.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Thierry Reding
22d58506f5 tegra: Implement gpio_early_init() on Tamonten
The PI4 GPIO is used on Tamonten to reset carrier board peripherals.
Power sequencing hardware on the carrier pulls the reset low before
powering up the Tegra, and the CPU is supposed to signal readiness,
and therefore bring peripherals out of reset by pulling PI4 high.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Thierry Reding
cb7a1cf36a tegra: Allow boards to perform early GPIO setup
The new gpio_early_init() function, which does nothing by default, can
be overridden by boards to configure GPIOs at an early stage.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Thierry Reding
a7dafd7b1a tegra: plutux: Add device tree support
Device tree support is required for working USB host support, which in
turn enables ethernet support.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Thierry Reding
1cbdf2d7e1 tegra: medcom: Add device tree support
Device tree support is required for working USB host support, which in
turn enables ethernet support.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Thierry Reding
ed900c55c3 tegra: Rework Tamonten support
This commit uses the common Tegra board implementation instead of
duplicating a lot of the code. In addition, the Plutux and Medcom
specific board files can be removed as the MMC/SD setup is common
among all Tamonten-based boards.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Peter Meerwald
ef88e60902 beagle: add eeprom expansion board info for bct brettl4
this is for a prototyping board

vendor/product ids have been added to
http://elinux.org/BeagleBoardPinMux#List_of_Vendor_and_Device_IDs

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
2012-07-09 22:44:32 +02:00
Michal Simek
2e65b44c0f microblaze: Move individual board linker scripts to common script in cpu tree.
Unification for all microblaze boards.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-07-09 10:44:27 +02:00
Wolfgang Denk
50cd93b250 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (212 commits)
  ARM: cache: Move the cp15 CR register read before flushing the cache.
  ARM: introduce arch_early_init_r()
  PXA: Enable CONFIG_PREBOOT on zipitz2
  ARM: mx28: Remove CONFIG_ARCH_CPU_INIT
  No need to define CONFIG_ARCH_CPU_INIT.
  add new board vl_ma2sc
  MTD: SPEAr SMI: Add write support for length < 4 bytes
  i2c: designware_i2c.c: Add support for the "i2c probe" command
  rtc/m41t62: Add support for M41T82 with HT (Halt Update)
  SPL: ARM: spear: Add SPL support for SPEAr600 platform
  Makefile: Add u-boot.spr build target (SPEAr)
  SPL: ARM: spear: Remove some objects from SPL build
  SPL: lib/Makefile: Add crc32.c to SPL build
  SPL: common/Makefile: Add image.c to SPL build
  arm: Don't use printf() in SPL builds
  GPIO: Add SPEAr GPIO driver
  net: Multiple updates/enhancements to designware.c
  cleanup/SPEAr: Define configuration flags more elegantly
  cleanup/SPEAr: Remove unnecessary parenthesis
  SPEAr: Correct SoC ID offset in misc configuration space
  SPEAr: explicitly select clk src for UART
  SPEAr: Remove CONFIG_MTD_NAND_VERIFY_WRITE to speed up NAND access
  SPEAr: Enable ONFI nand flash detection for spear3xx and 6xx and evb
  SPEAr: Enable CONFIG_SYS_FLASH_EMPTY_INFO macro
  SPEAr: Correct the definition of CONFIG_SYS_MONITOR_BASE
  SPEAr: Enable CONFIG_SYS_FLASH_PROTECTION
  SPEAr: Enable dcache for fast file transfer
  SPEAr: Enable autoneg for ethernet
  SPEAr: Enable udc and usb-console support only for usbtty configuration
  SPEAr: Enable usb device high speed support
  SPEAr: Initialize SNOR in early_board_init_f
  SPEAr: Change the default environment variables
  SPEAr: Remove unused flag (CONFIG_SYS_HZ_CLOCK)
  SPEAr: Add configuration options for spear3xx and spear6xx boards
  SPEAr: Add basic arch related support for SPEAr SoCs
  SPEAr: Add interface information in initialization
  SPEAr: Add macb driver support for spear310 and spear320
  SPEAr: Configure network support for spear SoCs
  SPEAr: Place ethaddr write and read within CONFIG_CMD_NET
  SPEAr: Eliminate dependency on Xloader table
  SPEAr: Fix ARM relocation support
  st_smi: Fixed page size for Winbond W25Q128FV flash
  st_smi: Change timeout loop implementation
  st_smi: Fix bug in flash_print_info()
  st_smi: Change the flash probing method
  st_smi: Removed no needed dependency on ST_M25Pxx_ID
  st_smi: Fix smi read status
  st_smi: Move status register read before modifying ctrl register
  st_smi: Read status until timeout happens
  st_smi: Enhance the error handling
  st_smi: Change SMI timeout values
  st_smi: Return error in case TFF is not set
  st_smi: Add support for SPEAr SMI driver
  mtd/NAND: Remove obsolete SPEAr specific NAND drivers
  SPEAr: Configure FSMC driver for NAND interface
  mtd/NAND: Add FSMC driver support
  arm/km: remove calls to kw_gpio_* in board_early_init_f
  arm/km: add implementation for read_dip_switch
  arm/km: support the 2 PCIe fpga resets
  arm/km: skip FPGA config when already configured
  arm/km: redefine piggy 4 reg names to avoid conflicts
  arm/km: cleanup km_kirkwood boards
  arm/km: enable BOCO2 FPGA download support
  arm/km: remove portl2.h and use km_kirkwood instead
  arm/km: convert mgcoge3un target to km_kirkwood
  arm/km: add kmcoge5un board support
  arm/km: add kmnusa board support
  arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0
  cm-t35: fix incorrect NAND_ECC layout selection
  ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls.
  ARM: OMAP4/5: Move USB pads to essential list.
  ARM: OMAP4/5: Move USB clocks to essential group.
  ARM: OMAP4/5: Move gpmc clocks to essential group.
  ARM: OMAP4+: Move external phy initialisations to arch specific place.
  omap4: Use a smaller M,N couple for IVA DPLL
  da850/omap-l138: Enable auto negotiation in RMII mode
  omap: am33xx: accomodate input clocks other than 24 Mhz
  omap: emif: fix bug in manufacturer code test
  omap: emif: deal with rams that return duplicate mr data on all byte lanes
  OMAP4+: Force DDR in self-refresh after warm reset
  OMAP4+: Handle sdram init after warm reset
  ARM: OMAP3+: Detect reset type
  arm: bugfix: Move vector table before jumping relocated code
  Kirkwood: Add support for Ka-Ro TK71
  arm/km: use spi claim bus to switch between SPI and NAND
  arm/kirkwood: protect the ENV_SPI #defines
  ARM: don't probe PHY address for LaCie boards
  lacie_kw: fix CONFIG_SYS_KWD_CONFIG for inetspace_v2
  lacie_kw: fix SDRAM banks number for net2big_v2
  Kirkwood: add lschlv2 and lsxhl board support
  net: add helper to generate random mac address
  net: use common rand()/srand() functions
  lib: add rand() function
  kwboot: boot kirkwood SoCs over a serial link
  kw_spi: add weak functions board_spi_claim/release_bus
  kw_spi: support spi_claim/release_bus functions
  kw_spi: backup and reset the MPP of the chosen CS pin
  kirkwood: fix calls to kirkwood_mpp_conf
  kirkwood: add save functionality kirkwood_mpp_conf function
  km_arm: use filesize for erase in update command
  arm/km: enable mii cmd
  arm/km: remove CONFIG_RESET_PHY_R
  arm/km: change maintainer for mgcoge3un
  arm/km: fix wrong comment in SDRAM config for mgcoge3un
  arm/km: use ARRAY_SIZE macro
  arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE
  arm/km: add piggy mac adress offset for mgcoge3un
  arm/km: add board type to boards.cfg
  AT91SAM9*: Change kernel address in dataflash to match u-boot's size
  ATMEL/PIO: Enable new feature of PIO on Atmel device
  ehci-atmel: fix compiler warning
  AT91: at91sam9m10g45ek : Enable EHCI instead OHCI
  Atmel : usb : add EHCI driver for Atmel SoC
  Fix: AT91SAM9263 nor flash usage
  Fix: broken boot message at serial line on AT91SAM9263-EK board
  i.MX6 USDHC: Use the ESDHC clock
  mx28evk: Fix boot by adjusting HW_DRAM_CTL29 register
  i.MX28: Add function to adjust memory parameters
  mx28evk: Fix PSWITCH key position
  mx53smd: Remove CONFIG_SYS_I2C_SLAVE definition
  mx53loco: Remove CONFIG_SYS_I2C_SLAVE definition
  mx53evk: Remove CONFIG_SYS_I2C_SLAVE definition
  mx53ard: Remove CONFIG_SYS_I2C_SLAVE definition
  mx35pdk: Remove CONFIG_SYS_I2C_SLAVE definition
  imx31_phycore: Remove CONFIG_SYS_I2C_SLAVE definition
  mx53ard: Remove unused CONFIG_MII_GASKET
  mx6: Avoid writing to read-only bits in imximage.cfg
  m28evk: use same notation to alloc the 128kB stack
  ...

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-08 19:26:33 +02:00
esw@bus-elektronik.de
4324c75fcc add new board vl_ma2sc
* add support for board VL+MA2SC
* adds vl_ma2sc_config for standard NOR boot configuration
* adds vl_ma2sc_ram_config for RAM load configuration

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
2012-07-07 14:07:44 +02:00
Stefan Roese
d014e03388 SPL: ARM: spear: Remove some objects from SPL build
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
2012-07-07 14:07:43 +02:00
Shiraz Hashim
bda7f435a2 SPEAr: Enable dcache for fast file transfer
Enable data cache with 1:1 mapping of DDR to enable fast file
transfer over tty which was doing lot of copy.

This feature is enabled only for flashing operation i.e. when
CONFIG_SPEAR_USBTTY is enabled.

This has been tested on SPEAr320, SPEAr600 and SPEAr900 evaluation
boards.

Following figures show an estimate on the performance improvements. The
test setup was a Linux host (not Windows) and involved measurement of
only binary transfer time, through kermit. The flash erase and flash
copy time would be unaffected by these patches.

Another thing is this that the timings remained more or less same across
ARM9 and Cortex based devices, hence reporting only one of the cases.

Before Enhancements
===================

$ time ukermit.small -p /dev/ttyACM0 -f spear320_uImage.img
Downloading file: 100.00% completed(2014080/2014080 bytes)
real    0m41.228s
user    0m0.002s
sys     0m0.064s

After Enhancements
==================

$ time ukermit.large -p /dev/ttyACM0 -f spear320_uImage.img
Downloading file: 100.00% completed(2014080/2014080 bytes)
real    0m5.441s
user    0m0.001s
sys     0m0.001s

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:41 +02:00
Amit Virdi
0b7ff3f459 SPEAr: Initialize SNOR in early_board_init_f
flash reading is required earlier than flash_init is called since the env_init
is called before flash_init. This makes the smi_init necessary before env_init
being called.

Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:41 +02:00
Vipin KUMAR
f273e5b2a6 SPEAr: Add configuration options for spear3xx and spear6xx boards
This patch adds options for all the below mentioned configurations and
subsequently renames the include/configs/spearxxx.h files to spear3xx_evb.h,
spear6xx_evb.h etc to depict evaluation board configuration.

SPEAr3xx and SPEAr6xx boards can be compiled in following configurations
1. Environment placed in NAND
2. Console on usb device
3. Console on usb device with environment placed in NAND
4. SPEAr310 and SPEAr320 support environment variables in parallel
NOR flash.

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Vipin Kumar
9afc1af01f SPEAr: Add interface information in initialization
Few Designware peripheral registers need to be modified based on the
ethernet interface selected by the board. This patch supports interface
information in ethernet driver

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Vipin KUMAR
8eb0ee6a64 SPEAr: Add macb driver support for spear310 and spear320
SPEAr310 and SPEAr320 SoCs have an extra ethernet controller. The
driver for this device is already supported by u-boot, so configuring
board configuration file and defining base addresses etc to make use
of the common driver

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Vipin KUMAR
deb0056227 SPEAr: Configure network support for spear SoCs
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Vipin KUMAR
8026b1e42f SPEAr: Place ethaddr write and read within CONFIG_CMD_NET
ethaddr can be optionally read from i2c memory. So, chip_config command supports
reading/writing hw mac id into i2c memory. Placing this code within
CONFIG_CMD_NET as this would only be needed when network interface is configured

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Amit Virdi
70fdbefc6c SPEAr: Eliminate dependency on Xloader table
Xloader table was used primarily to inform u-boot about the DDR size. However,
now the ddr size is calculated at runtime which eliminates any need for the
Xloader table. So removing this unnecessary code.

Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:40 +02:00
Amit Virdi
5cca72f8b3 SPEAr: Fix ARM relocation support
While the u-boot code is running from the flash, it is essential that no access
is made to the bss segment. This is due to the fact that .rel.dyn and .bss areas
overlap and former contains information used in relocation. In SPEAr, this was
not taken into consideration. As a result, while the relocation wasn't complete,
dram_init populated an uninitialized global variable resulting in corruption of
.rel.dyn area, which resulted in u-boot crash.

This commit fixes this problem by removing code that accesses bss segment

Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:39 +02:00