Commit graph

36 commits

Author SHA1 Message Date
Jagan Teki
b6fd3c63f4 configs: rockchip: Enable USB2PHY for RK3328 boards
Enable USB2PHY for all RK3328 boards.

=> usb start
starting USB...
Bus usb@ff5c0000: USB EHCI 1.00
Bus usb@ff5d0000: USB OHCI 1.0
Bus usb@ff600000: generic_phy_get_bulk : no phys property
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@ff580000: USB DWC2
scanning bus usb@ff5c0000 for devices... 2 USB Device(s) found
scanning bus usb@ff5d0000 for devices... 1 USB Device(s) found
scanning bus usb@ff600000 for devices... 2 USB Device(s) found
scanning bus usb@ff580000 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Mass Storage (480 Mb/s, 500mA)
       TS-RDF5A Transcend 000000000009

  1  Hub (12 Mb/s, 0mA)
      U-Boot Root Hub

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 224mA)
       SanDisk Dual Drive 040130e3ee554b7078843f4eb331646

  1  Hub (480 Mb/s, 0mA)
  |   U-Boot Root Hub
  |
  +-2  Human Interface (12 Mb/s, 98mA)
       Logitech USB Receiver

=> dm tree -s
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 syscon        1  [ + ]   syscon                |-- syscon@ff450000
 phy           0  [ + ]   rockchip_usb2phy      |   `-- usb2phy@100
 clk           2  [ + ]   rockchip_usb2phy_clo  |       |-- usb480m_phy
 phy           1  [ + ]   rockchip_usb2phy_por  |       |-- otg-port
 phy           2  [ + ]   rockchip_usb2phy_por  |       `-- host-port
 sysinfo       0  [ + ]   sysinfo_smbios        |-- smbios
 usb           3  [ + ]   dwc2_usb              |-- usb@ff580000
 usb_hub       3  [ + ]   usb_hub               |   `-- usb_hub
 usb_dev_ge    0  [ + ]   usb_dev_generic_drv   |       `-- generic_bus_3_dev_2
 usb           0  [ + ]   ehci_generic          |-- usb@ff5c0000
 usb_hub       0  [ + ]   usb_hub               |   `-- usb_hub
 usb_mass_s    0  [ + ]   usb_mass_storage      |       `-- usb_mass_storage
 blk           2  [ + ]   usb_storage_blk       |           |-- usb_mass_storage.lun0
 partition     4  [ + ]   blk_partition         |           |   |-- usb_mass_storage.lun0:1
 partition     5  [ + ]   blk_partition         |           |   `-- usb_mass_storage.lun0:2
 bootdev       3  [   ]   usb_bootdev           |           `-- usb_mass_storage.lun0.bootdev
 usb           1  [ + ]   ohci_generic          `-- usb@ff5d0000
 usb_hub       1  [ + ]   usb_hub                   `-- usb_hub

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
5d334b70cc configs: Enable DWC3 USB 3.0 on RK3328 boards
Enable USB 3.0 in all RK3328 boards.

=> usb start
starting USB...
Bus usb@ff5c0000: ehci_generic usb@ff5c0000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@ff5d0000: USB OHCI 1.0
Bus usb@ff600000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@ff580000: 1 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (12 Mb/s, 0mA)
      U-Boot Root Hub

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 224mA)
       SanDisk Dual Drive 040130e3ee554b7078843f4eb331646

  1  Hub (480 Mb/s, 0mA)
      U-Boot Root Hub

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
559911ff2e configs: Drop unused XHCI_DWC3 for RK3328 boards
Driver support for rk3328 is not supported so drop this
unused XHCI_DWC3.

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Tom Rini
c960c0fd38 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-01 11:50:26 -04:00
Tom Rini
fcb5117da8 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17 09:58:06 -05:00
Tom Rini
9591b63531 Convert CONFIG_SYS_NS16550_MEM32 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NS16550_MIN_FUNCTIONS
   CONFIG_SYS_NS16550_MEM32
   CONFIG_SYS_NS16550_PORT_MAPPED
   CONFIG_SYS_NS16550_REG_SIZE
   CONFIG_SYS_NS16550_SERIAL

To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that
platforms can enable the legacy driver here for SPL.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:06:07 -05:00
Samuel Holland
f4917b4933 usb: ohci: Use a flexible array member for portstatus
The struct is only used to overlay the MMIO region, so the behavior is
the same. This obsoletes the Kconfig option for the number of ports.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-11-03 23:24:09 +01:00
Simon Glass
984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
Michael Trimarchi
dc1c02cb59 configs: rockchip: Drop TPL_MAX_SIZE definition
The max size is defined at architectural level. On the same commit
I have checked mostly all the other architecture and look like they are

Fixes: commit ca8a329a1b ("Convert CONFIG_SPL_PAD_TO et al to Kconfig")
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-09-29 10:10:39 -04:00
Tom Rini
1247c35c80 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-23 15:24:14 -04:00
Tom Rini
0fc5c499db configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25 17:19:18 -04:00
Tom Rini
cd6a45a41f Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig:
    CONFIG_SYS_OHCI_SWAP_REG_ACCESS
    CONFIG_SYS_USB_OHCI_CPU_INIT
    CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
    CONFIG_SYS_USB_OHCI_SLOT_NAME
    CONFIG_USB_ATMEL
    CONFIG_USB_ATMEL_CLK_SEL_PLLB
    CONFIG_USB_ATMEL_CLK_SEL_UPLL
    CONFIG_USB_OHCI_LPC32XX
    CONFIG_USB_OHCI_NEW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
41e47b420d configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:13:29 -04:00
Tom Rini
6600b355c7 Convert CONFIG_SPL_BSS_START_ADDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_BSS_START_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
f113d7d303 Convert CONFIG_SPL_STACK to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_STACK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:27 -04:00
Tom Rini
eaf6ea6a1d Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:19 -04:00
Tom Rini
9b5f9aeb3b Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_BSS_MAX_SIZE
   CONFIG_SPL_MAX_FOOTPRINT

Note that the da850evm platforms were violating the "only use one" rule
here, and so now hard-code their BSS limit.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:10 -04:00
Tom Rini
ca8a329a1b Convert CONFIG_SPL_PAD_TO et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_PAD_TO
   CONFIG_SPL_MAX_SIZE
   CONFIG_TPL_PAD_TO
   CONFIG_TPL_MAX_SIZE

Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the
existing places.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:06 -04:00
Peng Fan
abf8d9632f configs: set CONFIG_COUNTER_FREQUENCY
Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in
config header file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
[trini: Re-run migration]
2022-04-21 15:15:51 -04:00
Tom Rini
d46e86d25c configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 13:36:51 -04:00
Leonidas-Panagiotis Papadakos
5f4cc27473 rockchip: rk3328: enable USB mass storage on Renegade
This is very useful to access the LibreComputer eMMC as removable
storage from a PC (e.g. like so `ums 0 mmc 0`). It has been tested as
working on my Renegade board.

Signed-off-by: Leonidas P. Papadakos <papadakospan at gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-18 18:12:03 +08:00
Simon Glass
7abf178bb8 power: Tidy up #undef of CONFIG_DM_PMIC
Add a proper Kconfig option for SPL so we can remove the hack in some of
the board config files.

This involves adding CONFIG_SPL_DM_PMIC to some of the configs as well
as updateing the Makefile rule for PMIC_RK8XX to exclude SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Add SPL_PMIC_RK8XX, enable when needed, handle undef of
        CONFIG_DM_PMIC_PFUZE100 as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04 12:26:02 -04:00
Tom Rini
a2ac2b964b Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SKIP_LOWLEVEL_INIT
   CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
Tom Rini
49c8ef0e45 Convert CONFIG_SYS_LOAD_ADDR to Kconfig
Now that we have consistent usage, migrate this symbol to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-31 17:46:37 -04:00
Simon Glass
975e7cf301 i2c: Rename SPL/TPL_I2C_SUPPORT to I2C
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28 14:29:37 -04:00
Simon Glass
9ca00684db Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:29:37 -04:00
Simon Glass
83061dbd1c Rename GPIO_SUPPORT to GPIO
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:29:36 -04:00
Simon Glass
933b2f09cb Rename SPL_POWER_SUPPORT to SPL_POWER
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-28 14:27:54 -04:00
Tom Rini
2bba78076b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 10:17:29 -04:00
Tom Rini
74f11b55df configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-11-09 14:23:01 -05:00
Simon Glass
70190f82cb rockchip: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Tom Rini
0817daa760 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-09 12:22:06 -04:00
Tom Rini
554e5514ac configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 15:31:07 -04:00
Tom Rini
7d08077334 Convert CONFIG_SYS_MMC_ENV_DEV et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MMC_ENV_DEV
   CONFIG_SYS_MMC_ENV_PART

Note that with this conversion we now have consistent behavior with
respect to ensuring that we have always selected the correct MMC
device and hardware partition.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-08 11:03:52 -04:00
Tom Rini
f7d0ae9c63 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28 08:46:52 -04:00
Chen-Yu Tsai
bab972948e rockchip: rk3328: Add support for ROC-RK3328-CC board
The ROC-RK3328-CC from Firefly and Libre Computer Project is a credit
card size development board based on the Rockchip RK3328 SoC, with:

  - 1/2/4 GB DDR4 DRAM
  - eMMC connector for optional module
  - micro SD card slot
  - 1 x USB 3.0 host port
  - 2 x USB 2.0 host port
  - 1 x USB 2.0 OTG port
  - HDMI video output
  - TRRS connector with audio and composite video output
  - gigabit Ethernet
  - consumer IR receiver
  - debug UART pins

The ROC-RK3328-CC has the enable pin of the SD card power switch tied
to GPIO_0_D6. This pin also has the function SDMMC0_PWREN, which is
muxed by default. SDMMC0_PWREN is an active high signal controlled by
the MMC controller, however the switch enable is active low, and
pulled low (enabled) by default to make things work on boot.

As such, we need to mux away from SDMMC0_PWREN and use GPIO to enable
power to the card. The default GPIO state for the pin is pull-down and
input, which doesn't require extra configuration when paired with the
external pull-down and active low switch.

Deal with this by enabling regulator support in SPL, and setting
"u-boot,dm-spl" for the regulator and other device nodes needed for
muxing the pin.

The device tree file is synced from the Linux kernel next-20200324.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00