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global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_*

Browse source 
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Tom Rini 2022-11-16 13:10:28 -05:00
parent 9591b63531
commit 91092132ba
134 changed files with 347 additions and 347 deletions
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2
arch/arm/cpu/armv7/ls102xa/fdt.c
View file

@ -125,7 +125,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
#ifdef CONFIG_SYS_NS16550 #ifdef CONFIG_SYS_NS16550
do_fixup_by_compat_u32(blob, "fsl,16550-FIFO64", do_fixup_by_compat_u32(blob, "fsl,16550-FIFO64",
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1); "clock-frequency", CFG_SYS_NS16550_CLK, 1);
#endif #endif
sysclk_path = fdt_get_alias(blob, "sysclk"); sysclk_path = fdt_get_alias(blob, "sysclk");

2
arch/arm/cpu/armv8/fsl-layerscape/fdt.c
View file

@ -646,7 +646,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
#ifdef CONFIG_SYS_NS16550 #ifdef CONFIG_SYS_NS16550
do_fixup_by_compat_u32(blob, "fsl,ns16550", do_fixup_by_compat_u32(blob, "fsl,ns16550",
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1); "clock-frequency", CFG_SYS_NS16550_CLK, 1);
#endif #endif
do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency", do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",

6
arch/arm/include/asm/arch-bcmcygnus/configs.h
View file

@ -11,8 +11,8 @@
/* uArchitecture specifics */ /* uArchitecture specifics */
/* Serial Info */ /* Serial Info */
#define CONFIG_SYS_NS16550_CLK 100000000 #define CFG_SYS_NS16550_CLK 100000000
#define CONFIG_SYS_NS16550_CLK_DIV 54 #define CFG_SYS_NS16550_CLK_DIV 54
#define CONFIG_SYS_NS16550_COM3 0x18023000 #define CFG_SYS_NS16550_COM3 0x18023000
#endif /* __ARCH_CONFIGS_H */ #endif /* __ARCH_CONFIGS_H */

4
arch/arm/include/asm/arch-bcmnsp/configs.h
View file

@ -11,7 +11,7 @@
/* uArchitecture specifics */ /* uArchitecture specifics */
/* Serial Info */ /* Serial Info */
#define CONFIG_SYS_NS16550_CLK 0x03b9aca0 #define CFG_SYS_NS16550_CLK 0x03b9aca0
#define CONFIG_SYS_NS16550_COM1 0x18000300 #define CFG_SYS_NS16550_COM1 0x18000300
#endif /* __ARCH_CONFIGS_H */ #endif /* __ARCH_CONFIGS_H */

8
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
View file

@ -26,10 +26,10 @@
#define CFG_SYS_FSL_QMAN_ADDR (CONFIG_SYS_IMMR + 0x00880000) #define CFG_SYS_FSL_QMAN_ADDR (CONFIG_SYS_IMMR + 0x00880000)
#define CFG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000) #define CFG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000)
#define CFG_SYS_FSL_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000) #define CFG_SYS_FSL_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000)
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011c0600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011c0600)
#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_IMMR + 0x011d0500) #define CFG_SYS_NS16550_COM3 (CONFIG_SYS_IMMR + 0x011d0500)
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_IMMR + 0x011d0600) #define CFG_SYS_NS16550_COM4 (CONFIG_SYS_IMMR + 0x011d0600)
#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000) #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000)
#define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000) #define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000)
#define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000) #define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000)

4
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
View file

@ -35,8 +35,8 @@
#ifndef CONFIG_NXP_LSCH3_2 #ifndef CONFIG_NXP_LSCH3_2
#define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x01240000) #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x01240000)
#endif #endif
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011C0500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011C0500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011C0600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011C0600)
#define SYS_FSL_LS2080A_LS2085A_TIMER_ADDR 0x023d0000 #define SYS_FSL_LS2080A_LS2085A_TIMER_ADDR 0x023d0000
#define CFG_SYS_FSL_TIMER_ADDR 0x023e0000 #define CFG_SYS_FSL_TIMER_ADDR 0x023e0000
#define CFG_SYS_FSL_PMU_CLTBENR (CFG_SYS_FSL_PMU_ADDR + \ #define CFG_SYS_FSL_PMU_CLTBENR (CFG_SYS_FSL_PMU_ADDR + \

4
arch/arm/include/asm/arch-lpc32xx/config.h
View file

@ -19,8 +19,8 @@
#endif #endif
#endif #endif
#if !defined(CONFIG_SYS_NS16550_CLK) #if !defined(CFG_SYS_NS16550_CLK)
#define CONFIG_SYS_NS16550_CLK 13000000 #define CFG_SYS_NS16550_CLK 13000000
#endif #endif
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \

4
arch/arm/include/asm/arch-ls102xa/config.h
View file

@ -30,8 +30,8 @@
#define CFG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) #define CFG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000)
#define CFG_SYS_FSL_LS1_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000) #define CFG_SYS_FSL_LS1_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000)
#define CFG_SYS_FSL_RCPM_ADDR (CONFIG_SYS_IMMR + 0x00ee2000) #define CFG_SYS_FSL_RCPM_ADDR (CONFIG_SYS_IMMR + 0x00ee2000)
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500)
#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000)
#define CFG_SYS_FSL_SEC_OFFSET 0x00700000 #define CFG_SYS_FSL_SEC_OFFSET 0x00700000

6
arch/arm/mach-davinci/da850_lowlevel.c
View file

@ -290,8 +290,8 @@ int arch_cpu_init(void)
board_gpio_init(); board_gpio_init();
#if !CONFIG_IS_ENABLED(DM_SERIAL) #if !CONFIG_IS_ENABLED(DM_SERIAL)
ns16550_init((struct ns16550 *)(CONFIG_SYS_NS16550_COM1), ns16550_init((struct ns16550 *)(CFG_SYS_NS16550_COM1),
CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); CFG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
#endif #endif
/* /*
* Fix Power and Emulation Management Register * Fix Power and Emulation Management Register
@ -299,7 +299,7 @@ int arch_cpu_init(void)
*/ */
writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
DAVINCI_UART_PWREMU_MGMT_UTRST), DAVINCI_UART_PWREMU_MGMT_UTRST),
#if (CONFIG_SYS_NS16550_COM1 == DAVINCI_UART0_BASE) #if (CFG_SYS_NS16550_COM1 == DAVINCI_UART0_BASE)
&davinci_uart0_ctrl_regs->pwremu_mgmt); &davinci_uart0_ctrl_regs->pwremu_mgmt);
#else #else
&davinci_uart2_ctrl_regs->pwremu_mgmt); &davinci_uart2_ctrl_regs->pwremu_mgmt);

4
arch/arm/mach-davinci/spl.c
View file

@ -27,9 +27,9 @@ void puts(const char *str)
void putc(char c) void putc(char c)
{ {
if (c == '\n') if (c == '\n')
ns16550_putc((struct ns16550 *)(CONFIG_SYS_NS16550_COM1), '\r'); ns16550_putc((struct ns16550 *)(CFG_SYS_NS16550_COM1), '\r');
ns16550_putc((struct ns16550 *)(CONFIG_SYS_NS16550_COM1), c); ns16550_putc((struct ns16550 *)(CFG_SYS_NS16550_COM1), c);
} }
#endif /* CONFIG_SPL_LIBCOMMON_SUPPORT */ #endif /* CONFIG_SPL_LIBCOMMON_SUPPORT */

4
arch/arm/mach-keystone/init.c
View file

@ -185,8 +185,8 @@ int arch_cpu_init(void)
* driver doesn't handle this. * driver doesn't handle this.
*/ */
#ifndef CONFIG_DM_SERIAL #ifndef CONFIG_DM_SERIAL
ns16550_init((struct ns16550 *)(CONFIG_SYS_NS16550_COM2), ns16550_init((struct ns16550 *)(CFG_SYS_NS16550_COM2),
CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); CFG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
#endif #endif
return 0; return 0;

8
arch/arm/mach-lpc32xx/devices.c
View file

@ -44,13 +44,13 @@ void lpc32xx_uart_init(unsigned int uart_id)
#if !CONFIG_IS_ENABLED(OF_CONTROL) #if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct ns16550_plat lpc32xx_uart[] = { static const struct ns16550_plat lpc32xx_uart[] = {
{ .base = UART3_BASE, .reg_shift = 2, { .base = UART3_BASE, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
{ .base = UART4_BASE, .reg_shift = 2, { .base = UART4_BASE, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
{ .base = UART5_BASE, .reg_shift = 2, { .base = UART5_BASE, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
{ .base = UART6_BASE, .reg_shift = 2, { .base = UART6_BASE, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
}; };
#if defined(CONFIG_LPC32XX_HSUART) #if defined(CONFIG_LPC32XX_HSUART)

32
arch/arm/mach-omap2/am33xx/board.c
View file

@ -87,29 +87,29 @@ int dram_init_banksize(void)
#if !CONFIG_IS_ENABLED(OF_CONTROL) #if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct ns16550_plat am33xx_serial[] = { static const struct ns16550_plat am33xx_serial[] = {
{ .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, { .base = CFG_SYS_NS16550_COM1, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
# ifdef CONFIG_SYS_NS16550_COM2 # ifdef CFG_SYS_NS16550_COM2
{ .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, { .base = CFG_SYS_NS16550_COM2, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
# ifdef CONFIG_SYS_NS16550_COM3 # ifdef CFG_SYS_NS16550_COM3
{ .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, { .base = CFG_SYS_NS16550_COM3, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
{ .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, { .base = CFG_SYS_NS16550_COM4, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
{ .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, { .base = CFG_SYS_NS16550_COM5, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
{ .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, { .base = CFG_SYS_NS16550_COM6, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
# endif # endif
# endif # endif
}; };
U_BOOT_DRVINFOS(am33xx_uarts) = { U_BOOT_DRVINFOS(am33xx_uarts) = {
{ "ns16550_serial", &am33xx_serial[0] }, { "ns16550_serial", &am33xx_serial[0] },
# ifdef CONFIG_SYS_NS16550_COM2 # ifdef CFG_SYS_NS16550_COM2
{ "ns16550_serial", &am33xx_serial[1] }, { "ns16550_serial", &am33xx_serial[1] },
# ifdef CONFIG_SYS_NS16550_COM3 # ifdef CFG_SYS_NS16550_COM3
{ "ns16550_serial", &am33xx_serial[2] }, { "ns16550_serial", &am33xx_serial[2] },
{ "ns16550_serial", &am33xx_serial[3] }, { "ns16550_serial", &am33xx_serial[3] },
{ "ns16550_serial", &am33xx_serial[4] }, { "ns16550_serial", &am33xx_serial[4] },

4
arch/arm/mach-tegra/board.c
View file

@ -259,9 +259,9 @@ void board_init_uart_f(void)
#if !CONFIG_IS_ENABLED(OF_CONTROL) #if !CONFIG_IS_ENABLED(OF_CONTROL)
static struct ns16550_plat ns16550_com1_pdata = { static struct ns16550_plat ns16550_com1_pdata = {
.base = CONFIG_SYS_NS16550_COM1, .base = CFG_SYS_NS16550_COM1,
.reg_shift = 2, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .clock = CFG_SYS_NS16550_CLK,
.fcr = UART_FCR_DEFVAL, .fcr = UART_FCR_DEFVAL,
}; };

12
arch/powerpc/cpu/mpc85xx/fdt.c
View file

@ -649,7 +649,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
#ifdef CONFIG_SYS_NS16550 #ifdef CONFIG_SYS_NS16550
do_fixup_by_compat_u32(blob, "ns16550", do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1); "clock-frequency", CFG_SYS_NS16550_CLK, 1);
#endif #endif
#ifdef CONFIG_FSL_CORENET #ifdef CONFIG_FSL_CORENET
@ -751,7 +751,7 @@ static void msg(const char *name, uint64_t uaddr, uint64_t daddr)
* This function compares several CONFIG_xxx macros that contain physical * This function compares several CONFIG_xxx macros that contain physical
* addresses with the corresponding nodes in the device tree, to see if * addresses with the corresponding nodes in the device tree, to see if
* the physical addresses are all correct. For example, if * the physical addresses are all correct. For example, if
* CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address * CFG_SYS_NS16550_COM1 is defined, then it contains the virtual address
* of the first UART. We convert this to a physical address and compare * of the first UART. We convert this to a physical address and compare
* that with the physical address of the first ns16550-compatible node * that with the physical address of the first ns16550-compatible node
* in the device tree. If they don't match, then we display a warning. * in the device tree. If they don't match, then we display a warning.
@ -796,15 +796,15 @@ int ft_verify_fdt(void *fdt)
*/ */
aliases = fdt_path_offset(fdt, "/aliases"); aliases = fdt_path_offset(fdt, "/aliases");
if (aliases > 0) { if (aliases > 0) {
#ifdef CONFIG_SYS_NS16550_COM1 #ifdef CFG_SYS_NS16550_COM1
if (!fdt_verify_alias_address(fdt, aliases, "serial0", if (!fdt_verify_alias_address(fdt, aliases, "serial0",
CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1))) CCSR_VIRT_TO_PHYS(CFG_SYS_NS16550_COM1)))
return 0; return 0;
#endif #endif
#ifdef CONFIG_SYS_NS16550_COM2 #ifdef CFG_SYS_NS16550_COM2
if (!fdt_verify_alias_address(fdt, aliases, "serial1", if (!fdt_verify_alias_address(fdt, aliases, "serial1",
CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2))) CCSR_VIRT_TO_PHYS(CFG_SYS_NS16550_COM2)))
return 0; return 0;
#endif #endif
} }

2
arch/powerpc/include/asm/config.h
View file

@ -52,7 +52,7 @@
* TODO: Convert this to a clock driver exists that can give us the UART * TODO: Convert this to a clock driver exists that can give us the UART
* clock here. * clock here.
*/ */
#define CONFIG_SYS_NS16550_CLK get_serial_clock() #define CFG_SYS_NS16550_CLK get_serial_clock()
#endif #endif
#endif /* _ASM_CONFIG_H_ */ #endif /* _ASM_CONFIG_H_ */

10
board/Synology/ds109/ds109.c
View file

@ -101,17 +101,17 @@ int board_init(void)
#include <ns16550.h> #include <ns16550.h>
#define SOFTWARE_SHUTDOWN 0x31 #define SOFTWARE_SHUTDOWN 0x31
#define SOFTWARE_REBOOT 0x43 #define SOFTWARE_REBOOT 0x43
#define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE #define CFG_SYS_NS16550_COM2 KW_UART1_BASE
void reset_misc(void) void reset_misc(void)
{ {
int b_d; int b_d;
printf("Synology reset..."); printf("Synology reset...");
udelay(50000); udelay(50000);
b_d = ns16550_calc_divisor((struct ns16550 *)CONFIG_SYS_NS16550_COM2, b_d = ns16550_calc_divisor((struct ns16550 *)CFG_SYS_NS16550_COM2,
CONFIG_SYS_NS16550_CLK, 9600); CFG_SYS_NS16550_CLK, 9600);
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM2, b_d); ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM2, b_d);
ns16550_putc((struct ns16550 *)CONFIG_SYS_NS16550_COM2, ns16550_putc((struct ns16550 *)CFG_SYS_NS16550_COM2,
SOFTWARE_REBOOT); SOFTWARE_REBOOT);
} }

12
board/eets/pdu001/mux.c
View file

@ -92,22 +92,22 @@ void enable_uart5_pin_mux(void)
void enable_uart_pin_mux(u32 addr) void enable_uart_pin_mux(u32 addr)
{ {
switch (addr) { switch (addr) {
case CONFIG_SYS_NS16550_COM1: case CFG_SYS_NS16550_COM1:
enable_uart0_pin_mux(); enable_uart0_pin_mux();
break; break;
case CONFIG_SYS_NS16550_COM2: case CFG_SYS_NS16550_COM2:
enable_uart1_pin_mux(); enable_uart1_pin_mux();
break; break;
case CONFIG_SYS_NS16550_COM3: case CFG_SYS_NS16550_COM3:
enable_uart2_pin_mux(); enable_uart2_pin_mux();
break; break;
case CONFIG_SYS_NS16550_COM4: case CFG_SYS_NS16550_COM4:
enable_uart3_pin_mux(); enable_uart3_pin_mux();
break; break;
case CONFIG_SYS_NS16550_COM5: case CFG_SYS_NS16550_COM5:
enable_uart4_pin_mux(); enable_uart4_pin_mux();
break; break;
case CONFIG_SYS_NS16550_COM6: case CFG_SYS_NS16550_COM6:
enable_uart5_pin_mux(); enable_uart5_pin_mux();
break; break;
} }

2
board/emulation/qemu-ppce500/qemu-ppce500.c
View file

@ -343,7 +343,7 @@ void *board_fdt_blob_setup(int *err)
return get_fdt_virt(); return get_fdt_virt();
} }
/* See CONFIG_SYS_NS16550_CLK in arch/powerpc/include/asm/config.h */ /* See CFG_SYS_NS16550_CLK in arch/powerpc/include/asm/config.h */
int get_serial_clock(void) int get_serial_clock(void)
{ {
return get_bus_freq(0); return get_bus_freq(0);

2
board/freescale/p1010rdb/p1010rdb.c
View file

@ -587,7 +587,7 @@ void fdt_disable_uart1(void *blob)
int nodeoff; int nodeoff;
nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,ns16550", nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,ns16550",
CONFIG_SYS_NS16550_COM2); CFG_SYS_NS16550_COM2);
if (nodeoff > 0) { if (nodeoff > 0) {
fdt_status_disabled(blob, nodeoff); fdt_status_disabled(blob, nodeoff);

2
board/freescale/p1010rdb/spl.c
View file

@ -45,7 +45,7 @@ void board_init_f(ulong bootflag)
plat_ratio >>= 1; plat_ratio >>= 1;
gd->bus_clk = get_board_sys_clk() * plat_ratio; gd->bus_clk = get_board_sys_clk() * plat_ratio;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
gd->bus_clk / 16 / CONFIG_BAUDRATE); gd->bus_clk / 16 / CONFIG_BAUDRATE);
#ifdef CONFIG_SPL_MMC_BOOT #ifdef CONFIG_SPL_MMC_BOOT

6
board/freescale/p1010rdb/spl_minimal.c
View file

@ -32,7 +32,7 @@ void board_init_f(ulong bootflag)
plat_ratio >>= 1; plat_ratio >>= 1;
gd->bus_clk = get_board_sys_clk() * plat_ratio; gd->bus_clk = get_board_sys_clk() * plat_ratio;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
gd->bus_clk / 16 / CONFIG_BAUDRATE); gd->bus_clk / 16 / CONFIG_BAUDRATE);
puts("\nNAND boot... "); puts("\nNAND boot... ");
@ -54,9 +54,9 @@ void board_init_r(gd_t *gd, ulong dest_addr)
void putc(char c) void putc(char c)
{ {
if (c == '\n') if (c == '\n')
ns16550_putc((struct ns16550 *)CONFIG_SYS_NS16550_COM1, '\r'); ns16550_putc((struct ns16550 *)CFG_SYS_NS16550_COM1, '\r');
ns16550_putc((struct ns16550 *)CONFIG_SYS_NS16550_COM1, c); ns16550_putc((struct ns16550 *)CFG_SYS_NS16550_COM1, c);
} }
void puts(const char *str) void puts(const char *str)

2
board/freescale/p1_p2_rdb_pc/spl.c
View file

@ -57,7 +57,7 @@ void board_init_f(ulong bootflag)
bus_clk = get_board_sys_clk() * plat_ratio; bus_clk = get_board_sys_clk() * plat_ratio;
gd->bus_clk = bus_clk; gd->bus_clk = bus_clk;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
bus_clk / 16 / CONFIG_BAUDRATE); bus_clk / 16 / CONFIG_BAUDRATE);
#ifdef CONFIG_SPL_MMC_BOOT #ifdef CONFIG_SPL_MMC_BOOT
puts("\nSD boot...\n"); puts("\nSD boot...\n");

6
board/freescale/p1_p2_rdb_pc/spl_minimal.c
View file

@ -31,7 +31,7 @@ void board_init_f(ulong bootflag)
plat_ratio >>= 1; plat_ratio >>= 1;
gd->bus_clk = get_board_sys_clk() * plat_ratio; gd->bus_clk = get_board_sys_clk() * plat_ratio;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
gd->bus_clk / 16 / CONFIG_BAUDRATE); gd->bus_clk / 16 / CONFIG_BAUDRATE);
puts("\nNAND boot... "); puts("\nNAND boot... ");
@ -52,9 +52,9 @@ void board_init_r(gd_t *gd, ulong dest_addr)
void putc(char c) void putc(char c)
{ {
if (c == '\n') if (c == '\n')
ns16550_putc((struct ns16550 *)CONFIG_SYS_NS16550_COM1, '\r'); ns16550_putc((struct ns16550 *)CFG_SYS_NS16550_COM1, '\r');
ns16550_putc((struct ns16550 *)CONFIG_SYS_NS16550_COM1, c); ns16550_putc((struct ns16550 *)CFG_SYS_NS16550_COM1, c);
} }
void puts(const char *str) void puts(const char *str)

2
board/freescale/t102xrdb/spl.c
View file

@ -73,7 +73,7 @@ void board_init_f(ulong bootflag)
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
ccb_clk = sys_clk * plat_ratio / 2; ccb_clk = sys_clk * plat_ratio / 2;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
ccb_clk / 16 / CONFIG_BAUDRATE); ccb_clk / 16 / CONFIG_BAUDRATE);
#if defined(CONFIG_SPL_MMC_BOOT) #if defined(CONFIG_SPL_MMC_BOOT)

2
board/freescale/t104xrdb/spl.c
View file

@ -72,7 +72,7 @@ void board_init_f(ulong bootflag)
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
uart_clk = sys_clk * plat_ratio / 2; uart_clk = sys_clk * plat_ratio / 2;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
uart_clk / 16 / CONFIG_BAUDRATE); uart_clk / 16 / CONFIG_BAUDRATE);
relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0); relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);

2
board/freescale/t208xqds/spl.c
View file

@ -82,7 +82,7 @@ void board_init_f(ulong bootflag)
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
ccb_clk = sys_clk * plat_ratio / 2; ccb_clk = sys_clk * plat_ratio / 2;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
ccb_clk / 16 / CONFIG_BAUDRATE); ccb_clk / 16 / CONFIG_BAUDRATE);
#if defined(CONFIG_SPL_MMC_BOOT) #if defined(CONFIG_SPL_MMC_BOOT)

2
board/freescale/t208xrdb/spl.c
View file

@ -42,7 +42,7 @@ void board_init_f(ulong bootflag)
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
ccb_clk = sys_clk * plat_ratio / 2; ccb_clk = sys_clk * plat_ratio / 2;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
ccb_clk / 16 / CONFIG_BAUDRATE); ccb_clk / 16 / CONFIG_BAUDRATE);
#if defined(CONFIG_SPL_MMC_BOOT) #if defined(CONFIG_SPL_MMC_BOOT)

2
board/freescale/t4rdb/spl.c
View file

@ -51,7 +51,7 @@ void board_init_f(ulong bootflag)
plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
ccb_clk = sys_clk * plat_ratio / 2; ccb_clk = sys_clk * plat_ratio / 2;
ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
ccb_clk / 16 / CONFIG_BAUDRATE); ccb_clk / 16 / CONFIG_BAUDRATE);
puts("\nSD boot...\n"); puts("\nSD boot...\n");

4
board/nokia/rx51/rx51.c
View file

@ -795,9 +795,9 @@ U_BOOT_DRVINFOS(rx51_kp) = {
}; };
static const struct ns16550_plat rx51_serial = { static const struct ns16550_plat rx51_serial = {
.base = CONFIG_SYS_NS16550_COM3, .base = CFG_SYS_NS16550_COM3,
.reg_shift = 2, .reg_shift = 2,
.clock = CONFIG_SYS_NS16550_CLK, .clock = CFG_SYS_NS16550_CLK,
.fcr = UART_FCR_DEFVAL, .fcr = UART_FCR_DEFVAL,
}; };

2
drivers/serial/Kconfig
View file

@ -737,7 +737,7 @@ config SYS_NS16550
Support NS16550 UART or compatible. This can be enabled in the Support NS16550 UART or compatible. This can be enabled in the
device tree with the correct input clock frequency. If the input device tree with the correct input clock frequency. If the input
clock frequency is not defined in the device tree, the macro clock frequency is not defined in the device tree, the macro
CONFIG_SYS_NS16550_CLK defined in a legacy board header file will CFG_SYS_NS16550_CLK defined in a legacy board header file will
be used. It can be a constant or a function to get clock, eg, be used. It can be a constant or a function to get clock, eg,
get_serial_clock(). get_serial_clock().

8
drivers/serial/ns16550.c
View file

@ -92,8 +92,8 @@ static inline int serial_in_shift(void *addr, int shift)
#if CONFIG_IS_ENABLED(DM_SERIAL) #if CONFIG_IS_ENABLED(DM_SERIAL)
#ifndef CONFIG_SYS_NS16550_CLK #ifndef CFG_SYS_NS16550_CLK
#define CONFIG_SYS_NS16550_CLK 0 #define CFG_SYS_NS16550_CLK 0
#endif #endif
/* /*
@ -567,9 +567,9 @@ int ns16550_serial_of_to_plat(struct udevice *dev)
if (!plat->clock) if (!plat->clock)
plat->clock = dev_read_u32_default(dev, "clock-frequency", plat->clock = dev_read_u32_default(dev, "clock-frequency",
CONFIG_SYS_NS16550_CLK); CFG_SYS_NS16550_CLK);
if (!plat->clock) if (!plat->clock)
plat->clock = CONFIG_SYS_NS16550_CLK; plat->clock = CFG_SYS_NS16550_CLK;
if (!plat->clock) { if (!plat->clock) {
debug("ns16550 clock not defined\n"); debug("ns16550 clock not defined\n");
return -EINVAL; return -EINVAL;

40
drivers/serial/serial_mtk.c
View file

@ -284,8 +284,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define DECLARE_HSUART_PRIV(port) \ #define DECLARE_HSUART_PRIV(port) \
static struct mtk_serial_priv mtk_hsuart##port = { \ static struct mtk_serial_priv mtk_hsuart##port = { \
.regs = (struct mtk_serial_regs *)CONFIG_SYS_NS16550_COM##port, \ .regs = (struct mtk_serial_regs *)CFG_SYS_NS16550_COM##port, \
.fixed_clk_rate = CONFIG_SYS_NS16550_CLK \ .fixed_clk_rate = CFG_SYS_NS16550_CLK \
}; };
#define DECLARE_HSUART_FUNCTIONS(port) \ #define DECLARE_HSUART_FUNCTIONS(port) \
@ -356,36 +356,36 @@ DECLARE_GLOBAL_DATA_PTR;
#error "Invalid console index value." #error "Invalid console index value."
#endif #endif
#if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1) #if CONFIG_CONS_INDEX == 1 && !defined(CFG_SYS_NS16550_COM1)
#error "Console port 1 defined but not configured." #error "Console port 1 defined but not configured."
#elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2) #elif CONFIG_CONS_INDEX == 2 && !defined(CFG_SYS_NS16550_COM2)
#error "Console port 2 defined but not configured." #error "Console port 2 defined but not configured."
#elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3) #elif CONFIG_CONS_INDEX == 3 && !defined(CFG_SYS_NS16550_COM3)
#error "Console port 3 defined but not configured." #error "Console port 3 defined but not configured."
#elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4) #elif CONFIG_CONS_INDEX == 4 && !defined(CFG_SYS_NS16550_COM4)
#error "Console port 4 defined but not configured." #error "Console port 4 defined but not configured."
#elif CONFIG_CONS_INDEX == 5 && !defined(CONFIG_SYS_NS16550_COM5) #elif CONFIG_CONS_INDEX == 5 && !defined(CFG_SYS_NS16550_COM5)
#error "Console port 5 defined but not configured." #error "Console port 5 defined but not configured."
#elif CONFIG_CONS_INDEX == 6 && !defined(CONFIG_SYS_NS16550_COM6) #elif CONFIG_CONS_INDEX == 6 && !defined(CFG_SYS_NS16550_COM6)
#error "Console port 6 defined but not configured." #error "Console port 6 defined but not configured."
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM1) #if defined(CFG_SYS_NS16550_COM1)
DECLARE_HSUART(1, "mtk-hsuart0"); DECLARE_HSUART(1, "mtk-hsuart0");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM2) #if defined(CFG_SYS_NS16550_COM2)
DECLARE_HSUART(2, "mtk-hsuart1"); DECLARE_HSUART(2, "mtk-hsuart1");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM3) #if defined(CFG_SYS_NS16550_COM3)
DECLARE_HSUART(3, "mtk-hsuart2"); DECLARE_HSUART(3, "mtk-hsuart2");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM4) #if defined(CFG_SYS_NS16550_COM4)
DECLARE_HSUART(4, "mtk-hsuart3"); DECLARE_HSUART(4, "mtk-hsuart3");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM5) #if defined(CFG_SYS_NS16550_COM5)
DECLARE_HSUART(5, "mtk-hsuart4"); DECLARE_HSUART(5, "mtk-hsuart4");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM6) #if defined(CFG_SYS_NS16550_COM6)
DECLARE_HSUART(6, "mtk-hsuart5"); DECLARE_HSUART(6, "mtk-hsuart5");
#endif #endif
@ -410,22 +410,22 @@ __weak struct serial_device *default_serial_console(void)
void mtk_serial_initialize(void) void mtk_serial_initialize(void)
{ {
#if defined(CONFIG_SYS_NS16550_COM1) #if defined(CFG_SYS_NS16550_COM1)
serial_register(&mtk_hsuart1_device); serial_register(&mtk_hsuart1_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM2) #if defined(CFG_SYS_NS16550_COM2)
serial_register(&mtk_hsuart2_device); serial_register(&mtk_hsuart2_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM3) #if defined(CFG_SYS_NS16550_COM3)
serial_register(&mtk_hsuart3_device); serial_register(&mtk_hsuart3_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM4) #if defined(CFG_SYS_NS16550_COM4)
serial_register(&mtk_hsuart4_device); serial_register(&mtk_hsuart4_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM5) #if defined(CFG_SYS_NS16550_COM5)
serial_register(&mtk_hsuart5_device); serial_register(&mtk_hsuart5_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM6) #if defined(CFG_SYS_NS16550_COM6)
serial_register(&mtk_hsuart6_device); serial_register(&mtk_hsuart6_device);
#endif #endif
} }

64
drivers/serial/serial_ns16550.c
View file

@ -20,17 +20,17 @@ DECLARE_GLOBAL_DATA_PTR;
#error "Invalid console index value." #error "Invalid console index value."
#endif #endif
#if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1) #if CONFIG_CONS_INDEX == 1 && !defined(CFG_SYS_NS16550_COM1)
#error "Console port 1 defined but not configured." #error "Console port 1 defined but not configured."
#elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2) #elif CONFIG_CONS_INDEX == 2 && !defined(CFG_SYS_NS16550_COM2)
#error "Console port 2 defined but not configured." #error "Console port 2 defined but not configured."
#elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3) #elif CONFIG_CONS_INDEX == 3 && !defined(CFG_SYS_NS16550_COM3)
#error "Console port 3 defined but not configured." #error "Console port 3 defined but not configured."
#elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4) #elif CONFIG_CONS_INDEX == 4 && !defined(CFG_SYS_NS16550_COM4)
#error "Console port 4 defined but not configured." #error "Console port 4 defined but not configured."
#elif CONFIG_CONS_INDEX == 5 && !defined(CONFIG_SYS_NS16550_COM5) #elif CONFIG_CONS_INDEX == 5 && !defined(CFG_SYS_NS16550_COM5)
#error "Console port 5 defined but not configured." #error "Console port 5 defined but not configured."
#elif CONFIG_CONS_INDEX == 6 && !defined(CONFIG_SYS_NS16550_COM6) #elif CONFIG_CONS_INDEX == 6 && !defined(CFG_SYS_NS16550_COM6)
#error "Console port 6 defined but not configured." #error "Console port 6 defined but not configured."
#endif #endif
@ -38,33 +38,33 @@ DECLARE_GLOBAL_DATA_PTR;
* the array is 0 based. * the array is 0 based.
*/ */
static struct ns16550 *serial_ports[6] = { static struct ns16550 *serial_ports[6] = {
#ifdef CONFIG_SYS_NS16550_COM1 #ifdef CFG_SYS_NS16550_COM1
(struct ns16550 *)CONFIG_SYS_NS16550_COM1, (struct ns16550 *)CFG_SYS_NS16550_COM1,
#else #else
NULL, NULL,
#endif #endif
#ifdef CONFIG_SYS_NS16550_COM2 #ifdef CFG_SYS_NS16550_COM2
(struct ns16550 *)CONFIG_SYS_NS16550_COM2, (struct ns16550 *)CFG_SYS_NS16550_COM2,
#else #else
NULL, NULL,
#endif #endif
#ifdef CONFIG_SYS_NS16550_COM3 #ifdef CFG_SYS_NS16550_COM3
(struct ns16550 *)CONFIG_SYS_NS16550_COM3, (struct ns16550 *)CFG_SYS_NS16550_COM3,
#else #else
NULL, NULL,
#endif #endif
#ifdef CONFIG_SYS_NS16550_COM4 #ifdef CFG_SYS_NS16550_COM4
(struct ns16550 *)CONFIG_SYS_NS16550_COM4, (struct ns16550 *)CFG_SYS_NS16550_COM4,
#else #else
NULL, NULL,
#endif #endif
#ifdef CONFIG_SYS_NS16550_COM5 #ifdef CFG_SYS_NS16550_COM5
(struct ns16550 *)CONFIG_SYS_NS16550_COM5, (struct ns16550 *)CFG_SYS_NS16550_COM5,
#else #else
NULL, NULL,
#endif #endif
#ifdef CONFIG_SYS_NS16550_COM6 #ifdef CFG_SYS_NS16550_COM6
(struct ns16550 *)CONFIG_SYS_NS16550_COM6 (struct ns16550 *)CFG_SYS_NS16550_COM6
#else #else
NULL NULL
#endif #endif
@ -78,7 +78,7 @@ static struct ns16550 *serial_ports[6] = {
{ \ { \
int clock_divisor; \ int clock_divisor; \
clock_divisor = ns16550_calc_divisor(serial_ports[port-1], \ clock_divisor = ns16550_calc_divisor(serial_ports[port-1], \
CONFIG_SYS_NS16550_CLK, gd->baudrate); \ CFG_SYS_NS16550_CLK, gd->baudrate); \
ns16550_init(serial_ports[port - 1], clock_divisor); \ ns16550_init(serial_ports[port - 1], clock_divisor); \
return 0 ; \ return 0 ; \
} \ } \
@ -144,7 +144,7 @@ static void _serial_setbrg(const int port)
{ {
int clock_divisor; int clock_divisor;
clock_divisor = ns16550_calc_divisor(PORT, CONFIG_SYS_NS16550_CLK, clock_divisor = ns16550_calc_divisor(PORT, CFG_SYS_NS16550_CLK,
gd->baudrate); gd->baudrate);
ns16550_reinit(PORT, clock_divisor); ns16550_reinit(PORT, clock_divisor);
} }
@ -179,32 +179,32 @@ serial_setbrg_dev(unsigned int dev_index)
_serial_setbrg(dev_index); _serial_setbrg(dev_index);
} }
#if defined(CONFIG_SYS_NS16550_COM1) #if defined(CFG_SYS_NS16550_COM1)
DECLARE_ESERIAL_FUNCTIONS(1); DECLARE_ESERIAL_FUNCTIONS(1);
struct serial_device eserial1_device = struct serial_device eserial1_device =
INIT_ESERIAL_STRUCTURE(1, "eserial0"); INIT_ESERIAL_STRUCTURE(1, "eserial0");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM2) #if defined(CFG_SYS_NS16550_COM2)
DECLARE_ESERIAL_FUNCTIONS(2); DECLARE_ESERIAL_FUNCTIONS(2);
struct serial_device eserial2_device = struct serial_device eserial2_device =
INIT_ESERIAL_STRUCTURE(2, "eserial1"); INIT_ESERIAL_STRUCTURE(2, "eserial1");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM3) #if defined(CFG_SYS_NS16550_COM3)
DECLARE_ESERIAL_FUNCTIONS(3); DECLARE_ESERIAL_FUNCTIONS(3);
struct serial_device eserial3_device = struct serial_device eserial3_device =
INIT_ESERIAL_STRUCTURE(3, "eserial2"); INIT_ESERIAL_STRUCTURE(3, "eserial2");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM4) #if defined(CFG_SYS_NS16550_COM4)
DECLARE_ESERIAL_FUNCTIONS(4); DECLARE_ESERIAL_FUNCTIONS(4);
struct serial_device eserial4_device = struct serial_device eserial4_device =
INIT_ESERIAL_STRUCTURE(4, "eserial3"); INIT_ESERIAL_STRUCTURE(4, "eserial3");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM5) #if defined(CFG_SYS_NS16550_COM5)
DECLARE_ESERIAL_FUNCTIONS(5); DECLARE_ESERIAL_FUNCTIONS(5);
struct serial_device eserial5_device = struct serial_device eserial5_device =
INIT_ESERIAL_STRUCTURE(5, "eserial4"); INIT_ESERIAL_STRUCTURE(5, "eserial4");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM6) #if defined(CFG_SYS_NS16550_COM6)
DECLARE_ESERIAL_FUNCTIONS(6); DECLARE_ESERIAL_FUNCTIONS(6);
struct serial_device eserial6_device = struct serial_device eserial6_device =
INIT_ESERIAL_STRUCTURE(6, "eserial5"); INIT_ESERIAL_STRUCTURE(6, "eserial5");
@ -231,22 +231,22 @@ __weak struct serial_device *default_serial_console(void)
void ns16550_serial_initialize(void) void ns16550_serial_initialize(void)
{ {
#if defined(CONFIG_SYS_NS16550_COM1) #if defined(CFG_SYS_NS16550_COM1)
serial_register(&eserial1_device); serial_register(&eserial1_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM2) #if defined(CFG_SYS_NS16550_COM2)
serial_register(&eserial2_device); serial_register(&eserial2_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM3) #if defined(CFG_SYS_NS16550_COM3)
serial_register(&eserial3_device); serial_register(&eserial3_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM4) #if defined(CFG_SYS_NS16550_COM4)
serial_register(&eserial4_device); serial_register(&eserial4_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM5) #if defined(CFG_SYS_NS16550_COM5)
serial_register(&eserial5_device); serial_register(&eserial5_device);
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM6) #if defined(CFG_SYS_NS16550_COM6)
serial_register(&eserial6_device); serial_register(&eserial6_device);
#endif #endif
} }

6
drivers/serial/serial_omap.c
View file

@ -15,8 +15,8 @@
#include <clk.h> #include <clk.h>
#include <linux/err.h> #include <linux/err.h>
#ifndef CONFIG_SYS_NS16550_CLK #ifndef CFG_SYS_NS16550_CLK
#define CONFIG_SYS_NS16550_CLK 0 #define CFG_SYS_NS16550_CLK 0
#endif #endif
#ifdef CONFIG_DEBUG_UART_OMAP #ifdef CONFIG_DEBUG_UART_OMAP
@ -128,7 +128,7 @@ static int omap_serial_of_to_plat(struct udevice *dev)
if (!plat->clock) if (!plat->clock)
plat->clock = dev_read_u32_default(dev, "clock-frequency", plat->clock = dev_read_u32_default(dev, "clock-frequency",
CONFIG_SYS_NS16550_CLK); CFG_SYS_NS16550_CLK);
if (!plat->clock) { if (!plat->clock) {
debug("omap serial clock not defined\n"); debug("omap serial clock not defined\n");
return -EINVAL; return -EINVAL;

6
include/configs/MPC837XERDB.h
View file

@ -151,13 +151,13 @@
/* /*
* Serial Port * Serial Port
*/ */
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) #define CFG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* SERDES */ /* SERDES */
#define CONFIG_FSL_SERDES #define CONFIG_FSL_SERDES

6
include/configs/MPC8548CDS.h
View file

@ -235,13 +235,13 @@
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/* Serial Port */ /* Serial Port */
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) #define CFG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
/* /*
* I2C * I2C

6
include/configs/P1010RDB.h
View file

@ -322,13 +322,13 @@ extern unsigned long get_sdram_size(void);
/* Serial Port */ /* Serial Port */
#undef CONFIG_SERIAL_SOFTWARE_FIFO #undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) #define CFG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
/* I2C */ /* I2C */
#define I2C_PCA9557_ADDR1 0x18 #define I2C_PCA9557_ADDR1 0x18

10
include/configs/P2041RDB.h
View file

@ -163,15 +163,15 @@
* open - index 2 * open - index 2
* shorted - index 1 * shorted - index 1
*/ */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) #define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */ /* I2C */

4
include/configs/SBx81LIFKW.h
View file

@ -12,8 +12,8 @@
/* /*
* NS16550 Configuration * NS16550 Configuration
*/ */
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK #define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE #define CFG_SYS_NS16550_COM1 KW_UART0_BASE
/* /*
* Serial Port configuration * Serial Port configuration

4
include/configs/SBx81LIFXCAT.h
View file

@ -12,8 +12,8 @@
/* /*
* NS16550 Configuration * NS16550 Configuration
*/ */
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK #define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE #define CFG_SYS_NS16550_COM1 KW_UART0_BASE
/* /*
* Serial Port configuration * Serial Port configuration

10
include/configs/T102xRDB.h
View file

@ -294,15 +294,15 @@
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/* Serial Port */ /* Serial Port */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) #define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */ /* I2C */

10
include/configs/T104xRDB.h
View file

@ -267,15 +267,15 @@
* open - index 2 * open - index 2
* shorted - index 1 * shorted - index 1
*/ */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) #define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C bus multiplexer */ /* I2C bus multiplexer */
#define I2C_MUX_PCA_ADDR 0x70 #define I2C_MUX_PCA_ADDR 0x70

10
include/configs/T208xQDS.h
View file

@ -269,13 +269,13 @@
/* /*
* Serial Port * Serial Port
*/ */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) #define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* /*
* I2C * I2C

10
include/configs/T208xRDB.h
View file

@ -229,13 +229,13 @@
/* /*
* Serial Port * Serial Port
*/ */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) #define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* /*
* I2C * I2C

10
include/configs/T4240RDB.h
View file

@ -89,15 +89,15 @@
* open - index 2 * open - index 2
* shorted - index 1 * shorted - index 1
*/ */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \ #define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) #define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */ /* I2C */

12
include/configs/am335x_evm.h
View file

@ -158,12 +158,12 @@
#endif #endif
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ #define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ #define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ #define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* PMIC support */ /* PMIC support */
#define CONFIG_POWER_TPS65910 #define CONFIG_POWER_TPS65910

12
include/configs/am335x_guardian.h
View file

@ -83,12 +83,12 @@
#define CONSOLE_COLOR_RED 0x001F #define CONSOLE_COLOR_RED 0x001F
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ #define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ #define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ #define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ #define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
#ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_MTD_RAW_NAND
#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ #define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \

2
include/configs/am335x_igep003x.h
View file

@ -88,7 +88,7 @@
"echo WARNING: Could not determine device tree to use; fi; \0" "echo WARNING: Could not determine device tree to use; fi; \0"
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ #define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
/* Ethernet support */ /* Ethernet support */

12
include/configs/am335x_shc.h
View file

@ -136,11 +136,11 @@
#endif /* Regular Boot */ #endif /* Regular Boot */
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ #define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ #define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ #define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ #define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
#endif /* ! __CONFIG_AM335X_SHC_H */ #endif /* ! __CONFIG_AM335X_SHC_H */

12
include/configs/am335x_sl50.h
View file

@ -36,12 +36,12 @@
BOOTENV BOOTENV
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ #define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ #define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ #define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* PMIC support */ /* PMIC support */
#define CONFIG_POWER_TPS65910 #define CONFIG_POWER_TPS65910

4
include/configs/am43xx_evm.h
View file

@ -14,7 +14,7 @@
#include <asm/arch/omap.h> #include <asm/arch/omap.h>
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_CLK 48000000 #define CFG_SYS_NS16550_CLK 48000000
/* I2C Configuration */ /* I2C Configuration */
@ -41,7 +41,7 @@
#define V_SCLK (V_OSCK) #define V_SCLK (V_OSCK)
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
/* USB Device Firmware Update support */ /* USB Device Firmware Update support */

6
include/configs/am57xx_evm.h
View file

@ -16,9 +16,9 @@
#define CONFIG_IODELAY_RECALIBRATION #define CONFIG_IODELAY_RECALIBRATION
#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ #define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
#define CONFIG_SYS_OMAP_ABE_SYSCK #define CONFIG_SYS_OMAP_ABE_SYSCK

2
include/configs/ap143.h
View file

@ -14,7 +14,7 @@
/* /*
* Serial Port * Serial Port
*/ */
#define CONFIG_SYS_NS16550_CLK 25000000 #define CFG_SYS_NS16550_CLK 25000000
/* Miscellaneous configurable options */ /* Miscellaneous configurable options */

2
include/configs/ap152.h
View file

@ -14,7 +14,7 @@
/* /*
* Serial Port * Serial Port
*/ */
#define CONFIG_SYS_NS16550_CLK 25000000 #define CFG_SYS_NS16550_CLK 25000000
/* Miscellaneous configurable options */ /* Miscellaneous configurable options */

2
include/configs/apalis-tk1.h
View file

@ -14,7 +14,7 @@
/* Board-specific serial config */ /* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define FDT_MODULE "apalis-v1.2" #define FDT_MODULE "apalis-v1.2"
#define FDT_MODULE_V1_0 "apalis" #define FDT_MODULE_V1_0 "apalis"

2
include/configs/apalis_t30.h
View file

@ -21,7 +21,7 @@
* Apalis UART4: NVIDIA UARTC * Apalis UART4: NVIDIA UARTC
*/ */
#define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define UBOOT_UPDATE \ #define UBOOT_UPDATE \
"uboot_hwpart=1\0" \ "uboot_hwpart=1\0" \

2
include/configs/ax25-ae350.h
View file

@ -33,7 +33,7 @@
/* /*
* Serial console configuration * Serial console configuration
*/ */
#define CONFIG_SYS_NS16550_CLK 19660800 #define CFG_SYS_NS16550_CLK 19660800
/* Init Stack Pointer */ /* Init Stack Pointer */

2
include/configs/axs10x.h
View file

@ -26,7 +26,7 @@
/* /*
* UART configuration * UART configuration
*/ */
#define CONFIG_SYS_NS16550_CLK 33333333 #define CFG_SYS_NS16550_CLK 33333333
/* /*
* Ethernet PHY configuration * Ethernet PHY configuration

12
include/configs/baltos.h
View file

@ -181,12 +181,12 @@
/*DFUARGS*/ /*DFUARGS*/
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ #define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ #define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ #define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* PMIC support */ /* PMIC support */
#define CONFIG_POWER_TPS65910 #define CONFIG_POWER_TPS65910

2
include/configs/bcm7260.h
View file

@ -10,7 +10,7 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
#define CONFIG_SYS_NS16550_COM1 0xf040c000 #define CFG_SYS_NS16550_COM1 0xf040c000
#define CONFIG_SYS_INIT_RAM_ADDR 0x10200000 #define CONFIG_SYS_INIT_RAM_ADDR 0x10200000

2
include/configs/bcm7445.h
View file

@ -10,7 +10,7 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
#define CONFIG_SYS_NS16550_COM1 0xf040ab00 #define CFG_SYS_NS16550_COM1 0xf040ab00
#define CONFIG_SYS_INIT_RAM_ADDR 0x80200000 #define CONFIG_SYS_INIT_RAM_ADDR 0x80200000

2
include/configs/bcm_ns3.h
View file

@ -26,7 +26,7 @@
/* 12MB Malloc size */ /* 12MB Malloc size */
/* console configuration */ /* console configuration */
#define CONFIG_SYS_NS16550_CLK 25000000 #define CFG_SYS_NS16550_CLK 25000000
/* /*
* Increase max uncompressed/gunzip size, keeping size same as EMMC linux * Increase max uncompressed/gunzip size, keeping size same as EMMC linux

2
include/configs/bcmstb.h
View file

@ -97,7 +97,7 @@ extern phys_addr_t prior_stage_fdt_address;
*/ */
#define V_NS16550_CLK 81000000 #define V_NS16550_CLK 81000000
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK #define CFG_SYS_NS16550_CLK V_NS16550_CLK
/* /*
* Serial console configuration. * Serial console configuration.

2
include/configs/beaver.h
View file

@ -18,7 +18,7 @@
/* Board-specific serial config */ /* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* SPI */ /* SPI */
#define CONFIG_TEGRA_SLINK_CTRLS 6 #define CONFIG_TEGRA_SLINK_CTRLS 6

4
include/configs/bur_am335x_common.h
View file

@ -14,8 +14,8 @@
/* legacy #defines for non DM bur-board */ /* legacy #defines for non DM bur-board */
#ifndef CONFIG_DM #ifndef CONFIG_DM
#define CONFIG_SYS_NS16550_CLK (48000000) #define CFG_SYS_NS16550_CLK (48000000)
#define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CFG_SYS_NS16550_COM1 0x44e09000
#endif /* CONFIG_DM */ #endif /* CONFIG_DM */

2
include/configs/cardhu.h
View file

@ -22,7 +22,7 @@
/* Board-specific serial config */ /* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* SPI */ /* SPI */
#define CONFIG_TEGRA_SLINK_CTRLS 6 #define CONFIG_TEGRA_SLINK_CTRLS 6

2
include/configs/cei-tk1-som.h
View file

@ -20,7 +20,7 @@
/* Board-specific serial config */ /* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* SPI */ /* SPI */
#define CONFIG_SPI_FLASH_SIZE (4 << 20) #define CONFIG_SPI_FLASH_SIZE (4 << 20)

12
include/configs/chiliboard.h
View file

@ -97,12 +97,12 @@
NANDARGS NANDARGS
/* NS16550 Configuration */ /* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ #define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ #define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ #define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ #define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* SPL */ /* SPL */

2
include/configs/ci20.h
View file

@ -15,7 +15,7 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
/* NS16550-ish UARTs */ /* NS16550-ish UARTs */
#define CONFIG_SYS_NS16550_CLK 48000000 #define CFG_SYS_NS16550_CLK 48000000
/* Ethernet: davicom DM9000 */ /* Ethernet: davicom DM9000 */
#define CONFIG_DM9000_BASE 0xb6000000 #define CONFIG_DM9000_BASE 0xb6000000

4
include/configs/cm_t43.h
View file

@ -14,8 +14,8 @@
#include <asm/arch/omap.h> #include <asm/arch/omap.h>
/* Serial support */ /* Serial support */
#define CONFIG_SYS_NS16550_CLK 48000000 #define CFG_SYS_NS16550_CLK 48000000
#define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CFG_SYS_NS16550_COM1 0x44e09000
/* NAND support */ /* NAND support */
#define CFG_SYS_NAND_ECCSIZE 512 #define CFG_SYS_NAND_ECCSIZE 512

2
include/configs/colibri_t20.h
View file

@ -13,7 +13,7 @@
/* Board-specific serial config */ /* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_TEGRA_UARTA_SDIO1 #define CONFIG_TEGRA_UARTA_SDIO1
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* NAND support */ /* NAND support */

2
include/configs/colibri_t30.h
View file

@ -22,7 +22,7 @@
* Colibri UART-C: NVIDIA UARTB * Colibri UART-C: NVIDIA UARTB
*/ */
#define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define UBOOT_UPDATE \ #define UBOOT_UPDATE \
"uboot_hwpart=1\0" \ "uboot_hwpart=1\0" \

2
include/configs/da850evm.h
View file

@ -94,7 +94,7 @@
/* /*
* Serial Driver info * Serial Driver info
*/ */
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)

2
include/configs/dalmore.h
View file

@ -15,7 +15,7 @@
/* Board-specific serial config */ /* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */ /* Environment in eMMC, at the end of 2nd "boot sector" */

6
include/configs/dra7xx_evm.h
View file

@ -27,9 +27,9 @@
#elif (CONFIG_CONS_INDEX == 3) #elif (CONFIG_CONS_INDEX == 3)
#define CONSOLEDEV "ttyS2" #define CONSOLEDEV "ttyS2"
#endif #endif
#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ #define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
#define CONFIG_SYS_OMAP_ABE_SYSCK #define CONFIG_SYS_OMAP_ABE_SYSCK

4
include/configs/gardena-smart-gateway-mt7688.h
View file

@ -20,8 +20,8 @@
/* Serial SPL */ /* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CONFIG_SYS_NS16550_CLK 40000000 #define CFG_SYS_NS16550_CLK 40000000
#define CONFIG_SYS_NS16550_COM1 0xb0000c00 #define CFG_SYS_NS16550_COM1 0xb0000c00
#endif #endif
/* UART */ /* UART */

4
include/configs/harmony.h
View file

@ -17,10 +17,10 @@
#define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_TEGRA_ENABLE_UARTD
/* UARTD: keyboard satellite board UART, default */ /* UARTD: keyboard satellite board UART, default */
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#ifdef CONFIG_TEGRA_ENABLE_UARTA #ifdef CONFIG_TEGRA_ENABLE_UARTA
/* UARTA: debug board UART */ /* UARTA: debug board UART */
#define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE #define CFG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE
#endif #endif
/* NAND support */ /* NAND support */

2
include/configs/hsdk-4xd.h
View file

@ -28,7 +28,7 @@
/* /*
* UART configuration * UART configuration
*/ */
#define CONFIG_SYS_NS16550_CLK 33330000 #define CFG_SYS_NS16550_CLK 33330000
/* /*
* Ethernet PHY configuration * Ethernet PHY configuration

2
include/configs/hsdk.h
View file

@ -27,7 +27,7 @@
/* /*
* UART configuration * UART configuration
*/ */
#define CONFIG_SYS_NS16550_CLK 33330000 #define CFG_SYS_NS16550_CLK 33330000
/* /*
* Ethernet PHY configuration * Ethernet PHY configuration

2
include/configs/jetson-tk1.h
View file

@ -16,7 +16,7 @@
/* Board-specific serial config */ /* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */ /* Environment in eMMC, at the end of 2nd "boot sector" */

2
include/configs/km/pg-wcom-ls102xa.h
View file

@ -148,7 +148,7 @@
/* /*
* Serial Port * Serial Port
*/ */
#define CONFIG_SYS_NS16550_CLK get_serial_clock() #define CFG_SYS_NS16550_CLK get_serial_clock()
/* /*
* I2C * I2C

4
include/configs/kmcent2.h
View file

@ -330,8 +330,8 @@
* Retain non-DM serial port for debug purposes. * Retain non-DM serial port for debug purposes.
*/ */
#if !defined(CONFIG_DM_SERIAL) #if !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500)
#endif #endif
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__

2
include/configs/kontron_sl28.h
View file

@ -35,7 +35,7 @@
#define CONFIG_MALLOC_F_ADDR CFG_SYS_FSL_OCRAM_BASE #define CONFIG_MALLOC_F_ADDR CFG_SYS_FSL_OCRAM_BASE
/* serial port */ /* serial port */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
/* SPL */ /* SPL */

2
include/configs/legoev3.h
View file

@ -36,7 +36,7 @@
/* /*
* Serial Driver info * Serial Driver info
*/ */
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID)

4
include/configs/linkit-smart-7688.h
View file

@ -20,8 +20,8 @@
/* Serial SPL */ /* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CONFIG_SYS_NS16550_CLK 40000000 #define CFG_SYS_NS16550_CLK 40000000
#define CONFIG_SYS_NS16550_COM3 0xb0000e00 #define CFG_SYS_NS16550_COM3 0xb0000e00
#endif #endif

2
include/configs/ls1012a_common.h
View file

@ -26,7 +26,7 @@
/* GPIO */ /* GPIO */
#define CONFIG_SYS_NS16550_CLK (get_serial_clock()) #define CFG_SYS_NS16550_CLK (get_serial_clock())
#define CONFIG_HWCONFIG #define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128 #define HWCONFIG_BUFFER_SIZE 128

2
include/configs/ls1021aiot.h
View file

@ -47,7 +47,7 @@
/* /*
* Serial Port * Serial Port
*/ */
#define CONFIG_SYS_NS16550_CLK get_serial_clock() #define CFG_SYS_NS16550_CLK get_serial_clock()
/* /*
* I2C * I2C

2
include/configs/ls1021aqds.h
View file

@ -227,7 +227,7 @@
* Serial Port * Serial Port
*/ */
#ifndef CONFIG_LPUART #ifndef CONFIG_LPUART
#define CONFIG_SYS_NS16550_CLK get_serial_clock() #define CFG_SYS_NS16550_CLK get_serial_clock()
#endif #endif
/* /*

2
include/configs/ls1021atsn.h
View file

@ -60,7 +60,7 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
/* Serial Port */ /* Serial Port */
#define CONFIG_SYS_NS16550_CLK get_serial_clock() #define CFG_SYS_NS16550_CLK get_serial_clock()
/* I2C */ /* I2C */

2
include/configs/ls1021atwr.h
View file

@ -145,7 +145,7 @@
* Serial Port * Serial Port
*/ */
#ifndef CONFIG_LPUART #ifndef CONFIG_LPUART
#define CONFIG_SYS_NS16550_CLK get_serial_clock() #define CFG_SYS_NS16550_CLK get_serial_clock()
#endif #endif
/* /*

2
include/configs/ls1028a_common.h
View file

@ -28,7 +28,7 @@
/* I2C */ /* I2C */
/* Serial Port */ /* Serial Port */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
/* Miscellaneous configurable options */ /* Miscellaneous configurable options */

2
include/configs/ls1043a_common.h
View file

@ -40,7 +40,7 @@
#define CPU_RELEASE_ADDR secondary_boot_addr #define CPU_RELEASE_ADDR secondary_boot_addr
/* Serial Port */ /* Serial Port */
#define CONFIG_SYS_NS16550_CLK (get_serial_clock()) #define CFG_SYS_NS16550_CLK (get_serial_clock())
/* SD boot SPL */ /* SD boot SPL */
#ifdef CONFIG_SD_BOOT #ifdef CONFIG_SD_BOOT

2
include/configs/ls1046a_common.h
View file

@ -40,7 +40,7 @@
#define CPU_RELEASE_ADDR secondary_boot_addr #define CPU_RELEASE_ADDR secondary_boot_addr
/* Serial Port */ /* Serial Port */
#define CONFIG_SYS_NS16550_CLK (get_serial_clock()) #define CFG_SYS_NS16550_CLK (get_serial_clock())
/* SD boot SPL */ /* SD boot SPL */
#ifdef CONFIG_SD_BOOT #ifdef CONFIG_SD_BOOT

2
include/configs/ls1088a_common.h
View file

@ -45,7 +45,7 @@
/* Serial Port */ /* Serial Port */
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) #define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
/* /*
* During booting, IFC is mapped at the region of 0x30000000. * During booting, IFC is mapped at the region of 0x30000000.

2
include/configs/ls2080a_common.h
View file

@ -37,7 +37,7 @@
/* I2C */ /* I2C */
/* Serial Port */ /* Serial Port */
#define CONFIG_SYS_NS16550_CLK (get_serial_clock()) #define CFG_SYS_NS16550_CLK (get_serial_clock())
/* /*
* During booting, IFC is mapped at the region of 0x30000000. * During booting, IFC is mapped at the region of 0x30000000.

2
include/configs/medcom-wide.h
View file

@ -16,7 +16,7 @@
/* Board-specific serial config */ /* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */ /* NAND support */

4
include/configs/mt7621.h
View file

@ -22,8 +22,8 @@
/* Serial SPL */ /* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CONFIG_SYS_NS16550_CLK 50000000 #define CFG_SYS_NS16550_CLK 50000000
#define CONFIG_SYS_NS16550_COM1 0xbe000c00 #define CFG_SYS_NS16550_COM1 0xbe000c00
#endif #endif
/* Serial common */ /* Serial common */

4
include/configs/mt7628.h
View file

@ -14,8 +14,8 @@
/* Serial SPL */ /* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CONFIG_SYS_NS16550_CLK 40000000 #define CFG_SYS_NS16550_CLK 40000000
#define CONFIG_SYS_NS16550_COM1 0xb0000c00 #define CFG_SYS_NS16550_COM1 0xb0000c00
#endif #endif
/* Serial common */ /* Serial common */

4
include/configs/mt8183.h
View file

@ -12,8 +12,8 @@
#include <linux/sizes.h> #include <linux/sizes.h>
#define CONFIG_SYS_NS16550_COM1 0x11005200 #define CFG_SYS_NS16550_COM1 0x11005200
#define CONFIG_SYS_NS16550_CLK 26000000 #define CFG_SYS_NS16550_CLK 26000000
/* Environment settings */ /* Environment settings */
#include <config_distro_bootcmd.h> #include <config_distro_bootcmd.h>

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